Verification Engineer jobs at Amd - 69 jobs

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: AMD is looking for a Lead Formal Verification Engineer leader passionate about driving the cutting-edge formal verification techniques for AMD's next generation graphics IP design. The ideal candidate will have proven experience in driving cutting-edge formal verification methodology to achieve industry leading verification quality and productivity under tight schedule. In this role the candidate will work with architecture team, design team and central formal verification team to define our formal verification roadmap, strategy, methodology, infrastructure and expand formal verification adoption through project execution. The candidate will be the primary point of contact for all GFXIP formal verification practice. You will be a member of a core team of incredibly talented industry specialists and will work with the latest and rapidly evolving graphics IP design. THE PERSON: The ideal candidate should have demonstrated rich experience in formal verification techniques for complicated modern processors(CPU, GPU, AI processor, etc.) and must possess leadership skills to influence and drive the whole formal verification team in GFXIP. Able to communicate effectively and work optimally with different teams across the organization. KEY RESPONSIBLITIES: * Define long-term strategy for formal verification expansion and steer the technical roadmap * Develop cutting-edge formal verification methodology to cover the whole graphics design, including both datapath and control logic. Scale formal verification to big and critical design for bug-free quality. Expand formal verification adoption to the whole IP development life cycle. Resolve challenging convergence issue through world class formal verification techniques like induction, reduction, abstraction, etc. * Define and drive the best-in-class formal verification infrastructure to improve formal verification productivity. Enable more verification engineers to adopt this advanced verification technology without deep formal verification knowledge * Lead the research group for emerging formal verification domains like security, safety, low power, architect level formal verification, etc. Explore the feasibility of formalizing ISA and memory model for GFXIP design * Stay informed of latest trends and innovations in formal verification. Develop technical relationship with broader AMD Design community and peers. Drive cross-department innovation and collaboration inside AMD PREFERRED EXPERIENCE: * In-depth knowledge in formal verification algorithms, engines and use cases * Proven expertise in system Verilog assertion and abstract model development * Expert user of formal verification tool from both academy and EDA vendors(JasperGold, VC formal, Murphi, theorem prover) * Proven track record of delivering high quality verification under tight schedule for modern, large scale processor design like CPU, GPU or AI processor. Comprehensive knowledge of computer architecture and graphics pipeline * Proven expertise in developing formal verification infrastructure for FPV, DPV, SEV and other use cases is strongly preferred ACADEMIC CREDENTIALS: * Undergrad degree required. Master or PhD degree in Computer Science/ Computer Engineering/ Electrical Engineering preferred This role is not eligible for Visa sponsorship. #LI-BM1 #LI-Hybrid Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here. This posting is for an existing vacancy.

We are looking for an experienced PCB Board Designer with strong expertise in Altium Designer and high-speed PCB layout. The ideal candidate will independently handle complex board designs from technology selection through final manufacturing deliverables, ensuring signal integrity, power integrity, and manufacturability. This role is fully remote and suited for candidates with hands-on experience in high-speed digital interfaces and multi-layer PCB design. Key Responsibilities Design and layout complex multi-layer PCBs using Altium Designer Interpret schematics and assign/modify net classes based on design guidelines Perform technology selection including: HDI vs standard PCB Stack-up definition Via types and minimum track geometries Create, maintain, and review PCB footprint libraries Execute detailed component placement and routing Perform BGA fan-out (signal and power) Route high-speed and controlled impedance interfaces Required Skills & Experience 5-15 years of hands-on PCB board design experience Expert-level proficiency in Altium Designer Strong experience with high-speed interface layout, including: PCIe Gen 4 or higher DDR5 or higher USB Type-C / USB 3.2 Solid understanding of Power Integrity (PI) and plane impedance targets Experience creating and reviewing PCB footprints Manufacturing & Documentation Expertise

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities which are hard to solve, that only we can pursue, and that matter to the world. This is our life's work, to amplify human inventiveness and intelligence. The NVIDIA System-On-Chip (SOC) group is looking for an entry level ASIC Verification Engineer! In this position you will have the chance to create a high-level and broad impact at NVIDIA working on a system-level IP responsible for measuring performance on multiple projects. Your focus will be on verifying and improving the related verification methodologies for the corresponding design (RTL). For this position, you should have real passion for verification methodologies and implementation that enable high quality system-level IP design and robust verification at multiple environment levels (e.g., unit, sub-system, and SOC). What you'll be doing: Design and maintain the unit level/sub-system Verification environment. Understand the architecture specifications, develop and carry out the test plan to verify the design. Create the UVM components, sequences, tests and scoreboards. Sign off on the verification efforts with very high quality code and functional coverage. Launch regressions, resolve the issues, and make forward progress towards achieving the DV milestone targets Automate the manual steps involved in launching build, regression, and triages. Collaborate with architects, designers, and software engineers to achieve the project goals. Pro-actively contribute to improving the efficiency of the testbenches by embracing the latest techniques. What we need to see: Completing an MS or higher in Computer or Electrical Engineering (or equivalent experience). Experience in System Verilog, UVM and in general OOPS based programming. Strong coding skills in Python or other industry-standard scripting languages. Strong understanding of RTL design (Verilog). Good understanding of computer architecture fundamentals. Familiarity with verification tools such as VCS or equivalent simulation tools, and debug tools like Verdi. With industry-leading salaries and a generous benefits package, we are widely considered to be one of the technology world's most desirable employers. The most forward-thinking engineers in the world do their life's work at NVIDIA. If you're creative and autonomous, with a real passion for technology, we want to hear from you. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 116,000 USD - 189,750 USD for Level 2, and 136,000 USD - 218,500 USD for Level 3. You will also be eligible for equity and benefits. Applications for this job will be accepted at least until January 13, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new opportunities which are hard to solve, that only we can pursue, and that matter to the world. This is our life's work, to amplify human inventiveness and intelligence. The NVIDIA System-On-Chip (SOC) group is looking for an entry level ASIC Verification Engineer! In this position you will have the chance to create a high-level and broad impact at NVIDIA working on a system-level IP responsible for measuring performance on multiple projects. Your focus will be on verifying and improving the related verification methodologies for the corresponding design (RTL). For this position, you should have real passion for verification methodologies and implementation that enable high quality system-level IP design and robust verification at multiple environment levels (e.g., unit, sub-system, and SOC). What you'll be doing: * Design and maintain the unit level/sub-system Verification environment. * Understand the architecture specifications, develop and carry out the test plan to verify the design. * Create the UVM components, sequences, tests and scoreboards. * Sign off on the verification efforts with very high quality code and functional coverage. * Launch regressions, resolve the issues, and make forward progress towards achieving the DV milestone targets * Automate the manual steps involved in launching build, regression, and triages. * Collaborate with architects, designers, and software engineers to achieve the project goals. * Pro-actively contribute to improving the efficiency of the testbenches by embracing the latest techniques. What we need to see: * Completing an MS or higher in Computer or Electrical Engineering (or equivalent experience). * Experience in System Verilog, UVM and in general OOPS based programming. * Strong coding skills in Python or other industry-standard scripting languages. * Strong understanding of RTL design (Verilog). * Good understanding of computer architecture fundamentals. * Familiarity with verification tools such as VCS or equivalent simulation tools, and debug tools like Verdi. With industry-leading salaries and a generous benefits package, we are widely considered to be one of the technology world's most desirable employers. The most forward-thinking engineers in the world do their life's work at NVIDIA. If you're creative and autonomous, with a real passion for technology, we want to hear from you. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 116,000 USD - 189,750 USD for Level 2, and 136,000 USD - 218,500 USD for Level 3. You will also be eligible for equity and benefits. Applications for this job will be accepted at least until January 13, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal processing. Our rockstar team thrives on solving complex challenges with innovative end-user solutions for the world's top consumer brands. Cirrus Logic is also known for its award-winning culture, which was built on a foundation of inclusion and fairness, meaningful community engagement, and delivering enjoyable employee experiences at every turn. But we couldn't do it without our extraordinary workforce - and that's where you come in. Join our team and help us continue to make Cirrus Logic an exceptional place to grow your career! Join our silicon design verification team and work closely with digital/analog designers, applications engineers, and manufacturing test, participating in all aspects of verification for complete mixed-signal IC developments of innovative solutions. You will work on complex verification systems and contribute to improvements in verification methodology while working alongside some of the most talented engineers in our industry. Responsibilities: * Perform verification planning. * Testbench development using UVM methodologies. * Implement functional verification of mixed-signal ASICs. * Failure analysis and resolution, coverage analysis and population. * Digital/mixed-signal modeling. * Develop directed/constraint-random test generation, gate-simulations. * Regression debug support and other flow/infrastructure development. Required Skills and Qualifications: * MS or PhD in Electrical Engineering or Computer Engineering. * Strong background with HDLs (e.g. Verilog, VHDL) and HVLs (e.g. SystemVerilog/UVM, OVM, AVM, Vera). * At least 5+ years of experience in silicon design or verification. Preferred Skills and Qualifications: * Able to work closely with digital/analog designers, applications engineers, and manufacturing test to support both pre-silicon verification and post-silicon validation efforts. * Knowledge of signal processing and Verilog Assertions. * Ability to create, evaluate, debug, and improve verification processes. * Ability to mentor junior engineers in verification methodology. #LI-Hybrid #LI-TM1 #HOTT Export control restrictions based upon applicable laws and regulations would prohibit candidates who are nationals of certain embargoed countries from working in this position without Cirrus Logic first obtaining an export license. Candidates for this role must be able to access technical data without a requirement for an export license. We are unable to sponsor or obtain export licenses for this role. Cirrus Logic strives to select the best qualified applicant for any opening. Different approaches, ideas and points of view are both valued and respected. Employment decisions are made on the basis of job-related criteria without regard to race, color, religion, sex, national origin, age, protected veteran or disabled status, genetic information, or any other classification protected by applicable law.

Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at ************** and on LinkedIn and Twitter (X). Senior Analog Design Engineer Job Description ADI is seeking an experienced analog IC designer to join the SDP Digital Platforms Group. Responsibilities include but are not limited to: Translate system requirements to block level architecture and specification Design analog system and circuits to meet specification Create analog system and circuit models to support digital system verification Collaborate with digital design to integrate analog and digital systems Supervise and provide guidance to the physical layout team Collaborate with test engineering to ensure adequate test coverage Evaluate device in lab environment to validate product specification Analyze ATE characterization data to set test limits and validate product specification Collaborate with application team to develop eval boards and application software Participate in root cause analysis of customer returns and functional issues As an analog IC designer, your focus will be on analog circuit definition, and design. Additionally, you will have the opportunity to be involved in all phases of the product development cycle including product definition, digital integration, production test, software development, and customer support. A successful candidate must possess the skills to implement mixed signal systems as well as extensive hands-on experience utilizing lab equipment for system and test verification (oscilloscope, spectrum analyzer, logic analyzer, power supplies, etc.). Job Requirements Minimum Requirements BSEE with 4+ years analog IC design experience Knowledge and experience in designing ADC, DAC, voltage reference, operational amplifier, switched-capacitor, voltage regulator, oscillators Knowledge of circuit layout techniques Strong written and verbal communication skills Preferred Qualifications Proficient in custom digital design For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position - except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) - may have to go through an export licensing review process. Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group. EEO is the Law: Notice of Applicant Rights Under the Law. Job Req Type: ExperiencedRequired Travel: Yes, 10% of the time Shift Type: 1st Shift/Days

Our work at NVIDIA is dedicated towards a computing model focused on visual and AI computing. For two decades, NVIDIA has pioneered visual computing, the art and science of computer graphics, with our invention of the GPU. The GPU has also shown to be spectacularly effective at solving some of the most complex problems in computer science. Today, NVIDIA's GPU simulates human intelligence, running deep learning algorithms and acting as the brain of computers, robots and self-driving cars that can perceive and understand the world. We are looking to grow our company and teams with the smartest people in the world and there has never been a more exciting time to join our team! We are now looking for a Verification Engineer - New College Grad. As a Verification Engineer at NVIDIA, you will verify the design and implementation of our state of the art memory subsystem for our mobile SoCs and GPUs. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. What you'll be doing: * In this position, you will be responsible for verification of memory subsystem or coherent high speed interconnect design, architecture, golden models and micro-architecture using advanced verification methodologies. * As a member of our verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), execute test/coverage plans, and verify the correctness of the design. * Collaborate with architects, designers, emulation and silicon verification teams to accomplish your tasks. What we need to see: * Completing or recently completed a Bachelors or Masters Degree in Electrical Engineering, Computer Engineering or related field (or equivalent experience) * Experience in architecting test bench environments for unit level verification. * Exposure to verification using random stimulus along with functional coverage and assertion-based verification methodologies. * Prior Design or Verification experience of dynamic memory controllers or coherent high speed interconnects. * C++ programming language experience, scripting ability and an expertise in System Verilog. * Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB). * Strong debugging and analytical skills. * Strong communication and interpersonal skills are required. NVIDIA is widely considered to be one of the technology world's most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you! Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 116,000 USD - 189,750 USD for Level 2, and 136,000 USD - 218,500 USD for Level 3. You will also be eligible for equity and benefits. Applications for this job will be accepted at least until January 17, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

We are looking for a Senior ASIC Design Engineer to join our Switch Silicon team. As a Design Engineer at NVIDIA, you'll join a group of hardworking engineers developing the next generation, groundbreaking Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! What you'll be doing: * As a key member of our Switch design team, you will implement, document and deliver high performance, area and power efficient RTL to achieve design targets and specifications. * Analyze architectural trade-offs based on features, performance requirements and system limitations. * Craft micro-architecture, implement in RTL, and deliver a fully verified, synthesis/timing clean design. * Collaborate with architects, verification engineers, formal engineers, physical design engineers, and software engineers to accomplish your goals. What we need to see: * Bachelors or Master's Degree or equivalent experience in Electrical Engineering or Computer Engineering. * 8+ years of relevant work experience. * Experience in micro-architecture and RTL development (Verilog and/or SystemVerilog), with a focus on high bandwidth data paths. * A deep understanding of ASIC design flows including RTL design, verification, logic synthesis and timing analysis. * Strong interpersonal skills and an excellent teammate. Ways to stand out from the crowd: * Proven experience in switching silicon and high bandwidth data path design. This includes data movement, arbitration, scheduling, and link list based designs. * Knowledge of networking protocols and networking architectural concepts * Good debugging and analytical skills. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5. You will also be eligible for equity and benefits. Applications for this job will be accepted at least until January 13, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

Join the NVIDIA System-On-Chip (SOC) group as an ASIC Design Engineer and make a broad impact. You will focus on improving methodologies and delivering system-level IP to measure performance across multiple projects! NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology-and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent. As an NVIDIAN, you'll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world! What you'll be doing: * Be an integral part of the team defining, developing, and delivering system-level methodologies and RTL to measure performance on the industry's leading GPUs and SOCs * Define, develop, and automate flows and methodologies to efficiently build, deliver, and support a system-level IP * Deliver IP and support projects by applying the performance monitoring system * Run and debug RTL checks to ensure design quality (e.g., cross clock domains (CDC), clocks, reset, latency, and more) * Design and implement RTL features (microarchitecture and RTL) * Work with architects, designers, and software engineers to accomplish your tasks What we need to see: * BS or equivalent experience in Electrical Engineering, Computer Engineer, or related degree required, advanced degrees (MS, PhD) a plus * 3+ years of relevant industry experience and strong coding skills in Perl/Python or other industry-standard scripting languages * Experience in RTL design (Verilog), verification (SystemVerilog), System-On-Chip design/implementation flow, and design automation * Good understanding of SOC architecture, including CDC, multiple-power domains, performance analysis, latency, and data flow * Excellent debugging and analytical skills * Exposure to design and verification tools (dc_shell or equivalent synthesis tools, VCS or equivalent simulation tools, debug tools like Debussy, GDB) * Great communication and collaboration skills to interact within the team and with cross-functional teams Ways to stand out from the crowd: * Hands on experience in object-oriented programming * Prior design on system level IP (Clocks/DFT/Resets) * Experience developing methodologies used by others * Hands- on silicon debug is a plus. * Exposure to physical design With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world's most desirable employers. We have some of the most brilliant people in the world working for us and, due to unprecedented growth, our teams are rapidly growing. Are you passionate about becoming a part of a best-in-class team supporting the latest in GPU and AI technology? If so, we want to hear from you. #LI-Hybrid Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4. You will also be eligible for equity and benefits. Applications for this job will be accepted at least until January 19, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: AMD is seeking a passionate and talented Sr. Formal Verification Engineer to join our dynamic GFXIP (Graphics IP) Formal Verification team. This role offers you the chance to work with some of the most talented formal verification experts in the industry, applying cutting-edge formal techniques to verify our complex GPU designs. This is an excellent opportunity for a recent graduate or early-career professional to grow their skills in a collaborative and innovative environment. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: * Drive formal verification execution with support from FV tech leads for GFX-IP blocks * Collaborate with design and architecture teams to understand design specifications and develop verification requirements * Utilize formal techniques to build comprehensive testbenches, striving for better convergence of formal proof * Debug testbench and/or design issues using formal tools and provide feedback for design improvements * Responsible for verification quality metrics like pass rates, code/functional coverage and proof convergence * Document formal verification processes, findings, and best practices * Continuously learn and stay abreast of advancements in formal verification and related technologies PREFERRED EXPERIENCE: * Good understanding of computer organization/architecture * Knowledge of scripting languages such as Python or TCL * Internship or project experience in digital design or verification * Experience or familiarity with formal tools and/or functional verification tools from Synopsys, Cadence or Mentor Graphics ACADEMIC CREDENTIALS: * Undergrad degree required. Bachelors or Masters degree in computer engineering/Electrical Engineering preferred This role is not eligible for Visa sponsorship. #LI-BM1 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here. This posting is for an existing vacancy.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. The Role: The Infinity Fabric network on the chip verification team is growing and looking for qualified candidates to help verify our configurable switches and die-to-die interconnect. Infinity Fabric is part of every new AMD product being developed for AI/ML, Client, Server, Graphic Accelerator, and Semi-Custom markets. The Person: The preferred candidate will have proven experience verifying complex design blocks at the IP or SoC level using SystemVerilog/UVM or related technologies. He or she should be comfortable creating and executing on testplans in collaboration with design and verification colleagues in a metric-focused environment. Key Responsibilities: * Develop and enhance SystemVerilog / UVM-based testbenches to verify new features for client, server, graphics, and semi-custom interconnects. * Develop and enhance BFM/UVC for industry-wide and AMD internal protocols. * Collaborate with architects, hardware engineers and multiple IP development groups. * Interact with architects, RTL designers, performance engineers, and post-silicon validation engineers to develop deep expertise in the Infinity Fabric architecture. * Mentor junior engineers. Preferred Experience: * Architected and developed complex verification environments in SystemVerilog or C++ and infrastructure, including scripting using Perl, Ruby, Make, or the likes. * Experience in developing or refactoring testbench, UVC, or BFM code using Object-Oriented Programming (OOP) principles. * Exposure to RTL design, software development, formal verification, or other related domains. * 7-12 years industry experience is preferred. Academic Credentials: BS or MS degree in Electrical Engineering, Computer Engineering, or Computer Science. Location: Austin, TX #LI-MR1 #LI-Hybrid Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here. This posting is for an existing vacancy.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: AMD is looking for talented, detail-oriented and motivated design verification engineers who are interested in functional verification of x86 microprocessor cores. You'll have the unique opportunity to work on and learn about some of the industry's cutting edge micro-architectural designs while you create verification models and plans for verifying the architecture of the X86 CPU core. Your contributions will impact products that span the global x86 market from server to desktop and laptop designs. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You approach challenges relentlessly with both critical thinking and creativity. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: * Defining and implementing golden reference architectural models of X86 instructions in an instruction set reference model. * Enabling tools and flows to deliver instruction set reference models to core verification teams and as documentation into X86 architectural manuals. * Working with core architects regarding specifications for new ISA instructions and other customer visible features added to the CPU core. * Writing instruction set reference model code using programming languages (C++/Python etc.) with ability to support new ISA features over CPU core generations and core variants in a generation. * Defining and implementing plans including stimulus, checking and functional coverage plans for instruction set reference model testing. * Debugging regression fails and fixing verification issues. * Providing tools for architectural coverage models based on the instruction set reference model. * Developing stimulus with x86 Assembly and/or AMD's internal ISA exercisers. * Writing X86 assembly tests or using random exerciser tests to test instruction set reference model. * Ability to model architectural and micro-architectural details at various levels of abstraction. * Analyzing functional coverage and closing holes. PREFERRED EXPERIENCE: * Strong knowledge of microprocessor architecture. * Demonstrated experience with x86 or ARM Architecture (ISA) * A passion for computer architecture and a good understanding of modern out-of-order superscalar processor architecture. * Good software architecture, programming and scripting abilities with C, C++, Python, Ruby, Perl. * Hands-on work in C++ programming for either hardware modeling or testbench development or projects of similar scope and complexity * Simulation and debug with a Verilog based functional simulator. * x86 Assembly language * Knowledge of tools and techniques to represent and analyze data. * General functional verification experience with digital designs. * Working experience in UNIX software environment. * Strong problem-solving and debugging skills in both pre- and post-silicon environments. ACADEMIC CREDENTIALS: * BS, MS, or PhD degree in Electrical, Computer Engineering, or related field of study. LOCATION: * Austin, TX #LI-MR1 #LI-Hybrid Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here. This posting is for an existing vacancy.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: The Infinity Fabric transport layer verification team is looking for a primary pre-silicon verification engineer to help verify our configurable switches and die-to-die interconnect. Infinity Fabric is part of every new AMD product being developed across AI, Client, Server, Graphics, and Semi-Custom markets. Our growing team is in need of additional experienced senior engineering to help us enhance our configurable testbench and to mentor junior engineers. THE PERSON: The preferred candidate will have proven experience verifying complex design blocks at the IP or SoC level using SystemVerilog/UVM or related technologies. He or she should be comfortable creating and executing on test plans in collaboration with design and verification colleagues in a metric-focused environment. And a track record of technically leading verification teams in the execution of silicon design and verification closure. KEY RESPONSIBILITIES: * Create project schedules and staging plans for new feature development * Develop and enhance SystemVerilog / UVM-based testbenches to verify new features for AI & Server products. * Interact with architects, RTL designers, performance engineers, and post-silicon validation engineers to develop deep expertise in the Infinity Fabric architecture. * Lead a team of verification engineers to execute in the verification of new features within project schedules. * Communicate and interact with project management to stage new feature development per the larger infinity fabric development * Mentor verification engineers. PREFERRED EXPERIENCE: * Extensive industry experience is preferred. * Outstanding foundation in Systems & SoC architecture, with expertise in one or more of the following: CPU or GPU, Memory sub-system, Fabrics, CPU/GPU coherency, Multimedia, or I/O subsystems * Architected and developed complex verification environments in SystemVerilog or C++ and infrastructure, including scripting using Perl, Ruby, Make, or the likes. * Have personally implemented verfication tests, sequences, scoreboards, checkers, assertions and coverage groups. * Led groups in complete verification process including closing coverage and tracking bug rates * Exposure to RTL design, software development, formal verification, or other related domains. * Excellent communication, management, and presentation skills. ACADEMIC CREDENTIALS: * Master's degree in related discipline preferred LOCATION: Austin, TX This role is not eligible for visa sponsorship. #LI-MF2 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here. This posting is for an existing vacancy.

What you do at AMD changes everything We care deeply about transforming lives with AMD technology to enrich our industry, our communities and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence, while being direct, humble, collaborative and inclusive of diverse perspectives. This is who we are at our best. One Company. One Team. AMD together we advance_ Design Verification Engineer - Graphics IP THE ROLE: The focus of this role is to plan, create, and maintain the functional verification model used to verify new and existing features for AMD's graphics processor IP, resulting in no bugs in the final design. THE PERSON: An analytical thinker with problem-solving skills and excellent attention to detail Possesses excellent comprehension, communication, and interpersonal skills Enjoys working in a fast-paced, multi-project team environment using state of the art tools and technology KEY RESPONSIBILITIES: Collaborate with architects, hardware engineers, and firmware engineers to understand the new features being implemented Plan and implement the required changes to the fuctional model so that the model accurately represents the new and modified hardware Work with the architecture modeling team to incorporate the updated functional model in the performance model Participate in debugging failing verification tests to determine if the root cause is an error in the RTL, verification model, or the test. Fix all identified failures in the verification model. PREFERRED EXPERIENCE: Strong C/C++ programming and debug in a Linux environment Knowledge of ASIC design and functional modeling Graphics pipeline knowledge a plus Proficiency in debugging RTL code using simulation tools a plus Proficient in using UVM testbenchs a plus Experienced with Verilog, System Verilog a plus ACADEMIC CREDENTIALS: BS/MS degree in Electrical Engineering, Computer Engineering, or Computer Science LOCATION: This position is located in Austin, TX #LI-PH1 Requisition Number: 183227 Country: United States State: Texas City: Austin Job Function: Design Benefits offered are described here. AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: As a Silicon Design Verification Engineer, you will work with graphics designers to verify AMD graphics logics and drive convergence. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: * Write tests, sequences, and testbench components in SystemVerilog and UVM along with formal to achieve verification of the design * Responsible for verification quality metrics like pass rates, code coverage and functional coverage * Drive formal verification for the block and write formal properties and assertions to verify the design * Coordinate with RTL engineers to implement logic design for better clock gating and verify the various aspects of the design PREFERRED EXPERIENCE: * Hands on experience with UVM, test-bench, coverage etc * Project level experience with design concepts and verifications * Experience or familiarity with formal tools and/or functional verification tools by VCS, Cadence, Mentor Graphics * Good understanding of computer architecture ACADEMIC CREDENTIALS: * Bachelors or Masters degree in computer engineering/Electrical Engineering This role is not eligible for visa sponsorship. #LI-HYBRID #LI-SL2 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here. This posting is for an existing vacancy.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: This is a technical position. Be part of the world's leading Design Verification Methodology team developing applications for functional and behavior verification of state-of-the-art graphics accelerators, generative AI (Artificial Intelligence) accelerators, servers, and Systems on Chips (SoCs). In this role, you will be analyzing methodology flows and data, identify the pain points in various design, pre and post Silicon verification efforts, and adapt this methodology to address these pain points. Also, as the designs and their methodologies mature, you will be ensuring methodologies evolve to match up scalability. You will coordinate with Hardware Architects, Logic Designers, experts, and technical leaders from various validation teams, to tackle functional issues present in the proposed methodology and tool. THE PERSON: * Will demonstrate strong analytical thinking and problem-solving skills with excellent attention to detail. * Will have effective communication and writing skills, * Will have good teamwork and interpersonal skills, . KEY RESPONSIBILITIES: * Deploying Industry-Leading Verification Methodologies such as UVM and Formal Verification. * Driving technical innovation to improve AMD's capabilities in IP validation/verification, including tool and script development, technical and procedural methodology improvement, and various internal and cross-functional technical initiatives. * Developing Testbenches and Verification Components such as UVCs, models, BFMs, and Re-usable Verification Environments. * Working closely with supporting teams in design, diagnostics, emulation, firmware, and driver to adopt and deploy new verification methodologies and tools. PREFERRED EXPERIENCE: * DV planning for Metric Driven Verification and TB architecture. * Deep knowledge of DV infrastructure, Make flow and other automation flows, shell, Perl, python, ruby. * Machine Learning is a plus. * Prior experience with System Verilog HVL and UVM methodology is a plus * Familiarity with emulation and post-Si validation is a plus. ACADEMIC CREDENTIALS: * Bachelor, Master or PhD in Electrical Engineering, Computer Engineering or Computer Science. LOCATIONS: * Austin, TX #LI-SL3 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here. This posting is for an existing vacancy.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: The Memory Subsystem team is hiring Verification Engineers to contribute to the definition, design, and development of high-speed LPDDR/DDR memory subsystem solutions and associated IP. This role includes verification across multiple product lines and pre-silicon production-level firmware co-verification using hybrid co-simulation environments and Universal Verification Methodology (UVM). THE PERSON: In this role, you will design and implement advanced verification environments for memory subsystems and associated IP using System Verilog and UVM methodologies. You will develop and maintain test benches, co-verification frameworks, and test suites aligned with evolving firmware features, ensuring comprehensive coverage and robust verification from IP and subsystem levels through production. Responsibilities include integrating and debugging Memory VIP, analyzing coverage metrics, managing regressions, and collaborating with cross-functional teams to deliver end-to-end verification solutions. You will also adapt to new tools and frameworks, contribute improvements, and document results to support efficient and scalable verification processes. KEY RESPONSIBILITES: * Proficiency in C/C++, System Verilog, UVM (object-oriented design), and scripting languages (e.g., Python, shell) * Experience in IP and subsystem verification with System Verilog/UVM and VCS * Background in testbench architecture, microarchitecture, and co-verification with firmware * Knowledge of code and functional coverage and how test plans map to cover goals * Ability to design and debug co-verification environments for production-level firmware * Experience developing transactor-based stimulus and maintaining test suites as features evolve * Ability to learn new toolsets/frameworks and contribute updates PREFERRED EXPERIENCE: * Experience building monitors/checkers and developing SVA/OVL and synthesizable assertions * Verification experience with DDR/JEDEC standard IP, DDR PHY, or Memory Controllers * Experience verifying subsystems/components and applying methodologies to achieve subsystem verification * Familiarity with architectural models and SystemC * Experience with Zebu emulation for verification and debug * Firmware/hardware co-verification using UVM System Verilog, C-DPI, and gasket‑structured testbenches * Memory VIP integration, bring-up, and debug * End-to-end verification experience from front-end through lab bring-up. * Understanding of synchronization techniques (e.g., handshakes, message passing) and hardware-level clocking, including multi-domain simulation synchronization * Experience with Git and Perforce * Managing regressions and coverage databases * SoC IP knowledge and a high-level understanding of the role and interfaces of each IP ACADEMIC CREDENTIALS: * Bachelors or master's in electrical engineering, Computer Engineering, Computer Science, or a related field or equivalent practical experience in verification engineering. LOCATION: Austin, TX or Raleigh, NC This role is not eligible for Visa sponsorship. #LI-DP1 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here. This posting is for an existing vacancy.

For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal processing. Our rockstar team thrives on solving complex challenges with innovative end-user solutions for the world's top consumer brands. Cirrus Logic is also known for its award-winning culture, which was built on a foundation of inclusion and fairness, meaningful community engagement, and delivering enjoyable employee experiences at every turn. But we couldn't do it without our extraordinary workforce - and that's where you come in. Join our team and help us continue to make Cirrus Logic an exceptional place to grow your career! As a Platform Hardware Engineer at Cirrus Logic, you will be a key technical owner of the printed circuit boards (PCBs) that integrate our cutting-edge audio and mixed-signal silicon into customer platforms. You will leverage your expertise in signal and power integrity to deliver robust, high-performance hardware solutions that meet the demanding acoustic and power efficiency requirements of top global brands. You will collaborate cross-functionally with internal development teams, customers, and partners to turn concepts into validated, scalable platforms. Responsibilities * End-to-End Design Leadership: Lead complex PCB design efforts from initial concept and requirements definition through production release, including schematic capture and rigorous design reviews. * Integrity Analysis Ownership: Take ownership of signal integrity (SI), power integrity (PI), and thermal analysis for platform boards to ensure optimal performance and reliability under strenuous conditions. * Cross-Functional Requirements: Collaborate closely with customers, partners, and internal teams (Silicon, Firmware, and Marketing) to define detailed board-level requirements, constraints, and feature set. * Bring-Up & Debug: Drive the lab bring-up, validation, and comprehensive testing of prototype boards, including advanced debug and root cause analysis of hardware and system-level issues. * System Integration Support: Provide expert hardware support during platform integration into customer systems and quickly resolve complex field issues as needed. * Compliance & Documentation: Ensure designs adhere to stringent IPC standards and industry guidelines, maintaining meticulous documentation and revision control for all platform designs. * Architectural Contribution: Contribute actively to system architecture discussions and offer support based on specialized experience level. Required Skills and Qualifications * Education: Bachelor's degree in Electrical Engineering and a minimum of 3 years of experience. * PCB Proficiency: Strong, demonstrable proficiency in professional PCB design tools (e.g., Altium Designer, Cadence Allegro, etc.). * High-Speed Fundamentals: Solid understanding of high-speed digital design, best-in-class analog layout practices, and the challenges inherent in mixed-signal systems. * Lab Validation: Practical, hands-on experience using lab equipment for board validation and debug, including oscilloscopes, spectrum analyzers, and logic analyzers. * EMC/EMI Mitigation: Proven familiarity with EMC/EMI mitigation techniques and experience supporting compliance testing. * Design Standards: Ability to interpret and apply strict IPC standards and relevant industry design guidelines. * Problem Solving: Excellent critical thinking, problem-solving skills, and meticulous attention to detail. * Communication: Strong verbal and written communication abilities for collaborating with cross-functional technical teams. Preferred Skills and Qualifications * Specialized Domain Experience: Experience with high-performance audio systems, codecs, Class-D amplifiers, or DC/DC power converters. * Advanced Simulation: Experience with specialized tools for SI/PI analysis (e.g., HyperLynx) or layout tools (e.g., Xpedition). * System Knowledge: Knowledge of embedded systems and key microcontroller interfaces (e.g., I2C, SPI, UART). * Product Context: Prior experience working with Original Design Manufacturers (ODMs) or within the demanding pace of the consumer electronics market. * Thermal Constraints: Familiarity with thermal modeling and managing mechanical constraints in compact, high-density form factors. #LI-Hybrid #LI-CC1 Export control restrictions based upon applicable laws and regulations would prohibit candidates who are nationals of certain embargoed countries from working in this position without Cirrus Logic first obtaining an export license. Candidates for this role must be able to access technical data without a requirement for an export license. We are unable to sponsor or obtain export licenses for this role. Cirrus Logic strives to select the best qualified applicant for any opening. Different approaches, ideas and points of view are both valued and respected. Employment decisions are made on the basis of job-related criteria without regard to race, color, religion, sex, national origin, age, protected veteran or disabled status, genetic information, or any other classification protected by applicable law.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: The Hardware Engineering Team plays a crucial role in shaping the company's technology platform and ensuring the successful development of hardware components that contribute to the organization's overall success. This role involves driving hardware design initiatives, supporting first silicon readiness, and ensuring seamless execution from concept through production. THE PERSON: The ideal candidate is a technically strong hardware engineer who thrives in collaborative environments, brings deep expertise in SI/PI and high-speed board design, and can drive hardware programs from concept through production. They are proactive, detail-oriented, and committed to delivering high-quality hardware solutions on schedule. KEY RESPONSIBILITIES: * ATE Hardware Development Lead core aspects of the hardware design process from concept to production. Ensure delivery of high-quality, innovative hardware solutions meeting performance, reliability, and cost goals. Drive qualification, characterization, and pattern development efforts across engineering teams. * Technical Expertise Provide deep technical guidance and subject-matter expertise in hardware design, with emphasis on Signal Integrity (SI) and Power Integrity (PI). Offer hands-on support during bring-up, validation, and troubleshooting of ATE/bench hardware. * Budget and Resource Management Support planning and management of project budgets. Allocate engineering resources effectively and optimize workflows to meet program timelines and financial targets. * Cross-Functional Collaboration Collaborate with product, qualification, characterization, engineering, program management, NPI, and production test teams. Ensure seamless integration of hardware components across ATE and bench platforms. * Vendor Management Work with external suppliers and vendors to source components and materials. Negotiate contracts and maintain strong relationships to ensure successful hardware delivery. * Technology Trends Stay current on industry trends, emerging technologies, and best practices in hardware design and drive innovation and maintain a competitive edge on the company's hardware platforms. PREFERRED EXPERIENCE: * Strong experience across PCB schematic and layout design. * Proficiency in Cadence Allegro and Capture CIS tools. * PCB design Experience on ATE platform preferably 93K * SI/PI simulation using Cadence Sigrity, Ansys SIwave, and HFSS 3D simulation tools. * Understand industrial standards: bus specifications (PCI Express, AGP), SSTL, G/DDR2/3/5, I2C, high-speed/digital interfaces (TMDS, DP, HDMI, DVI), and video standards (VESA, Composite, S-Video and Component Video) * Logic analyzers, voltmeters, oscilloscopes, hardware bring-up and debug * Solid understanding of transistors and computer basics * Experience in MS Excel. * Experience in Python programming is preferred. ACADEMIC CREDENTIALS: * Courses in computer science, software engineering, digital logic, circuit theory, computer architecture LOCATION: Austin, TX This role is not eligible for Visa sponsorship. #LI-TW2 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here. This posting is for an existing vacancy.