Architect jobs at Broadcom - 92 jobs

Introduction A career in IBM Consulting is rooted by long-term relationships and close collaboration with clients across the globe. You'll work with visionaries across multiple industries to improve the hybrid cloud and AI journey for the most innovative and valuable companies in the world. Your ability to accelerate impact and make meaningful change for your clients is enabled by our strategic partner ecosystem and our robust technology platforms across the IBM portfolio Your role and responsibilities Support client engagements to provide subject matter expertise in Oracle Cloud Financials implementations. Assume accountability for the solution design and the successful implementation of the full solution for on Oracle Cloud ERP Projects. May include hands‑on development, design, prototyping and/or other efforts required to keep the project on a successful track. Ensure that the proposed solution meets the client's requirements, is architecturally complete, and all architectural risks are quantified within their assigned area. Required technical and professional expertise 10+ years ERP implementation experience Played a Senior Solution Architect role on a minimum of 2 full lifecycle Oracle Cloud implementation projects in the USA Public Sector domain (city/state/local/county government) experience considered an asset Knowledge and experience in GASB Accounting and Reporting, Encumbrance Accounting, Fund Accounting, Projects and Grants Accounting and Management IBM is committed to creating a diverse environment and is proud to be an equal‑opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, gender, gender identity or expression, sexual orientation, national origin, caste, genetics, pregnancy, disability, neurodivergence, age, veteran status, or other characteristics. IBM is also committed to compliance with all fair employment practices regarding citizenship and immigration status. #J-18808-Ljbffr

A leading consulting firm is seeking a Senior Oracle Cloud Financials Solution Architect to join their team. In this pivotal role, you will lead client engagements, design and implement Oracle ERP solutions, and ensure successful adoption of technology. The ideal candidate will have over 10 years of ERP experience, having successfully led full lifecycle Oracle projects. A Bachelor's degree is required, along with strong communication skills and the ability to work in a fast-paced environment. This is a full-time position based in the United States. #J-18808-Ljbffr

A global consulting firm is seeking a Senior Solution Architect specializing in Oracle Cloud Financials in San Francisco. The role requires over 10 years of ERP implementation experience with at least two full lifecycle Oracle Cloud projects. A background in the Public Sector and knowledge of GASB Accounting are advantageous. This position offers an opportunity to work with innovative companies and make a significant impact on their cloud journeys. #J-18808-Ljbffr

Introduction A career in IBM Consulting is built on long‑term client relationships and close collaboration worldwide. You'll work with leading companies across industries, helping them shape their hybrid cloud and AI journeys. With support from our strategic partners, robust IBM technology, and Red Hat, you'll have the tools to drive meaningful change and accelerate client impact. At IBM Consulting, curiosity fuels success. You'll be encouraged to challenge the norm, explore new ideas, and create innovative solutions that deliver real results. Our culture of growth and empathy focuses on your long‑term career development while valuing your unique skills and experiences. Your role and responsibilities Currently, we are looking for a Senior Oracle Cloud Financials Solution Architect to join our team. This is a key role playing an integral part in our growing Oracle ERP practice. This is a full‑time position that can sit anywhere in the United States. Must be willing to travel to support clients onsite as needed. The ideal candidate will have operated in a senior Architect capacity previously, is someone who can anticipate needs and take action to drive deliverables for continued project success. This position needs a leader who will not only architect solutions on implementations but also be part of a senior task force to help the practice grow. This includes maximizing sales opportunities by architecting and acting as the lead in creating Proposals, presenting and implementing Oracle ERP Cloud solutions to potential customers. The individual should be able to play multiple roles, be able to work in a very fast‑paced, enriching environment and is looking for a career rather than just a job. What You'll Do: The Solution Architect is responsible for the overall solution identification and architectural design for assigned projects and initiatives. Key responsibilities of the role are as follows: Support client engagements to provide subject matter expertise in Oracle Cloud Financials implementations. Assume accountability for the solution design and the successful implementation of the full solution for on Oracle Cloud ERP Projects. May include hands‑on development, design, prototyping and/or other efforts required to keep the project on a successful track. Ensure that the proposed solution meets the client's requirements, is architecturally complete, and all architectural risks are quantified within their assigned area. Ensures that the solution aligns with and utilizes the portfolio offerings that result in profitable revenue growth. Work with client stakeholders to evaluate the solution requirements and supports the management and traceability of requirements during the engagement Review Customer's current process and the requirement and design customer specific solutions based on industry specific best practices Act as a technical interface to the client and assumes a proactive role for developing business opportunities. Lead implementation team in the execution of testing cycles including ensuring the completeness in the development of testing scenarios, test cases and test scripts. Implements quality solutions that meet the requirements and advises clients on AST offerings, strategy, designs, implementation approaches and alternatives / tradeoffs. Work with Project Manager and provide input to the project plan and work breakdown structure and assist in managing timelines and milestones to ensure timely completion of all deliverables Identify opportunities for new or follow‑on business and assists in creating change orders. Provide thought leadership to the growth of the Practice Participate in strategic planning activities and business case development. Participate in strategy presentations to clients including features, implementation approach, technical requirements, impacts, and benefits. Perform responsibilities including solution proposal management, solution design, solution review, risk analysis, proposal preparation and client presentations. Provide technical oversight for technical estimates created with standards tools, portfolio Work Breakdown Structures, statements of work and industry standard estimating techniques. Assumes a proactive role for developing business opportunities. Assists in presales cycles by creating architectural demo's, effort estimates and proposal development. Maintains knowledge of technologies, industry trends, standards and design techniques. Required technical and professional expertise 10+ years ERP implementation experience Played a Senior Solution Architect role on a minimum of 2 full lifecycle Oracle Cloud implementation projects in the USA Public Sector domain (city/state/local/county government) experience considered an asset Knowledge and experience in GASB Accounting and Reporting, Encumbrance Accounting, Fund Accounting, Projects and Grants Accounting and Management Hands‑on technologist with strong background in designing and building modular, scalable, testable enterprise systems in in Oracle Cloud Financials Ideal to have project exposure to other Cloud module areas such as: Supply Chain and HCM Applications Ability to work in a fast‑paced environment with a diverse group of people Capability to work independently, take initiative with minimal supervision yet can participate as a team member with a willingness to help where needed Excellent verbal and written communication skills, including ability to communicate clearly and concisely to all audiences of all levels, spanning from technical peers to executive management Organized and detailed oriented Ability to fully utilize Microsoft Office (Word, Excel, PowerPoint) Ability to adapt to new projects quickly with a can‑do, jump‑right‑in attitude Ability to work on multiple projects concurrently 4‑year Bachelor degree (or equivalent experience) IBM is committed to creating a diverse environment and is proud to be an equal‑opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, gender, gender identity or expression, sexual orientation, national origin, caste, genetics, pregnancy, disability, neurodivergence, age, veteran status, or other characteristics. IBM is also committed to compliance with all fair employment practices regarding citizenship and immigration status. #J-18808-Ljbffr

A leading semiconductor company in California is looking for a Senior Silicon Design Verification Engineer to innovate in the verification of high-speed Crypto and Network-on-Chip designs. You will lead a team, develop verification strategies, and collaborate with cross-functional engineering teams. The ideal candidate has a strong leadership background, is proficient in UVM and System Verilog, and has a passion for fostering a collaborative environment. The role requires a relevant degree and strong communication skills. Competitive benefits are included. #J-18808-Ljbffr

Are you a problem solver looking for a hands-on internship position with a market-leading company that will help develop your career and reward you intellectually and professionally? Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at ************** and on LinkedIn and Twitter (X). At ADI, you will learn from the brightest minds who are here to help you grow and succeed. During your internship, you will make an impact through work on meaningful projects alongside a team of experts. Collaborating with colleagues in an environment of respect and responsibility, you will create connections that will become a part of your professional network. ADI's culture values aligned goals, work-life balance, continuous and life-long learning opportunities, and shared rewards. The internship program features various lunch-and-learn topics and social events with other interns and full-time employees. At ADI, our goal is to develop our interns so they are the first to be considered for full-time roles. Apply now for the opportunity to grow your career and help innovate ahead of what's possible. The Architectural Design Team seeking a motivated, experienced Design Intern to provide support to our Facilities located at ADI's Rio Robles office. The candidate will have the opportunity to support a small-sized architectural design team that includes both individual contributors and managers. The team culture is highly collaborative and promotes open communication, allowing for a positive and inclusive work environment. Being a part of this team offers unique opportunities to work on diverse projects and contribute to the design process, ultimately helping to improve facilities on site. Responsibilities include, but not limited to: Assist in the creation of architectural drawings and documentation Conduct on-site verification and measurement Prepare and present design proposals Ensure compliance with building codes and regulations Maintain the material library Minimum qualifications Basic CAD drafting skills Proficiency in MS Office, Word, Excel and Outlook Basic proficiency in 3D Modeling software (Sketchup) Ability to communicate both verbally and in writing. Preferred qualifications Currently enrolled in an architecture or interior design program Previous internship in an architectural or interiors design firm preferred Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group. For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position - except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) - may have to go through an export licensing review process. Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group. EEO is the Law: Notice of Applicant Rights Under the Law. Job Req Type: Internship/CooperativeRequired Travel: NoThe expected wage range for a new hire into this position is $25 to $46. Actual wage offered may vary depending on work location, experience, education, training, external market data, internal pay equity, or other bona fide factors.

What you do at AMD changes everything At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies - building blocks for gaming, immersive platforms, and the data center. Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to take a look at the opportunities available to come join our team. HPC/ML GPU Performance Architect: AMD is looking for an outstanding technical contributor & lead to help optimize performance of AMD based next-generation GPU accelerators for HPC and Machine Learning. As a passionate and dedicated Server GPU Performance Architect in the MI SOC Architecture Team, you will optimize SOC performance by identifying opportunities across all parts of system architecture, spanning the application and related frameworks, driver, GPU core, memory & I/O subsystems. You will collect and analyze performance profiling data and traces to isolate performance bottlenecks, and share the insights to help drive features into the next generation of server GPUs and software stack components. The ideal candidate is expected to be well informed on latest trends in GPU accelerated HPC and ML, and be able to quickly ascertain, in a data-driven manner, how next generation server GPUs and platforms should be engineered to support those needs. Key Responsibilities: • Establishes and maintains AMD's technological leadership position • Considered technical leader across project and departmental boundaries and has a proven track record for sustained innovation. • Is responsible for projects or processes of significant strategic or commercial importance and for project/program results • Deals with problems requiring cutting edge approaches and champions innovation across the organization • Makes technical decisions that have a significant impact on product families, go to market strategies and customer satisfaction • Has business and technical time horizon of generally 6 to 36 months. • Accountability on project execution with significant influence on project/product time-tomarket schedules. • Provides consultative direction with senior management • Coaches and mentors experienced staff • Represents AMD to the outside technical community, partners and vendors • Work closely with other team members to understand design architecture and to propose solutions to improve/enhance performance with given SoC/IP and markets. • Architectural modeling, performance triage, deeper analysis, identifying bottlenecks working with architects and proposing solutions for performance improvement. • Developing tools and methodology for performance modeling, workloads analysis. • Proposing, communicating and implementing solutions to issues. • Lead technical teams, participate and present in executive reviews on product planning and execution. • Participate in collaborative development and workload performance optimization with AMD's partners/customers. Position Requirements: • Exceptional foundation in systems architecture, cutting across CPU or GPU, memory, storage and I/O subsystems • Power user of performance profiling tools • Experience with hardware performance counter monitoring tools • Knowledge of OS internals and kernel parameter tuning experience • Exposure to GPU accelerator performance benchmarks and codes are a plus (HPL, HPCG, STREAM, MLPerf, HACC, QMCPACK, LAMMPS, etc.) • Excellent communication skills (verbal, written, and presentation) • > 7 years relevant industry experience Education Requirements: Master's degree required, PhD preferred, emphasis in Electrical or Computer Engineering, Computer Architecture, or Computer Science with SoC/IP performance studies. AMD is a government contractor and subcontractor. As required by Executive Order, our US employees are required to be fully vaccinated against COVID-19 regardless of the employee's work location or work arrangement (e.g., telework, remote work, etc.), subject to such exceptions as required by law. If selected, you will be required to be vaccinated against COVID-19 and submit documentation of proof of vaccination by January 4, 2022 . AMD will provide additional information regarding what information or documentation will be needed and how you can request an exception from this requirement if you have a need for a religious and/or medical accommodation. Requisition Number: 124246 Country: United States State: Texas City: Austin Job Function: Design AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE PERSON: This role is ideal for a strategic thinker who thrives in solving large-scale technical challenges without losing sight of execution realities. You are: * A visionary and a builder - someone who can define and improve DV frameworks that will last through generations of silicon. * A mentor and a unifier - guiding diverse teams across geographies and backgrounds, aligning them to a shared DV mission. * A strong communicator who brings clarity and confidence when navigating ambiguity or resolving conflicting technical perspectives. * Comfortable influencing without authority and leading through technical credibility * Motivated by impact - not just doing DV but transforming how it's done at scale. THE ROLE: At AMD, we believe in "We before Me" - and this role exemplifies that value. Success here means making those around you better through leadership, knowledge sharing, and collaboration. * We are building high-performance computing technologies that are powering the future - from gaming and AI to hyperscale data centers and beyond. To help us continue this trajectory of excellence and innovation, we're looking for a Design Verification Architect AI/ML focus to drive the strategic vision of DV for our next-generation CPU cores. * This is a technical leadership position focused on methodology design, infrastructure planning, and team enablement. You will set the standard for quality, coverage, and scalability across a wide array of processor verification efforts. * If you have multiple successful tape-outs, a vision for world-class DV strategy, and the ability to orchestrate technical teams toward measurable impact, this role is your opportunity to shape the core of AMD's processor roadmap. KEY RESPONSIBILITIES: * Define and own the overall DV architecture for high-performance CPU cores, ensuring scalability across variants and generations. * Collaborate closely with design, microarchitecture, emulation, and verification leads/architects to build aligned verification strategies. * Lead the evaluation and enhancement of AMD's DV infrastructure and methodologies, to drive RTL quality and project intercept. * Provide technical mentorship and strategic direction to DV leads and engineers across global AMD sites. * Anticipate architectural and verification risks early and drive systemic solutions before they impact delivery. * Influence cross-functional decision-making through a blend of technical insight and collaborative communication. * Champion long-term DV innovation by staying current on AI/ML techniques, formal verification, and emulation strategies - and knowing when to integrate them into project flow. PREFERRED EXPERIENCE: * Expertise in Design Verification with an emphasis on CPU architecture and core-level verification, or strong AI/ML deployment experience * Strong grasp of DV methodologies: coverage-driven verification, formal, and infrastructure strategy. * Solid understanding of computer architecture fundamentals: pipelines, caching, coherency, load/store, execution units, etc. * Strong documentation, planning, and cross-functional coordination skills. * Familiarity with x86 or ARM CPU cores, or AI/ML deployments ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering LOCATION: Santa Clara #LI-DC1 #HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here. This posting is for an existing vacancy.

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. : We are seeking a highly skilled and experienced Chip Architect to lead the definition and documentation of next-generation ARM-based Systems-on-Chip (SoCs). This role is central to bridging the gap between system requirements and silicon implementation, with a strong focus on mixed-signal integration for sensing and touch interfaces within stringent low-power and bandwidth constraints. The ideal candidate must be a hands-on leader capable of driving detailed technical specifications, conducting rigorous power and performance analyses, and serving as the primary architectural liaison across diverse engineering teams. Strong hands-on RTL and scripting knowledge is a must. Key Responsibilities * Bandwidth & Power Analysis: Lead comprehensive power and bandwidth analysis for architectural trade-offs. Develop models to predict system performance and power consumption (uW/MHz) and make data-driven decisions to optimize the SoC PPA (Power, Performance, Area). * Detailed Chip Specification: Create and maintain detailed chip specification documentation, including detailed architecture descriptions, relevant block diagrams, timing diagrams, and expected waveforms to guide implementation and verification teams. Working knowledge of AXI, AMBA, Serial interfaces and memory. * ARM-based SoC Architecture: Define and drive the top-level architecture for complex SoCs utilizing various ARM processor cores (Cortex-M, Cortex-A, etc.) and associated system IP. Cross-Functional Interface: Serve as the mandatory interface point and technical lead across multiple disciplines: o Firmware: Ensure the architecture is easily programmable and meets real-time constraints. o Design (Digital/Analog): Provide clear specifications and support during implementation. o Systems: Translate high-level use cases into concrete architectural requirements. o Analog: Define clear interfaces and integration strategies for mixed-signal blocks. o (ADCs, DACs, sensor interfaces). o Mixed-Signal Integration: Architect the seamless integration of mixed- signal components tailored for advanced sensing and touch applications. o Low-Power Leadership: Champion ultra-low-power design methodologies and architectural choices to achieve aggressive battery life targets for portable devices. Qualifications o Education: Bachelor's and 12+ years of related experience, or Master's degree in Electrical Engineering, Computer Engineering, or a related field and 10+ years of related experience Experience: System engineering, or a related field, with a proven track record of successful SoC tape-outs. o Technical Expertise: Deep expertise in ARM architectures and system IP (interconnects, memory systems). o Proven experience conducting rigorous power (static/dynamic) and bandwidth analysis for complex systems. o Strong understanding of mixed-signal integration challenges and design principles for sensing/touch applications. o Documentation Skills: Excellent technical writing skills with meticulous attention to detail in creating specifications, diagrams, and documentation. o Soft Skills: Exceptional communication, leadership, and negotiation skills. Must be highly effective at driving consensus and clarity across disparate engineering disciplines. o Work Environment & Location o On-site Requirement: This is a full-time, hands-on role that requires the employee to be present at the office location. There is no remote work option available. o Preferred Location: San Jose, CA. o Secondary Location: Irvine, CA (Candidates willing to relocate or work from our Irvine office may be considered). Other Desired Experience Touch Sensors Mixed Signal SOC architecture FPGA knowledge is a plus Low power Architecture as applied to DSP Technical Customer engagement Additional Job Description: Compensation and Benefits The annual base salary range for this position is $141,300 - $226,000 This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements. Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence. Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law. If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

What you do at AMD changes everything At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies - building blocks for gaming, immersive platforms, and the data center. Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to take a look at the opportunities available to come join our team. GPU ML Performance Architect The Role: AMD is looking for an individual to join GPU architecture team to work on next generation GPU architecture for machine learning acceleration. The job includes architecture modeling and developing Deep Learning GPU kernels for architecture exploration and performance projection. The Person: The successful person will be an experienced GPU architect or GPU-compute/graphics programmer with an eye towards hardware-aware performance optimizations. Key Responsibilities: The ideal candidate will be responsible for architecture modeling and writing high performance GPU kernels for Machine Learning applications to run on AMD's next generation GPU. They will be porting and optimizing algorithms for new GPU architecture Implement new architecture ideas then analyze performance impact Perform code reviews, authoring detailed documentation related to their work. They will play a key role in all phases of GPU architecture development including architecture feature analysis, performance projection, and performance analysis across different platforms. Preferred Experience: Strong programming skills in C/C++ Extensive experience with machine learning Experience on GPU programing Strong understanding of GPU architecture Good teamwork and interpersonal skills required Ability to work independently and within complementary teams Demonstrate flexibility, strong motivation and a proven track record of meeting results-oriented deadlines. Knowledge of Parallel-Computing, GPUs, and 3D graphics Familiarity with deep neural network machine learning technologies and modern machine learning programming frameworks Academic Credentials: Masters, PhD or 5 years industry experience in relevant field (CS, EE, CE) Location: Santa Clara, CA; Orlando, Florida #LI-PA1 Requisition Number: 112841 Country: United States State: California City: Santa Clara Job Function: Design AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: We are looking for a GPU Machine Learning Architect to join GPU architecture team developing Deep Learning Architecture and GPU kernels for architecture exploration, development and performance verification THE PERSON: The successful person will be an experienced GPU-compute or graphics hardware developer and programmer with an eye towards hardware/software-aware performance implementations and optimizations. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. Good teamwork and interpersonal skills required. Ability to work independently and within complementary teams. Demonstrate flexibility, strong motivation and a proven track record of meeting results-oriented deadlines. KEY RESPONSIBILITIES: * They will play a key role in all phases of GPU architecture development including architecture feature development and analysis, performance projection, and performance analysis across different platforms. * The ideal candidate will be responsible for writing high performance GPU kernels for Machine Learning applications to run on AMD's next generation GPU.\ * They will be porting and optimizing algorithms for new GPU architecture, perform code reviews, authoring detailed documentation related to their work. PREFERRED EXPERIENCE: * Strong programming skills in C/C++, HIP, and CUDA * Extensive experience with machine learning * Experience with GPU ML runtimes and compilers * Experience using version control software such as Git * Strong understanding of GPU architecture * Knowledge of Parallel-Computing, GPUs, and 3D graphics * Familiarity with deep neural network machine learning technologies and modern machine learning programming frameworks ACADEMIC CREDENTIALS: * PhD in computer architecture/Electrical Engineering preferred. This role is not eligible for Visa sponsorship. #LI-BM1 #LI-Hybrid Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here. This posting is for an existing vacancy.

What you do at AMD changes everything We care deeply about transforming lives with AMD technology to enrich our industry, our communities and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence, while being direct, humble, collaborative and inclusive of diverse perspectives. This is who we are at our best. One Company. One Team. AMD together we advance_ Power Management Architect The Role: Drive the definition, tradeoff studies, protyping, implementation and verification of the Power Management Architecture features and algorithms for Radeon gaming and datacenter GPUs. Collaborate closely with a wide array of engineering disciplines to create leadership products that delight our customers. The Person: This is an experienced engineer who brings a deep understanding of SoC and Platform architecture, Power Management concepts and algorithms, and a passion to drive perf/watt and perf/$ optimizations for worldclass GPUs. Previous experience in the areas of voltage margin optimization, reliability and yield management, statistical analysis of silicon manufacturing/test data will be a bonus. Key Responsibilities: Drive Power Management advances and multi-generational roadmap in the area of voltage optimization, with an eye on silicon reliability and yeild, to maximize power and cost constrained performance for Radeon graphics platforms Take ownership for developing and driving PM features from concept through product launch for a family of SoC devices with varying configurations and target market segments Work cross functionally with Software, Firmware, SOC, IP, Platform, Technology, Product teams through every stage of product development, evangelize for power efficiency, lead broad forums and drive product definition alignment Work with product teams to understand the Perf/Power/Cost requirements Drive power management feature definition per SoC program Develop system level models, analyze return-on-investment and evaluate trade-offs Document specifications Guide power management feature implementation, verification, emulation and post-silicon validation in an engineering resource efficient and scalable manner Coach and mentor other engineers as a technical leader Preferred Experience: Proven experience with GPU or CPU power architecture, PPA tradeoffs, power management algorithms, embedded microcontroller firmware, hardware test and verification environments Solid background in electrical circuits, VLSI and circuit design fundamentals Familiarity with ASIC/SoC Design cycles and methodologies including RTL, Verification, Emulation, Physical Design and post-si validation Background in prototyping and proof of concept of new complex architectures and algorithms in hardware/software/firmware using physical and/or emulation platforms will be a plus Programming skills in C/C++, scripting with Perl or Python Previous experience in the areas of voltage margin optimization, reliability and yield management, statistical analysis of silicon manufacturing/test data will be a major differentiator Ability to work cross functionally with HW/SW and Pre/Post Silicon teams, lead by influence and strong communication skills Academic Credentials: Bachelor's Degree in Electrical Engineering, Computer Engineering, or another relevant field. Masters or Ph.D. preferred Location: Santa Clara, CA - Austin, TX - Markham, Ontario #LI-SW2 Requisition Number: 150682 Country: United States State: California City: Santa Clara Job Function: Product Engineering Benefits offered are described here. AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: This role offers a rare opportunity for a senior technical leader to shape the future of memory interface technology at scale. As a key architect within the AMD Circuit Technology Design Group, you will influence the definition, architecture, and delivery of next-generation Memory PHY solutions in advanced CMOS technologies. The focus is on long-term impact: setting technical direction, guiding critical design decisions, and enabling teams to deliver differentiated mixed-signal IP across future SoCs. This position is well suited for technologists who value deep technical ownership, architectural influence, and the ability to leave a lasting technical legacy-without requiring people-management as a primary responsibility. THE PERSON: You are a highly respected engineer or architect known for solving difficult problems and raising the technical bar around you. You bring perspective earned from experience, approach challenges with curiosity and pragmatism, and engage others through thoughtful collaboration rather than authority. You are comfortable operating with ambiguity, influencing across organizations, and contributing at both strategic and hands-on technical levels. KEY RESPONSIBILITIES: * Serve as a senior technical authority and architect for Memory PHY technology, shaping long-range roadmaps and architectural direction. * Define and evolve architectures and specifications for advanced Memory PHYs, including DDR, LPDDR, GDDR, and HBM. * Drive innovation in high-speed I/O circuit design, system-level analysis, power integrity, and signal integrity. * Partner with cross-functional teams across Circuit Design, Layout, Logic Design, Physical Design, Firmware, Design Verification, and Post-Silicon organizations worldwide. * Influence design quality and execution through design reviews, technical mentorship, and principled tradeoff decisions. * Support post-silicon bring-up, validation, characterization, optimization, and product readiness. * Communicate complex technical concepts clearly to senior technical peers, leadership, and stakeholders. * Mentor and advise engineers and architects, contributing to a strong and inclusive technical community. PREFERRED EXPERIENCE: * Sustained technical impact on production Memory PHYs or high-speed I/O IP at advanced technology nodes. * Experience owning or shaping architecture across multiple successful tape-outs. * Deep expertise in high-speed analog and mixed-signal design, memory protocols, and system-level considerations. * Strong understanding of advanced CMOS technologies and modern design methodologies. * Track record of making sound technical decisions in complex, high-risk design spaces. * Ability to influence without formal authority and collaborate effectively across organizational boundaries. ACADEMIC CREDENTIALS: * Advanced degree in Electrical Engineering or related field preferred, or equivalent professional experience. * Typically, 15+ years of experience in high-speed analog, mixed-signal, or memory PHY design. LOCATION: Flexible - Bay Area, CA; Boston, MA; Austin, TX; or Toronto, Canada. This role is not eligible for visa sponsorship. #LI-ML4 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here. This posting is for an existing vacancy.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. SoC Architect - PCIe/CXL/UAL/DMA THE ROLE: AMD's Adaptive and Embedded Computing Group (AECG) is looking for a SoC Architect to join the team in defining the next generation of Adaptive and Embedded SoCs. You will drive novel SoC architecture solutions across a wide range of applications, including Embedded Computing, AI/ML, Data Center, Communications, Automotive, and Aerospace, in close collaboration with customers, partners, product planning, SoC and IP architects, and design & verification teams. THE PERSON: As a SoC Architect you will help drive new architecture initiatives that leverage the state-of-the-art PCIe, CXL, UAL, and Confidential Compute technologies and standards. You will exercise your technical expertise and excellent communication skills to collaborate with design and product planning with an eye towards delivering innovative and highly competitive adaptive accelerators and embedded computing solutions. KEY RESPONSIBILITIES: * Responsible for driving the SoC architecture, with a particular focus on I/O subsystems connected over PCIe, UAL or CXL. * Define I/O subsystem and PCIe DMA architectures, including their interactions with internal embedded processor-subsystems, Network on Chip, Memory controllers, and FPGA fabric. * Create flexible and modular I/O subsystem architectures that can be deployed in either chiplet, monolithic or 3D form factors. * Work with customers, and cross-functional teams to scope SoC requirements, analyze PPA tradeoffs, and then define architectural requirements that meet the PPA and schedule targets. * Define I/O subsystem and DMA hardware, software, and firmware interactions with embedded processing subsystems and external CPUs. * Author architecture specifications in clear and concise language. Guide and assist pre-silicon design/verification and post-silicon validation during the execution phase. PREFERRED EXPERIENCE: * Strong technical background architecting SoC and I/O subsystems involving PCIe and PCIe-DMA engines. * Strong technical knowledge of the PCIe protocol specifications, and how mandatory and optional protocol features are leveraged in PCIe devices. * Domain expertise in embedded computing, aerospace & defense, data-center, networking, or automotive industries. * Knowledge of I/O Subsystem and DMA interactions with internal embedded processor-subsystems (x86, RISC-V or ARM) and external host CPUs. * Knowledge of bridging and ordering rule enforcement between on-chip protocols such as AXI, and off-chip protocols such as PCIe desired. * Knowledge of ARM Processors and AXI Interconnects desired. * Knowledge of FPGA and AI/ML Accelerators desired. * Knowledge of boot, security, debug, telemetry and RAS desired. ACADEMIC CREDENTIALS: * BS/MS/PhD in electrical or computer engineering or related field. LOCATION: San Jose, CA This position is not eligible for Visa sponsorship #LI-BW2 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here. This posting is for an existing vacancy.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE We are seeking an SoC Architect specializing in Boot, Firmware, and Software/Hardware Interfacing. In this role, you will define and drive firmware architecture for next-generation SoCs, ensuring robust boot flows and compliance with functional safety standards. You will collaborate closely with other SoC architects to integrate firmware seamlessly with processor subsystems, interconnects, and system-level components. THE PERSON You are passionate about SoC architecture and firmware design, with deep expertise in boot flows for ARM and x86 platforms. You thrive in cross-functional environments, balancing performance, power, and reliability trade-offs. You have strong analytical skills, excellent communication, and the ability to influence architecture decisions across teams. KEY RESPONSIBILITIES * Define and develop firmware architecture for SoC boot flows, reset sequences, and system initialization. * Collaborate with SoC architects to ensure cohesive integration of firmware with hardware components. * Specify requirements and create detailed documentation for boot and firmware interfaces. * Drive implementation of functional safety-compliant firmware and software. * Partner with design, verification, and software teams to ensure functional correctness and system-level validation. * Analyze trade-offs for performance, power, reliability, and safety in firmware design. * Influence strategies for security, safety, and lifecycle management across firmware domains. PREFERRED EXPERIENCE * Experience in ARM and x86 SoC boot flows, including secure boot and power-on initialization. * Expertise in firmware development for SoCs, including low-level drivers and hardware abstraction layers. * Experience with functional safety compliance (ISO 26262 or equivalent) for firmware and software. * Familiarity with SoC architecture, processor subsystems, interconnect protocols (e.g., AXI), and memory systems. * Knowledge of low-power design techniques, reset flows, and power management. * Proficiency in modeling and automation using C, Python or similar languages. * Strong understanding of security and reliability strategies for embedded firmware. ACADEMIC & EXPERIENCE REQUIREMENTS * BS, MS, or PhD in Computer/Electrical Engineering or related field. * 8+ years of experience in SoC architecture and firmware development. * Proven track record in delivering architecture for SoCs with robust boot and firmware solutions. LOCATION: Austin, Texas Preferred. #LI-RW1 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here. This posting is for an existing vacancy.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. We are excited to welcome highly talented engineers and application engineers to join our Cadence North America Field Applications Team. Working at Cadence means working alongside the industry's brightest people and innovating for the most advanced companies in the world. Through Cadence's Electronic Design Automation (EDA) products, we've worked with a wide range of customers, from helping build the world's most powerful supercomputer to innovating in the field of artificial intelligence and machine learning. As an expert Digital Implementation and Signoff Field Applications Engineering (AE) , you will work side-by-side with our leading edge customers. With your expertise, you'll help them deploy Cadence's market-leading technologies in Synthesis, P&R, and Signoff to meet/exceed their PPA targets, achieve faster design closure, and turn their design concepts into reality. The greater your powers, the more business opportunities you'll help bring to the table. You will also work directly with the Cadence R&D group to drive the customer requirements and influence the direction of Cadence next-generation products and technologies. At Cadence, customers are at the heart of everything we do. Talented leaders like you are what enable us to materialize this passion into results. By working directly with Cadence R&D and driving customer engagements, you will enhance your in-depth knowledge in nanometer design, unlock unique expertise in digital design implementation, and level up your communication, customer, and sales skills. Key Responsibilities + Lead a team of Application Engineers providing technical support to Cadence customers in the areas of Backend Digital Design Implementation and Signoff including Place and Route, Design Closure, and timing/power signoff + Guide customers on how to best utilize Cadence technologies to achieve their design goals and meet project schedules + Collaborate with team to conduct technical presentations and product demonstrations + Drive technical evaluations/benchmarks to success + Work closely with R&D to enhance the tools and methodologies to meet and exceed customer's requirements + Drive adoption and proliferation of Cadence tools and technologies + Provide guidance to the team to amend & augment the flow as needed using Tcl and/or other programming skills to meet objectives and improve results/flows + Capture best practices and lessons learned from current evaluations/benchmarks and utilize to improve efficiency and success rate in next engagements Job Requirements Minimum + 15+ years of industry Physical Design experience + BS degree Computer Science/Engineering, Electrical, Engineering, or related field + Strong knowledge in Digital Design Fundamentals, Semiconductor fundamentals, and Static Timing Analysis is required + Prior experience with IC digital implementation flows and backend EDA tools including Place and Route, IR Drop, backend design timing and power closure + Experience with advanced nodes 10nm and below + Experience in scripting languages such as Tcl/Perl/Python is a must + Strong customer-facing communication and problem-solving skills + Strong personal drive for continuous learning and expanding professional skill sets + Strong verbal, written, and customer communication skills Preferred + MS degree Computer Science/Engineering, Electrical, Engineering, or related field + Prior experience with IC digital implementation flows and font-end EDA tools including Synthesis, DFT, and Logical Equivalence Checking + Prior experience with Cadence tools such as Genus, Innovus, Conformal, Tempus, Modus, Voltus or ICC, ICC2, DC or Primetime is highly desired + Experience with advanced nodes 5nm and below The annual salary range for California is $157,500 to $292,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more. We're doing work that matters. Help us solve what others can't. Additional Jobs (************************************************* Equal Employment Opportunity Policy: Cadence is committed to equal employment opportunity throughout all levels of the organization. + Read the policy(opens in a new tab) (******************************************************************************************************************************** We welcome your interest in the company and want to make sure our job site is accessible to all. If you experience difficulty using this site or to request a reasonable accommodation, please contact ********************. Privacy Policy: Job Applicant If you are a job seeker creating a profile using our careers website, please see the privacy policy(opens in a new tab) (**************************************************************** . E-Verify Cadence participates in the E-Verify program in certain U.S. locations as required by law. Download More Information on E-Verify (64K) (************************************************************************************************************************** Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world's toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence. Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class. Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. We are excited to welcome highly talented engineers and application engineers to join our Cadence North America Field Applications Team. Working at Cadence means working alongside the industry's brightest people and innovating for the most advanced companies in the world. Through Cadence's Electronic Design Automation (EDA) products, we've worked with a wide range of customers, from helping build the world's most powerful supercomputer to innovating in the field of artificial intelligence and machine learning. As an expert Digital Implementation and Signoff Field Applications Engineering (AE) , you will work side-by-side with our leading edge customers. With your expertise, you'll help them deploy Cadence's market-leading technologies in Synthesis, P&R, and Signoff to meet/exceed their PPA targets, achieve faster design closure, and turn their design concepts into reality. The greater your powers, the more business opportunities you'll help bring to the table. You will also work directly with the Cadence R&D group to drive the customer requirements and influence the direction of Cadence next-generation products and technologies. At Cadence, customers are at the heart of everything we do. Talented leaders like you are what enable us to materialize this passion into results. By working directly with Cadence R&D and driving customer engagements, you will enhance your in-depth knowledge in nanometer design, unlock unique expertise in digital design implementation, and level up your communication, customer, and sales skills. Key Responsibilities * Lead a team of Application Engineers providing technical support to Cadence customers in the areas of Backend Digital Design Implementation and Signoff including Place and Route, Design Closure, and timing/power signoff * Guide customers on how to best utilize Cadence technologies to achieve their design goals and meet project schedules * Collaborate with team to conduct technical presentations and product demonstrations * Drive technical evaluations/benchmarks to success * Work closely with R&D to enhance the tools and methodologies to meet and exceed customer's requirements * Drive adoption and proliferation of Cadence tools and technologies * Provide guidance to the team to amend & augment the flow as needed using Tcl and/or other programming skills to meet objectives and improve results/flows * Capture best practices and lessons learned from current evaluations/benchmarks and utilize to improve efficiency and success rate in next engagements Job Requirements Minimum * 15+ years of industry Physical Design experience * BS degree Computer Science/Engineering, Electrical, Engineering, or related field * Strong knowledge in Digital Design Fundamentals, Semiconductor fundamentals, and Static Timing Analysis is required * Prior experience with IC digital implementation flows and backend EDA tools including Place and Route, IR Drop, backend design timing and power closure * Experience with advanced nodes 10nm and below * Experience in scripting languages such as Tcl/Perl/Python is a must * Strong customer-facing communication and problem-solving skills * Strong personal drive for continuous learning and expanding professional skill sets * Strong verbal, written, and customer communication skills Preferred * MS degree Computer Science/Engineering, Electrical, Engineering, or related field * Prior experience with IC digital implementation flows and font-end EDA tools including Synthesis, DFT, and Logical Equivalence Checking * Prior experience with Cadence tools such as Genus, Innovus, Conformal, Tempus, Modus, Voltus or ICC, ICC2, DC or Primetime is highly desired * Experience with advanced nodes 5nm and below The annual salary range for California is $157,500 to $292,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more. We're doing work that matters. Help us solve what others can't.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. TBD The annual salary range for California is $178,500 to $331,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more. We're doing work that matters. Help us solve what others can't.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Digital signal processing expert Create ultra high-speed micro-architectures for serial data transmission and reception at 200Gb/s, 400Gb/s and above Model impairments (e.g. linearity, noise, crosstalk) in associated with electronic and optical components and interact with analog and optical designers Interact with Cadence customers to specify new IP products Represent Cadence at standards bodies including PCI-SIG, 802.3 and OIF PhD or MS in Electrical Engineering desired by not required The annual salary range for California is $178,500 to $331,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more. We're doing work that matters. Help us solve what others can't.