Cadence Design Systems jobs - 1,562 jobs

A leading semiconductor design firm is seeking a Senior Manager/Director for Corporate Strategy & Development focused on Physical AI and robotics. The ideal candidate will drive corporate growth strategies and M&A initiatives while collaborating across departments. You will need a BS in Engineering and over 6 years of relevant experience, particularly in M&A execution and robotics. The role promises significant visibility and influence in decision-making, along with a competitive salary range of $144,200 to $267,800 along with additional incentives. #J-18808-Ljbffr

A leading technology company in San Jose is looking for a Security Product Planning Engineer. The successful candidate will drive technical planning for next-generation security features while collaborating with various teams. This role requires a Bachelor's or Master's in Computer Engineering and experience in security, boot, and debug planning for ASICs and FPGA systems. Join us to impact product decisions significantly and work in a culture of innovation and inclusivity. #J-18808-Ljbffr

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: We are seeking an engineer with strong hands‑on experience in FPGA build flows, design qualification, and developing infrastructure for platform regressions. This role is focused on developing robust smoke tests, functional test cases, and qualification workloads used to validate both FPGA designs and the associated platform software/toolchain flows. THE PERSON: The successful candidate will architect and implement daily and nightly regression pipelines, integrate them into a unified infrastructure, and ensure continuous quality and reliability of FPGA based platform design flows at scale. This role sits at the intersection of FPGA engineering, software automation, and infrastructure‑level validation. KEY RESPONSIBILITIES: FPGA Design & Build Flow Own FPGA compile/build flows (synthesis, place & route, timing closure, bitstream generation). Develop and maintain reference FPGA designs for build flow validation. Diagnose issues across RTL, constraints, tools, and platform dependencies. Platform Qualification & Toolchain Validation Develop targeted test cases for FPGA build flows, toolchain stability, and edge cases. Build scripts and automation for software stack validation (drivers, runtimes, APIs). Validate tool and environment changes, partner with vendors and internal teams on root cause and fixes. Define scalable design qualification criteria and coverage. Regression Infrastructure Design and maintain automated daily/nightly regression systems for FPGA and software toolchain validation. Enable distributed, scalable runs across on‑prem or cloud resources. Automate result collection, triage, and failure classification. Infrastructure & CI/CD Integration Integrate FPGA regressions into the unified infrastructure and CI/CD pipelines. Interface with shared services (e.g., build orchestration, monitoring, logging). Enable standardized reporting, dashboards, and notifications for regression health. PREFERRED EXPERIENCE: Large-scale FPGA farm or datacenter‑style validation. Monitoring/logging tools (e.g., Grafana, Prometheus, ELK). Operating unified build/validation infrastructures across multiple teams. Hardware bring‑up or silicon pre‑/post‑silicon validation. Cross‑functional and geographically distributed team collaboration. ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering LOCATION: San Jose, CA This role is not eligible for Visa sponsorship Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. #J-18808-Ljbffr

A leading semiconductor company seeks a Senior Engineer, Field Applications in San Jose, California. The role focuses on providing technical support for power products, maintaining customer relationships, and driving product development. Candidates should possess a Master's degree in Electrical Engineering or a related field and at least two years of experience in power conversion design. This position offers competitive pay and comprehensive benefits, including health insurance and a performance-based bonus. #J-18808-Ljbffr

A leading technology company is seeking a Director of AI to lead their Modeling team focused on Large Language Models. The ideal candidate will have substantial experience in AI and machine learning, with proven leadership in research teams, strong communication skills, and a relevant PhD. This role is crucial for advancing AI development, promoting collaboration, and establishing ethical standards for large-scale models. #J-18808-Ljbffr

A leading technology company is seeking a Principal / Senior GPU Software Performance Engineer in San Jose, CA. This role involves optimizing GPU workloads for training performance, enhancing throughput, and resolving bottlenecks in distributed systems. The ideal candidate will have strong skills in GPU performance engineering and experience with deep learning frameworks, particularly PyTorch. This position offers a chance to work in a collaborative environment focused on innovation and inclusivity. #J-18808-Ljbffr

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: As a member of the front-end verification team you will be part of a multi-site team to help drive successful verification execution and prove the functional correctness of the next generation of AMD/Xilinx programmable devices. THE PERSON: You have a passion for digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Collaborate with architects, hardware and firmware engineers to understand the new features to be verified Take ownership of block level verification tasks Define test plans, test benches, and tests using System Verilog and UVM Debug RTL and Gate simulations and work with HW and SW development teams to verify fixes Review functional and code coverage metrics to meet the coverage requirements Develop and improve existing verification flows and environments PREFERRED EXPERIENCE: Strong understanding of computer architecture and logic design Knowledge of Verilog, system Verilog and UVM is a must Strong understanding of state of the art verification techniques, including assertion and constraint-random metric-driven verification Working knowledge of C/C++ and Assembly programming languages Exposure to scripting (python preferred) for post-processing and automation Experience with gate level simulation, power and reset verification ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering or a related field LOCATION: San Jose, CA #LI-DW1 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. #J-18808-Ljbffr

A leading semiconductor company in California is seeking a Senior Finance Manager to join their Adaptive and Embedded Computing Group. This role involves key financial partnership with senior leadership, focusing on budgeting, planning, and analysis. Candidates should have progressive experience in financial analysis and a strong background in OpEx and CapEx management. This is a hybrid position with significant opportunities for coaching and leadership development within a dynamic team environment. #J-18808-Ljbffr

A prominent technology firm in San Jose is seeking a Director & Sr Corporate Counsel specializing in government and trade compliance. The role involves supporting U.S. export control laws, conducting investigations, and collaborating with teams across the company. The ideal candidate has over 5 years of legal experience, especially in technology, and holds a J.D. degree. The position offers a competitive salary range and various benefits. #J-18808-Ljbffr

A leading technology company in California is seeking a Forward Deployed Software Engineer. In this senior role, you will work directly with clients to implement AMD's cutting-edge AI technology, supporting their transition from proof of concept to production. Ideal candidates should possess strong programming skills in C/C++ and Python, along with experience in GPU programming and AI frameworks. Competitive benefits and a hybrid work model are offered. #J-18808-Ljbffr

Introduction A career in IBM Consulting is rooted by long-term relationships and close collaboration with clients across the globe. You'll work with visionaries across multiple industries to improve the hybrid cloud and AI journey for the most innovative and valuable companies in the world. Your ability to accelerate impact and make meaningful change for your clients is enabled by our strategic partner ecosystem and our robust technology platforms across the IBM portfolio. Your role and responsibilities Lead and implement complex SAP EAM/PM projects within the utilities sector. Configure and provide hands‑on expertise in SAP S/4HANA EAM, Asset Intelligence Network (AIN), Asset Strategy & Performance Management (ASPM), and SAP Work Manager/Fiori. Develop strategies, roadmaps, and business cases for large‑scale SAP transformations. Conduct workshops and meetings with clients, influencing C‑suite executives and key stakeholders. Coordinate cross‑functional, distributed teams (onshore/offshore), ensuring alignment, effective communication, and timely delivery. Train, mentor, and support technical and business teams in SAP utilization and configuration. Ensure SAP solutions align with industry best practices and meet client requirements. Measure results, track KPIs, and report on the progress and benefits of SAP initiatives. Troubleshoot complex issues and provide strategic and technical guidance during implementations. Balance hands‑on execution with strategic leadership to ensure high‑quality and efficient delivery. This Job can be Performed from anywhere in the US. Required technical and professional expertise 10+ years of SAP consulting experience, with at least 6+ years in SAP EAM/Plant Maintenance. Strong knowledge of the utilities industry. Hands‑on expertise in SAP S/4HANA EAM, Asset Intelligence Network, Asset Strategy & Performance Management, and/or SAP Work Manager/Fiori. Proven track record leading large‑scale SAP transformations, including business case development and roadmap execution. Excellent client‑facing skills with the ability to influence C‑suite and senior stakeholders. Strong leadership skills in managing cross‑functional teams across onshore/offshore models. Preferred technical and professional experience Bachelor's degree required; Master's degree or MBA preferred. Team Leadership & Development. Business Development. IBM is committed to creating a diverse environment and is proud to be an equal‑opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, gender, gender identity or expression, sexual orientation, national origin, caste, genetics, pregnancy, disability, neurodivergence, age, veteran status, or other characteristics. IBM is also committed to compliance with all fair employment practices regarding citizenship and immigration status. #J-18808-Ljbffr

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE AMD is seeking a Director of Machine Learning Engineering to join our Models and Applications organization. In this role, you will define and execute the technical vision for distributed training of large-scale generative AI and recommendation models on AMD GPUs. You'll guide a world-class engineering team focused on scaling AI training efficiency, optimizing model performance, and advancing AMD's leadership in AI systems. This position blends deep technical expertise with strategic leadership. You will partner closely with research, hardware, and software teams to shape the roadmap for AMD's AI training stack - driving innovation at both the model and application levels, influencing how next-generation AI models are trained and deployed efficiently on AMD platforms. THE PERSON The ideal candidate is a strategic technical leader with a strong foundation in distributed training and AI infrastructure, coupled with experience building or guiding high-impact ML applications such as recommendation systems and ranking models. You combine visionary thinking with execution excellence, thrive in cross-functional collaboration, and are passionate about scaling AI systems that fully leverage AMD GPU performance across both model and application layers. KEY RESPONSIBILITIES Strategic Leadership & Vision: Define and drive AMD's distributed training strategy for large-scale generative and recommendation models. Align technical initiatives with broader AI platform goals and business impact. Technical Direction & Innovation: Architect and optimize distributed training pipelines (Pre-training, SFT, RL etc.) for large-scale models. Explore new approaches for efficient training and inference of LLMs and ranking systems. Execution & Delivery: Lead development of high-performance, reliable training pipelines that scale across thousands of GPUs. Ensure world-class efficiency, stability, and model convergence. Cross-Functional Collaboration: Partner with compiler, runtime, system software, and hardware architecture teams to co-design solutions that maximize end-to-end performance. Team Leadership & Development: Build, mentor, and empower a team of expert engineers focused on innovation, collaboration, and technical excellence. Open Source & External Engagement: Drive AMD's engagement in open-source communities through contributions to frameworks such as PyTorch, JAX, TorchTitan, and Megatron-LM. Represent AMD's leadership in AI system design across industry and research communities. Research & Trends: Stay ahead of emerging advances in distributed training, LLMs, recommendation systems, and AI infrastructure - and translate them into scalable engineering practices. PREFERRED EXPERIENCE 10+ years in machine learning, distributed systems, or AI infrastructure; 5+ years in technical leadership or management roles. Proven experience building and optimizing distributed training systems for large models. Prefer experience in both model and application-level development and optimization. Strong familiarity with ML frameworks (PyTorch, JAX, TensorFlow) and distributed frameworks (TorchTitan, Megatron-LM). Hands‑on expertise with LLMs, recommendation systems, or ranking models. Proficiency in Python and C++, including performance profiling, debugging, and large-scale optimization. Experience collaborating across hardware, compiler, and system software layers. Excellent communication, leadership, and problem‑solving skills with the ability to influence across organizations and external partners. ACADEMIC CREDENTIALS Master's or Ph.D. in Computer Science, Artificial Intelligence, Machine Learning, or a related field. LOCATION San Jose, CA or Bellevue, WA preferred. Other U.S. locations near AMD offices may be considered. Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. #J-18808-Ljbffr

A leading technology company is seeking a Senior Principal Emulation Design Engineer in San Jose. This role focuses on developing verification environments and requires strong experience with system-level designs and communication standards. Ideal candidates will possess a relevant degree and extensive experience in design. The position offers a competitive salary range from $154,000 to $286,000 along with numerous benefits. #J-18808-Ljbffr

A leading tech consulting firm in San Francisco is seeking an Associate Partner specializing in SAP. This position requires significant SAP expertise, 7+ years of consulting experience, and a strong sales acumen. Key responsibilities include client profiling, pipeline development, and delivering tailored SAP solutions. The ideal candidate should be able to lead teams and exceed revenue targets while fostering strong client relationships. Join an inclusive workplace committed to diversity and equal opportunity. #J-18808-Ljbffr

A global electronic design automation company in California is seeking an experienced developer with deep knowledge in C++ and EDA tools. The role focuses on enhancing analysis tools for advanced custom circuits using machine learning technologies. Candidates should have at least 8 years of relevant experience and a degree in Computer Science or related fields. Competitive salary and benefits included. #J-18808-Ljbffr

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: We are seeking a Director of AI (Generative AI) to lead our Modeling team, with a focus on Large Language Models (LLMs). THE PERSON: The ideal candidate will have a proven track record of building and leading a world-class research and engineering team focused on LLMs and foundation models, with a strong publication record in top-tier research venues. Experience with the latest state-of-the-art foundation models-especially in the areas of LLMs and vision-is essential. Deep knowledge in model alignment, fine-tuning, and current research trends is also required. We are looking for a leader with hands-on expertise in training large language models at scale. KEY RESPONSIBILITIES: Set the vision and strategy for developing large foundation models across various domains, such as natural language, computer vision, and multimodal data. Lead a team of researchers and engineers working on cutting-edge techniques for training, fine-tuning, evaluating, and deploying large foundation models at scale. Collaborate with cross-functional teams and stakeholders to identify opportunities and enhance the platforms and infrastructure supporting large-scale model development. Communicate the results, capabilities, and impact of foundation models and AI to both internal and external audiences. Establish best practices and standards to ensure the quality, reliability, fairness, and ethical use of AI and large foundation models. PREFERRED EXPERIENCE: Proven experience leading a research team in machine learning or a related field. Deep technical expertise in natural language processing and generative AI. A strong publication record in top-tier conferences and journals related to machine learning. Exceptional leadership skills and the ability to work collaboratively with cross-functional teams and customers. Excellent communication skills-written, verbal, and presentation. A demonstrated ability to mentor, coach, and inspire a diverse and talented team of researchers and engineers. ACADEMIC CREDENTIALS: A PhD (or a master's degree with equivalent experience) in artificial intelligence, machine learning, computer science, or a related field. LOCATION: San Jose, CA or Bellevue, WA #LI-MV1 Benefits: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. #J-18808-Ljbffr

A leading technology company located in San Jose is seeking an engineer specialized in FPGA build flows and software automation. The candidate will own FPGA compile/build processes, develop robust regression pipelines, and ensure quality throughout the design and validation phases. An ideal candidate will possess strong experience in toolchain validation and collaboration across teams. This position offers an innovative environment focused on advancing technology and collaboration within a diverse team. #J-18808-Ljbffr

Senior Manager/Director, Corporate Strategy & Development - Physical AI/Robotics page is loaded## Senior Manager/Director, Corporate Strategy & Development - Physical AI/Roboticslocations: SAN JOSEtime type: Full timeposted on: Posted Todayjob requisition id: R52500## **At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.****Senior Manager/Director, Corporate Strategy & Development - Physical AI/Robotics****Location: San Jose, CA****Role Summary**We're seeking a corporate strategy leader who blends strategic acuity with hands‑on technical depth to accelerate our momentum in Physical AI and robotics. You will shape corporate growth strategies and spearhead inorganic initiatives-including M&A, direct investments, and LP commitments-while orchestrating cross‑functional execution with Product, R&D, Finance, Legal, and GTM. This is a high‑visibility role for a builder-strategist who loves diving into markets, technology stacks, and deal processes-then crafting executive‑ready narratives that inspire action.**Description**• Create and refine corporate growth strategies with a dedicated focus on Physical AI/robotics-market maps, product-market fit analyses, and executive storylines that turn insights into decisions.• Develop investment thesis on the Physical AI stack (robots, middleware, simulation, training, deployment) and quantify where and how Cadence can create differentiated value.• Build a high‑quality pipeline of direct investment targets and LP opportunities; run thesis‑driven sourcing and diligence, and prepare investment memos for leadership.• Partner with product and engineering to assess buy/build/partner options-including co‑development, strategic partnerships, minority investments, and acquisitions.• Lead end‑to‑end corporate development execution: source, evaluate, negotiate, and close transactions; partner with integration team to drive plans that realize strategic and financial value.• Establish mechanisms for fast‑turn competitive intelligence, annual market sizing/forecasting, and executive dashboards that inform capital allocation and portfolio bets.**Expected Impact in 6-12 Months**• Stand up an operating cadence for executive reporting on the Physical AI landscape. • Deliver investment thesis on Physical AI/robotics for executive review.• Close 3-4 partnerships/investments/acquisitions.**Minimum Qualifications**• BS in Engineering (minimum) and 6+ years of relevant experience spanning corporate strategy, corporate development, venture investing, or product/engineering roles in robotics.• Familiarity with the entire physical AI/robotics policy training and validation pipeline, including hands-on experience with modern simulation environments (e.g. Isaac Sim, Gazebo, Drake), deep understanding of physics-based simulation tools and engines (e.g. PhysX, MuJoCo), and proficiency in development frameworks and middleware (e.g. ROS/ROS2).• Proven end‑to‑end M&A execution experience: sourcing, diligence, valuation/modeling, negotiation, close, and integration planning.• Investment acumen: skilled at building theses, conducting technical/market/product diligence, drafting memos, and recommending direct investments and LP commitments.• Executive communication: ability to distill complex technical and market insights into crisp narratives, visuals, and decision‑ready materials.**Preferred Qualifications**• Advanced degree (MS, MBA) or equivalent; publications or demonstrated thought leadership in robotics/AI.• Familiarity with reinforcement learning, imitation learning, and sim‑to‑real transfer; practical exposure to datasets, synthetic data generation, and evaluation protocols.• Track record of cross‑functional leadership with Product, R&D, Finance, Legal, and GTM; comfort operating in ambiguous, fast‑moving environments.**Ways of Working**• Builder-operator mindset: strategic rigor matched with willingness to get into the technical and financial details.• Data‑to‑narrative craftsmanship: turn analysis into compelling executive materials and operating mechanisms.• Bias for partnership: co‑create outcomes with engineering, product, and external innovators.*The annual salary range for California is $144,200 to $267,800. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.*## **We're doing work that matters. Help us solve what others can't.****Equal Employment Opportunity Policy:**Cadence is committed to equal employment opportunity throughout all levels of the organization.We welcome your interest in the company and want to make sure our job site is accessible to all. If you experience difficulty using this site or to request a reasonable accommodation, please contact ********************.**Privacy Policy:**Job Applicant If you are a job seeker creating a profile using our careers website, please see the .E-Verify Cadence participates in theE-Verify program in certain U.S. locations as required by law.Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world's toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence. Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class. #J-18808-Ljbffr

DSP or Serdes RTL Sr Principal Digital Design Engineer page is loaded## DSP or Serdes RTL Sr Principal Digital Design Engineerlocations: SAN JOSEtime type: Full timeposted on: Posted Yesterdayjob requisition id: R43530## **At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.**This is an opportunity to join a dynamic and growing team of engineers developing high-speed PMA layer IP for industry-standard protocols. The successful candidate will be a highly self-motivated and results-oriented member of a small team of engineers that can learn and improve existing digital flows. The candidate will primarily be responsible for front-end coding, scripting and developing flows at all phases of the digital design and functional verification. It is further expected that the candidate will be able to work as part of a small and focused team of engineers and will be able to collaborate successfully as needed with the digital, analog and application teams. Candidate should be willing to work full time in the San Jose office. A Cadence satellite office (if senior with extensive SerDes exp.) will be considered.**Position Requirements**This team is focused on DSP and/or High Speed Serdes. The ideal candidate will have at least 10 plus years of actual work experience in SerDes as well as a thorough understanding of the end-to-end digital design flow in order to accurately and efficiently collaborate with all members of the technical staff, both analog and digital, regarding overall project development progress and status. This includes but is not limited to:* Digital microarchitecture definition and documentation* RTL logic design, debug and functional verification* Strong background in DSP and algorithms is a plus.* Familiar with the PMA/PMD/PCS layers of the Ethernet protocol is a plus.* Understanding of digital architecture trade-offs for power, performance, and area* Understanding of proper handling of multiple asynchronous clock domains and their crossings* Understanding of Lint checks and proper resolution of errors* Understanding synthesis timing constraints, static timing analysis and constraint development* Understanding of fundamental physical design flows and stages* Understanding impacts of analog and mixed-signal design and verification on digital-on-top development flow.* Exhibit excellent communication skills and be self-motivated and well organized.* Experience with FPGA and/or emulation platform is a plus.* Firmware development of embedded microcontroller systems is a plus.Substantial experience with Verilog is required, as are excellent logic and debug skills. Engineering expertise in mixed-signal IP development procedures and Ethernet connectivity protocol knowledge are also strongly preferred.#LI-MA1*The annual salary range for California is $154,000 to $286,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.*## **We're doing work that matters. Help us solve what others can't.**Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world's toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence. Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class. #J-18808-Ljbffr