Senior Engineer jobs at Cadence Design Systems

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Are you looking to re-enter the workforce as a Physical Design Application Engineer after taking a career break for caregiving? Who is eligible to apply: Please ONLY consider applying if you are a Physical Designer and (IMPORTANT) who has been out of the workforce for caregiving for a period of at least two years and have a minimum of three years of Physical Design work experience. This role is not open to new college grads or interns. Please check our career site for those roles.Cadence is offering an opportunity to qualified candidates who meet our eligibility criteria to participate in a 16-week paid returnship program. You will be entered in a tailored program designed to jump start your skills through training, hands on projects and customer interaction. You will have an opportunity to update your resume, build connections and participate in fun events as you re-enter the workforce. In this program, you will work with best in class EDA tools, collaborate with R&D and the Sales team in a dynamic, innovative environment. Learn processes that are in the forefront of technology, how a company like Cadence works as well as experience how teams solve problems. We are seeking individuals with experience in Digital Synthesis, Place and Route and Signoff Analysis. Where is this returnship located: San Jose, CA What opportunity is offered: Candidates will find opportunities to be in the Application Engineering field spanning across Digital Synthesis, Place and Route and Signoff Analysis. How long is this returnship: 16 weeks Company Description: At Cadence, our core values are more than just words, they are the way we work, laugh, debate, care, question, and innovate together. We are One Cadence-One Team. Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation (EDA) company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Our team's shared passion for solving the world's toughest technical challenges and drive to do meaningful work makes us proud to be part of Cadence. Our unique culture has been recognized on FORTUNE Magazine's 100 Best Companies to Work For list and garnered accolades from the Great Place To Work Institute around the globe. #LI-MA1 The annual salary range for California is $59,500 to $110,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more. We're doing work that matters. Help us solve what others can't. Additional Jobs (************************************************* Equal Employment Opportunity Policy: Cadence is committed to equal employment opportunity throughout all levels of the organization. + Read the policy(opens in a new tab) (******************************************************************************************************************************** We welcome your interest in the company and want to make sure our job site is accessible to all. If you experience difficulty using this site or to request a reasonable accommodation, please contact ********************. Privacy Policy: Job Applicant If you are a job seeker creating a profile using our careers website, please see the privacy policy(opens in a new tab) (**************************************************************** . E-Verify Cadence participates in the E-Verify program in certain U.S. locations as required by law. Download More Information on E-Verify (64K) (************************************************************************************************************************** Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world's toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence. Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class. Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at ************** and on LinkedIn and Twitter (X). Principal Engineer, eFPGA Place and Route The Group: The charter of ADI's eFPGA team is to co-develop an industry leading heterogenous processing system deploying embedded Field Programmable Gate Arrays (FPGAs) for high-speed, real-time hardware adaptation. An on-going requirement for this capability is the development and support of FPGA backend toolset including timing-driven implementation suite (optimization, place and route, bitstream), reporting (area, timing, power) and debug capabilities. This software suite will be a key part of a larger heterogenous co-processing development environment allowing the ability to design leading-edge products in a variety of applications and markets. The Position: The group is seeking an experienced Principal Engineer to lead and contribute to the development of next generation eFPGA backend tools. This person will manage a small team of highly motivated individuals to guide the realization of an industry-leading eFPGA toolset as well as participate to the overall engineering effort. Responsibilities Manage and motivate a small team of software development engineers to drive all aspects of eFPGA place and route: Database management Netlist import & resource estimation Floorplan import or automatically floorplan creation Wire-length & timing-aware placement Congestion & timing-aware optimization Congestion & timing-aware routing Static timing analysis with support for common SDC syntax Bitstream generation Work closely with synthesis tools providers (Synopsys & Yosys) to efficiently target our devices, especially our DSP and BRAM cells Work closely with software Q&A and applications teams to understand and fulfill software requirements and priorities File and track software issues and tasks to closure in JIRA Document results of assigned tasks and review the results with the team Contribute towards verification strategy and methodology improvement Support verification of bitstream simulation & silicon debug Support and establish formal verification targeting automotive requirements For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position - except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) - may have to go through an export licensing review process. Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group. EEO is the Law: Notice of Applicant Rights Under the Law. Job Req Type: ExperiencedRequired Travel: Yes, 10% of the time Shift Type: 1st Shift/DaysThe expected wage range for a new hire into this position is $170,775 to $256,163. Actual wage offered may vary depending on work location, experience, education, training, external market data, internal pay equity, or other bona fide factors. This position qualifies for a discretionary performance-based bonus which is based on personal and company factors. This position includes medical, vision and dental coverage, 401k, paid vacation, holidays, and sick time, and other benefits.

Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at ************** and on LinkedIn and Twitter (X). Principal Engineer - Time-Series & Sensor Reasoning Models (Lorenz Labs) About Analog Devices & Lorenz Labs Analog Devices (NASDAQ: ADI) is a global leader in semiconductors that bridge the physical and digital worlds. Our mission is to enable breakthroughs at the Intelligent Edge-where sensors, compute, and AI converge to transform industries from mobility to healthcare. Lorenz Labs, ADI's advanced AI engineering group within Edge AI, is pioneering the frontier of Physical Intelligence-developing foundation models and agentic systems that can reason about the physical world. We are building the next generation of models that go beyond language and vision, into time, signals, and embodied experience. Our long-term ambition is the realization of an Artificial Engineer: an AI capable of understanding, simulating, and designing electro-physical systems with human-like intuition-complemented by the development of highly optimized embedded models for Edge AI. About the Role We are seeking a Principal Engineer in Time-Series & Sensor Foundation Models to advance AI engineering at the intersection of sensing, signal intelligence, and large-scale temporal modeling. This role will develop architectures that unify multimodal sensor data-including audio, motion, photonic, and physiological signals-into a coherent foundation for context-aware reasoning across time. Your work will contribute directly to ADI's PhysGPT suite of physically-intelligent reasoning models. Building on ADI's leadership in sensing and edge intelligence, you will extend foundation-scale modeling into domains such as health, industrial systems, and robotics-enabling anomaly detection, forecasting, and cross-sensor understanding that bridge physics and AI. You will explore compact architectures such as Tiny Recursive Models and other efficient recurrent paradigms for resource-constrained edge inference, while advancing contextually-aware audio reasoning and sensor fusion learning frameworks that enable systems to interpret their environment with human-like sensitivity. Beyond runtime intelligence, your work will extend into design-time reasoning-developing models and tools that accelerate the creation and optimization of foundation models through physics alignment and tool-in-the-loop optimization, transforming how AI learns from and designs for the physical world. Key Responsibilities Lead R&D on time-series foundation models that integrate multi-sensor streams (e.g., audio, motion, environmental, and physiological). Develop compact, recursive, and hybrid modeling approaches (e.g., Tiny Recursive Models, Liquid Neural Networks, State-Space Transformers) for efficient deployment on edge hardware. Advance research in sensor fusion, enabling cross-modal alignment between acoustic, inertial, and photonic domains. Explore audio reasoning models that interpret context and intent through dynamic acoustic and environmental cues. Create benchmarking pipelines for cross-domain time-series foundation models, covering representation robustness, interpretability, and hardware performance metrics. Apply alignment and fine-tuning methods such as LoRA, Q-LoRA, adapter-tuning, and contrastive alignment for multimodal sensor datasets. Investigate modern foundation alignment techniques, including DPO (Direct Preference Optimization) and RLAIF (Reinforcement Learning from AI Feedback) for physical and sensory reasoning tasks. Partner with ADI's hardware, signal processing, and systems teams to co-design architectures for real-time, energy-efficient sensing applications. Publish and represent ADI at major ML and signal-processing venues (NeurIPS, ICLR, ICML, ICASSP, KDD), often in conjunction with leading AI industry partners. Mentor junior researchers and help shape Lorenz Labs' strategy for foundation models that understand and reason about physical systems. Must Have Skills Deep expertise in time-series ML, signal processing, and foundation models (Chronos, TimesFM, TimeGPT, etc.). Strong background in sensor modeling and signal fusion (e.g., PPG, IMU, audio, photonics, or industrial sensors). Experience in context-aware and multimodal reasoning-especially involving audio perception, biosignals, or environmental context. Proficiency in representation learning, causal inference, and motif discovery in high-dimensional temporal data. Familiarity with benchmarking, evaluation, and robustness testing of foundation and fine-tuned models. Proven hands-on expertise with modern alignment and fine-tuning strategies, including parameter-efficient fine-tuning, LoRA/Q-LoRA, and reward-based optimization methods (DPO, PPO, RLAIF). Fluency in Python, PyTorch, and large-scale training pipelines using cloud or distributed systems (AWS, GCP, etc.). Ability to collaborate across disciplines-ML, hardware, and embedded systems-and translate research into deployable physical intelligence systems. Preferred Education and Experience Ph.D. in Electrical Engineering, Computer Science, or Applied Physics. 10+ years of combined research and industrial experience in ML, signal processing, or embedded sensing. Demonstrated leadership in bridging sensing hardware with foundation model architectures. Record of innovation through patents, publications, or open-source contributions. Why You Will Love Working Here At Lorenz Labs, you will work at the frontier of AI, sensors, and the physical world. You will help define a new paradigm-models that understand time, context, and matter-driving the next wave of physical intelligence. Backed by ADI's data, hardware ecosystem, and scientific reach, you will shape the future of PhysGPT and the Artificial Engineer-where the edge learns to reason. For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position - except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) - may have to go through an export licensing review process. Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group. EEO is the Law: Notice of Applicant Rights Under the Law. Job Req Type: ExperiencedRequired Travel: Yes, 10% of the time Shift Type: 1st Shift/DaysThe expected wage range for a new hire into this position is $170,775 to $256,163. Actual wage offered may vary depending on work location, experience, education, training, external market data, internal pay equity, or other bona fide factors. This position qualifies for a discretionary performance-based bonus which is based on personal and company factors. This position includes medical, vision and dental coverage, 401k, paid vacation, holidays, and sick time, and other benefits.

Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at ************** and on LinkedIn and Twitter (X). Principal AI Engineer, Intelligent Sensors Role Overview: The Edge AI team is seeking a Principal AI Engineer to lead the development of innovative AI solutions for intelligent sensors that enable real-time decision-making in constrained environments. This role focuses on designing and implementing next-generation AI building blocks co-designed with novel sensors that can operate reliably on resource-limited hardware, leveraging optimization techniques and advanced AI methodologies. The ideal candidate will have a strong background in both hardware design and hardware-aware AI models and the ability to lead major technical initiatives while collaborating with cross-functional teams. Key Responsibilities: Drive the development of AI-enabled intelligent sensors in conjunction with our sensor and digital hardware teams. Couple new hardware architectures or sensing techniques with physics-aware AI models. Lead efforts in hardware-aware AI optimization to achieve efficient and scalable solutions. Take part and lead the AI aspect of hardware/AI codesigns with adjacent teams. Support the creation of reusable AI building blocks for intelligent sensors, ensuring scalability and adaptability across applications. Provide technical leadership and mentorship to junior engineers, fostering innovation and collaboration. Stay current on advancements in AI, edge computing, and sensor technologies, applying state-of-the-art techniques to solve challenging problems. Qualifications: Master's degree or equivalent experience. 8+ years of industry experience in AI/ML model development, optimization, and deployment. Deep expertise in sensing, analog, or hardware technologies, with hands-on experience. Demonstrated leadership of technologies or teams to develop cutting edge solutions touching hardware, software, and AI. Strong understanding of hardware-aware AI, including benchmarking and performance evaluation on embedded platforms. Proficiency in Python, C++, and modern AI frameworks (e.g., TensorFlow, PyTorch, ONNX). Ability to lead technical projects and collaborate effectively across multidisciplinary teams. Preferred Skills: Experience with sensor fusion, perception, and decision-making systems. Familiarity with designing custom AI architectures for edge devices with tight compute and power constraints. Knowledge of Analog Devices hardware platforms or similar embedded ecosystems. Strong communication and leadership skills, with a track record of mentoring and growing engineering talent. For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position - except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) - may have to go through an export licensing review process. Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group. EEO is the Law: Notice of Applicant Rights Under the Law. Job Req Type: ExperiencedRequired Travel: Yes, 10% of the time Shift Type: 1st Shift/DaysThe expected wage range for a new hire into this position is $170,775 to $256,163. Actual wage offered may vary depending on work location, experience, education, training, external market data, internal pay equity, or other bona fide factors. This position qualifies for a discretionary performance-based bonus which is based on personal and company factors. This position includes medical, vision and dental coverage, 401k, paid vacation, holidays, and sick time, and other benefits.

Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at ************** and on LinkedIn and Twitter (X). Analog Devices is committed to investing in our people and their growth. Our hiring program features high-impact professional development, opportunities to drive meaningful projects that are directly tied to business goals, and unique executive exposure. We aim to develop new talent and provide practical, real-world experience. The ADI Power uModule Team is seeking a skilled Staff Applications Engineer to advance our uModule business. This role is ideal for a talented engineer ready to independently deliver complex solutions and contribute deep technical expertise to the team and customers. Key Responsibilities Execute development of innovative power module solutions, focusing on technical excellence in design and customer support. Lead technical investigations and define specifications within your product area, collaborating closely with immediate product and engineering teams. Drive evaluation, optimization, and testing to enhance converter and system performance for a diverse set of applications. Provide direct technical support to marketing, field teams, and customers, ensuring successful product adoption. Develop and refine simulation models, tools, and circuits within assigned product lines. Create technical documentation and deliver presentations for team and customer audiences. Mentor junior engineers within the immediate team. Minimum Qualifications MSEE in power electronics plus at least 4 years of relevant experience. Demonstrated technical leadership within a product or functional team. Strong expertise in designing, building, and testing switching-mode power supplies. Skilled with simulation and modeling tools. Excellent communication and teamwork skills; able to collaborate in multidisciplinary environments. Preferred Qualifications Experience in schematic design, PCB layout, simulation, prototyping, and lab evaluation. Familiarity with analog IC design and multiphase converters. Experience supporting customer engagements and delivering technical training. Knowledge of embedded programming and communication protocols (e.g., I2C/PMbus). For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position - except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) - may have to go through an export licensing review process. Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group. EEO is the Law: Notice of Applicant Rights Under the Law. Job Req Type: ExperiencedRequired Travel: Yes, 10% of the time Shift Type: 1st Shift/DaysThe expected wage range for a new hire into this position is $144,038 to $216,056. Actual wage offered may vary depending on work location, experience, education, training, external market data, internal pay equity, or other bona fide factors. This position qualifies for a discretionary performance-based bonus which is based on personal and company factors. This position includes medical, vision and dental coverage, 401k, paid vacation, holidays, and sick time, and other benefits.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: If you are an experienced Compiler Engineer with passion to work on leading edge optimizing compilers for AMD GPU, we would love to talk to you and share with you the many exciting projects we are working on. THE PERSON: We are building first class compilation technology for AMD GPU. The successful candidate will work on language implementation and optimization in the open source LLVM compiler framework. Our compilers are used in the development of AMD Machine Learning frameworks and libraries, as well as HPC applications. The successful candidate will have a phenomenal opportunity to work closely with AMD first class Machine Learning, HPC and Library developers to get the best performance from the compiler. KEY RESPONSIBILITIES: * Work in the open source developing new features and improvements in the AMD GPU compiler * Analyze performance and correctness issues * Participate in internal and external code reviews * Work with machine learning frameworks and HPC applications to identify and implement compiler enhancements for existing and future AMD GPU hardware * Represent AMD in open source communities PREFERRED EXPERIENCE: * Strong background in compilers * Strong C/C++ object-oriented programming background * Track record of contributions in the open source LLVM project * Good understanding of GPU execution model and architecture * Parallel Programming Models, Languages and Runtime Systems * Effective communication and problem-solving skills ACADEMIC CREDENTIALS: * Bachelor's, Master's, or PhD degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent #LI-CJ3 #LI-Remote Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: As a member of this team you will ensure the performance requirements of the silicon and the cost requirements of the product are met through the integration of silicon, package and platform electrical design. Packaging Signal Integrity also provides design support to engineering design teams for both current and forward-looking product development and feasibility studies. We have competitive benefit packages and an award-winning culture. Join us! KEY RESPONSIBILITIES: * Responsible for Signal Integrity and Power Integrity simulations at feasibility, pre-layout, post-layout phases of AECG characterization board and demo board design. Establish design and layout guidelines. * Responsible for coordinating with HW design team, layout team, NPI and manufacturing vendors to resolve SI/PI related issues. * Responsible for end-to-end channel simulations for multi gigabit serial lines like 56Gbps, 112Gbps and beyond. * Responsible for SI and timing margin simulations of HBM/ /DDR4/LPDDR4/DDR5/LPDDR5 and other memory buses. * Responsible for characterizing the various interfaces in the product and verifying the simulations against measurements. * Responsible for preparation of and implementing checklists for various stages of PCB development. * Worked with architecture team, package design team and PCB design team for future PCB technology. * Update the SIPI design and analysis flow and automate the process. PREFERRED EXPERIENCE: * Excellent analytical and problem-solving skills along with attention to details. * Need a self-starter, someone able to drive tasks independently and efficiently to completion. * Strong/effective communication skills. * Enthusiastic team-first mentality. * Experience with PCB, Package and IC level power delivery networks. * Experience in silicon packaging and PCB design for signal and power integrity. * Experience with high-speed digital signaling interfaces such as PCIE, GDDR6, HDMI. * Expertise in electrical modeling EDA and AMS tools such as ADS, HFSS, SIwave, HSPICE. * Expertise in electromagnetic theory and circuit analysis. * Experience with programming in Python, C++, Matlab. ACADEMIC CREDENTIALS: MS or PhD in Electrical Engineering LOCATION: San Jose, CA #LI-GW1 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: Responsibilities will include executing product activities, product test operation, test data analysis and failure debug to identify root causes of failure for timely introduction of AMD's products to the market. This position also requires you to characterize product functionality as well as performance and establish optimized wafer volume manufacturing test flow to deliver AMD' products supporting market requirements. THE PERSON: We are looking for a talented Product Development Engineer to be part of New Production Introduction (NPI) product engineering team in AMD. In this position, you will be supporting AMD's product VNC and wafer sort activities to enable the fastest new product introduction from 1st silicon to production. KEY RESPONSIBILITIES: * Design and execute early product evaluation and debug to enable fast time to market * Collect and analyze product test data for any product related issues to identify root cause and provide corrective actions * Define verification plan for product performance and functionality window changes over time and implement proper screen as well as guard bands in production test * Actively participate in cross function team including product test, pattern development and process engineer to efficiently debug any product failures and come up with optimal solutions * Continue driving innovative test methodologies to target the highest level of product quality to meet specific needs for various market segments PREFERRED EXPERIENCE: * Experience using ATE test program and test operations * Proficiency in JMP Statistical Analysis Tool and Tableau. Basic knowledge in Python and other engineering scripting languages * Solid understanding and extensive knowledge on performing statistical data analysis * Knowledge and understanding of digital circuit and IC operation * Excellent problem-solving and failure debug skills are a must * Capable of working with cross functional teams with good communication skills to efficiently resolve issues and identify corrective actions * Experience in silicon test methodologies and implementation is a plus ACADEMIC CREDENTIALS: * Bachelor's in Electrical Engineering, Computer Science and Engineering or equivalent. LOCATION: San Jose, CA This role is not eligible for visa sponsorship. #LI-AJ1 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. Developer Productivity Engineer THE ROLE: AMD is seeking a Developer Productivity Engineer with a Gradle focus to strengthen our build performance and release reliability for complex, multi-repo systems. You will standardize shared Gradle plugin conventions, optimize task graphs and caching, and orchestrate releases across Dev/QA/Stage/Prod with automated notes and SBOMs. You'll collaborate closely with Security on hotfix and CVE remediation workflows, operate GitHub Actions runners and/or Jenkins at scale, and manage artifacts in Artifactory/Nexus-all while advancing Release-as-Code and working with the latest hardware and software stacks. THE PERSON: You are passionate about modern CI/CD and large-scale build systems, with the leadership to drive sophisticated build and release issues to resolution. You communicate clearly, partner effectively across engineering, QA, and security, and mentor teams on best practices. You bring deep experience with Gradle (or are eager to specialize quickly), strong Git skills, and hands-on problem solving. C/C++ build experience and familiarity with EDA flows are pluses, as are cloud platform certifications (AWS/Azure/GCP) and experience operating self-hosted GitHub Actions runners. KEY RESPONSIBILITIES: Build System Engineering * Develop and maintain Gradle plugins (Java/Kotlin/Groovy) and shared build conventions. * Optimize task graphs, caching, and build performance; migrate legacy builds (Maven/Ant) to Gradle. * Debug dependency issues, annotation processors, and incremental build/cache misses. CI/CD and Infrastructure * Drive Release-as-Code; integrate gates (tests/security scans); manage GitHub Actions runners and/or Jenkins. * Containerize release tooling (Docker/K8s/Helm) when appropriate. Leadership and Enablement * Serve as SME and mentor for build/release topics; document plugin APIs and developer self-service patterns. Release Orchestration and Governance * Define branching/versioning/tagging, manage promotion across Dev/QA/Stage/Prod, and automate release notes/SBOMs. * Manage artifact repositories (e.g., Artifactory/Nexus), retention, and immutable release bundles. Patch and Security Response * Design hotfix/patch workflows; coordinate cherry-picks across maintenance brances; ensure timely CVE remediation. PREFERRED EXPERIENCE: * Strong object-oriented programming background, C/C++ preferred. * Solid experience in Release/Build/DevOps engineering with enterprise-scale CI/CD. * Expert-level Gradle or equivalent large-scale build system experience; hands-on custom plugin development preferred. * Deep GitHub and GITHub actions expertise; Perforce experience a plus. * Proven track record managing complex release trains, Day-2 operations (patching/hotfix), and artificial lifecycle. * Proficiency with Artifactory/Nexus; CI/CD (GitHub Actions and/or Jenkins); containers (Docker/K8s). * Experience with Windows, Linux and/or Android operating system development. * Experience with software development processes and tools such as debuggers, source code control systems (GitHub) and profilers is a plus. * Effective communication and problem-solving skills. ACADEMIC CREDENTIALS: * Bachelor's or Master's degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent This role is not eligible for visa sponsorship. #LI-GW1 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

What you do at AMD changes everything At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies - building blocks for gaming, immersive platforms, and the data center. Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to take a look at the opportunities available to come join our team. ***POSITION CAN BE DONE REMOTELY FROM U.S. AND CANADA*** THE ROLE: AMD is looking for a seasoned Member of Technical Staff Product Development Engineer with extensive experience in HW/SW system design and methodology to help boost design productivity and performance across current and future AMD Versal ACAP platforms. Versal ACAP combines ARM processors, programmable logic (FPGA), AI engine arrays and numerous cutting edge memory and connectivity IPs, assembled to deliver powerful heterogeneous acceleration for any application. The Product Engineer position is in the ACAP Interactive Design and Compilation Tools applications team, and is located in North America, preferably in Longmont CO or San Jose CA. THE PERSON: The successful candidate will work closely with several AMD software and hardware R&D teams to improve the current Vivado design creation experience and enable higher productivity for the next generation of designs across key markets (5G, wired communication, test & measurement, video, machine learning). The candidate will own one or several product areas, such as for example IP Integration, addressing, IP wizards, design project & infrastructure, compilation & simulation flows, which are major components of the Vivado design ecosystem. KEY RESPONSIBILITIES: Deep-dive on new and critical tool issues seen by customers or internal AMD teams, to identify work-arounds and drive resolution in future releases aiming at boosting. Interact with the Field team to review proposals and schedule. Work closely with Marketing and Engineering on tools specifications for Vivado and for the next generation Design and Compilation Tools. Develop and deliver training materials on new features. Interface with Senior Management, Quality, Tech Marketing and Application teams to ensure issues are resolved and corrective actions completed. Use HW/SW system design experience to drive methodologies, illustrate best practices by developing design examples, tutorials, short videos and demos. Stay current with and propose the internal use of industry approaches, algorithms, and practices. PREFERRED EXPERIENCE: Customer Awareness: Has excellent working knowledge of system design flows and expectations Product Knowledge: Has excellent working knowledge of the entire FPGA or ASIC design process and tool flow, with expertise in AXI or equivalent protocols, system software dependencies, Linux. Has hands-on experience with HDL, Tcl (or Python), physical implementation flows and verification tools Design Enablement: Expert in design performance analysis, verification methodologies, and demo creation Problem Solving: Ability to handle and solve complex system level issues, internally and with tier-1 customers Technical Communication: Can simplify and communicate complex subjects, by articulating options, tradeoffs, and clarifying potential impacts ACADEMIC CREDENTIALS: MS or equivalent work experience in Electrical Engineering or similar technology area, with minimum 8 years of relevant experience desired #LI-JW2 Requisition Number: 179362 Country: United States State: California City: San Jose Job Function: Product Engineering AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

What you do at AMD changes everything We care deeply about transforming lives with AMD technology to enrich our industry, our communities and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence, while being direct, humble, collaborative and inclusive of diverse perspectives. This is who we are at our best. One Company. One Team. AMD together we advance_ MEMBER OF TECHNICAL STAFF, PRODUCT ENGINEER THE ROLE: As a member of a highly seasoned Product Engineering team, the successful candidate will work closely with several R&D teams, internal application design teams and tier-1 customers to improve the Programmable Logic and overall SoC Partial Reconfiguration user experience and enable the next generation of designs across the UltraScale and Versal ACAP device families. THE PERSON: The Product Engineer position is in the Software & AI Products group and seek an experienced application engineer to focus on FPGA & ACAP design and compilation tools, ease-of-use, SW features specification, first-pass validation, documentation and key customers engagement. KEY RESPONSIBILITES: Drive or contribute to key product areas, such as design planning, partitioning, floorplanning, implementation, configuration and verification. Handle key customer escalations from analysis to closure, while collaborating with the Field team. Contribute to triaging reported issues in several Vivado product areas, such as design entry, floorplanning, programming, and help engineering address them effectively. Actively explore innovative methodologies, their impact on flow and design practices, with emphasis on design closure with clear messaging and DRCs, as well as productivity with the new Versal ACAP family. Work closely with AMD Business Units (Data Center, Wired, Wireless, Emulation & Prototyping, Test Equipment) to improve their designs, products and customer experience. Develop and deliver training materials on new features and methodologies. Stay current with and propose the internal use of industry approaches, algorithms, and practices. PREFERRED EXPERIENCE: Customer Awareness: Has excellent working knowledge of RTL-based design flows and expectations. Product Knowledge: Has good working knowledge of the entire FPGA or ASIC design process and tool flow, with intermediate-to-advanced understanding in timing analysis and closure. Scripting experience (Tcl, Python) is desired. Design Enablement: Has good understanding of design methodologies for design partitioning, floorplanning and verification. Problem Solving: Ability to handle and solve complex system level issues. Technical Communication: Can simplify and communicate even the most complex subjects, making options, tradeoffs, and impact clear. Can report out to management in a concise and actionable manner. Able to work with several teams across sites and domains with a positive attitude under variable workloads. ACADEMIC CREDENTIALS: MS or equivalent work experience in Electrical Engineering or similar technology area LOCATION: San Jose, Ca. #LI-JT1 Requisition Number: 182401 Country: United States State: California City: San Jose Job Function: Product Engineering Benefits offered are described here. AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

What you do at AMD changes everything At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies - building blocks for gaming, immersive platforms, and the data center. Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to take a look at the opportunities available to come join our team. PRODUCT DEVELOPMENT ENGINEER 2 THE ROLE: The Product Engineer position is in the Interactive Design and ACAP Compilation Tools applications team, located in Longmont, Colorado, USA, for a skilled and self-motivated engineer to focus on tools specification, early validation, training, documentation and key customer support. The successful candidate will work closely with several Xilinx software R&D teams, including IP, embedded processing, infrastructure, flow and GUI to improve the Vivado design entry experience and to enable higher design productivity for the next generation of designs across markets (5G, communication, test, acceleration, machine learning) and Xilinx devices. KEY RESPONSIBILITIES: Assist with defining specifications and propose creative solutions for future FPGA and ACAP SoC devices support or to solve existing persistent and pervasive customer issues Adopt proper tool methodology, and illustrate best practices via examples, tutorials and demos based on a diversity of HW designs Explore critical tool issues seen by customers and help identify workarounds and future enhancements Track, prioritize, and assign reported tool issues to the appropriate engineering teams Participate in cross functional meetings with other engineering, marketing and quality teams to ensure issues are resolved efficiently Author intuitive documentation tuned to the needs of the reader for their areas of expertise Continuously learn about complimentary Xilinx technologies, such as Vitis, HLS, System SW, Alveo boards Stay current with and proposing the internal use of industry approaches, algorithms, and practices PREFERRED EXPERIENCES: Customer Awareness: Has working knowledge of system design flows and expectations Product Knowledge: Has working knowledge of FPGA or ASIC design processes, tools and flows, and has exposure to AXI protocols, system software dependencies, and Linux. Has hands-on experience with HDL, Tcl (or Python), physical implementation flows and verification tools. Hands-on Vivado experience is a benefit but not strictly a requirement. Design Enablement: Experience with performance analysis, verification methodologies, and demo creation Problem Solving: Assist with solving complex system level issues with tier-1 customers Technical Communication: Can simplify and communicate complex subjects, by articulating options, tradeoffs, and clarifying potential impacts Beneficial Skills: Experience with embedded hardware systems, Linux based operating systems, system software, and device tree generation. Hardware design experience with Verilog, SystemVerilog, or VHDL are also beneficial. ACADEMIC CREDENTIALS: MS or equivalent work experience in Electrical Engineering or similar technology area, with minimum 2 years of relevant experience #LI-JY1 Requisition Number: 152968 Country: United States State: California City: San Jose Job Function: Product Engineering Benefits offered are described here. AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. KEY RESPONSIBILITIES: * Develops characterization and silicon validation plans for high speed transceivers * Defines methodologies for characterization and silicon validation of high speed serial systems * Characterize high speed SERDES with automated flows * Data analysis and create characterization reports * Correlation of pre-silicon results with silicon measurements * Drives direct and cross-functional teams to expand capability, productivity and effectiveness to deliver improvements in cost, quality and manufacturability PREFERRED EXPERIENCE: * Experience in characterizing PLL, CDR, TX/RX analog front-end * PLL phase noise measurement, transmitter output jitter measurement, receiver jitter tolerance measurement * Hands on experience in laboratory environment, using lab equipment such as sampling oscilloscope, high performance BERT, logic analyzers, spectrum analyzers, BERT scopes, function/pulse generator * Experience in transceiver electrical compliance testing (PCIE, IEEE 802.3, OIF-CEI) * Experience in using automated methodologies to maximize use of equipment * Experience working with FPGA and/or SOC Architectures * Understanding of PCB schematic and layout * Strong analytical, problem-solving and debugging skills * Experience in protocol testing (PCIE, SATA, SGMII, 100GBASE-X) * Skills: Verilog, Python, Perl, TCL ACADEMIC CREDENTIALS: BSEE/MSEE with extensive experience in product characterization or validation field LOCATION: San Jose, CA This role is not eligible for visa sponsorship. #LI-TW2 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

As a GIS subject matter expert, you're a natural at identifying the right analysis tools for the problem at hand. Not only do you create innovative solutions, you present solutions in ways that get others excited about the power of GIS technology. Join a technical team focused on supporting Esri's most strategic partners and advise partners on their most complex business challenges. Leverage your problem-solving skills to demonstrate the value of GIS and how it finds unique patterns, trends, and understanding. At Esri, we are committed to our partners and their success. It is a place for you to do your best work and amid a supportive culture that encourages creativity, collaboration, and passion. Responsibilities Build relationships. Present, demonstrate, and support selling Esri software and solutions. Gain access to technical enterprise-level decision makers and lead technical meetings that drive revenue. Be an expert. Be a technical leader of Esri technology as well as a subject matter expert of integrating ArcGIS with other systems. Demonstrate your advanced understanding of sales strategies and initiatives to develop complex solutions for Esri's most strategic partners. Understand an organization's business structure, associated workflows, third party business systems, and integration points. Share knowledge and coach new team members on best practices. Solve problems. Proactively craft and propose solutions that clarify how GIS brings business value to our partners by addressing the critical challenges they face. Define and deliver complex strategies that align Esri technology with our largest partners' business needs. Tell our story. Design presentations for technical and non-technical audiences within Esri's largest customers. Provide configuration guidance and best practices. Present at large conferences and executive engagements. Requirements 5+ years of experience with Esri technology creating maps, performing spatial analysis, and configuring web applications 3+ years of experience with Esri developer technology Broad knowledge of ArcGIS from an IT context (such as hardware, storage, security, networking, web services, virtualization, cloud computing) Demonstrated experience in technical consulting and conceptual solution design Understanding of sales and business development processes, with an emphasis on partnering Ability to troubleshoot client issues related to Esri application deployment and system architecture Experience with geodatabases and underlying DBMS technology Knowledge of cloud computing concepts and environments (Microsoft Azure or AWS) Experience integrating software solutions with other business systems including data warehousing, BI, CRM, ERP, and analytics platforms Programming and scripting experience with languages such as Python and JavaScript Remarkable presentation, interpersonal, and listening skills Ability to travel domestically or internationally 25-50% Bachelor's in geography, computer science, or a related field Visa sponsorship is not available for this posting. Applicants must be authorized to work for any employer in the U.S. Recommended Qualifications Experience incorporating real-time information streams with existing GIS data and IT infrastructure Knowledge of digitalization strategies that include mobile, IoT, advanced analytics and data science (AI/ML), and imagery Master's in GIS, computer science, or a related field Demonstrated ability to evaluate and prototype the integration of Generative AI technologies (ex. LLMs) Questions about our interview process? We have answers. #LI-AC1

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: We are looking for an adaptive, self-motivated formal verification engineer to join our growing team. As a key contributor, you will be part of a highly collaborative team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. Specifically, the Formal Verification Team is an integral part of AMD's Cores Development Team, responsible for the development of the next generation processor cores. This team embraces innovation to improve time to market while beating performance, power and quality expectations. THE PERSON: You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Apply Advanced Formal Verification Techniques to AMDs cutting edge design for achieving Full Proofs. Maintain the best-in-class formal verification infrastructure to improve formal verification productivity. Develop technical relationship with broader AMD Design community and peers. Drive cross-department innovation and collaboration inside AMD. Be part of the R&D group for emerging formal verification domains like security, safety, low power, architecture level formal verification, etc. PREFERRED EXPERIENCE: ASIC design, verification, or related work experience in Formal Verification. Verification skills: Formal verification, Assertion based verification, FPV and/or DPV. Complexity Analysis, Design Abstraction & Formal Coverage. Design debug, Deep bug hunting. Formal test planning, Formal tools - Jasper and/or VC-formal. System Verilog, Verilog or VHDL, Scripting (TCL/Python) skills required. Design knowledge either or all domains of CPU, GPU, Bus/Noc/Interconnect, Memory Controllers, Cache preferred. ACADEMIC CREDENTIALS: BS in Computer Engineering, Computer Science, Electrical Engineering or other related fields with extensive work experience, and/or MS / PhD with some work experience. LOCATION: Santa Clara, CA #LI-MF2 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

Esri is seeking a Senior GIS Engineer to join the Global Community Engagement Team, where you will act as a geospatial champion building and delivering ArcGIS based solutions to communities within and outside of Esri. In this role, you will leverage ArcGIS, with latest AI advancements plus it's associated data, maps, apps and integration capabilities, to demonstrate The Geographic Approach in action. This is a great opportunity to be creative in how ArcGIS technology can be configured at an advanced level to deliver engaging solutions. Your responsibilities include working alongside other GIS Engineers, Product Engineers, internal teams and Esri Distributor staff to design and develop state of the art content delivery systems for stakeholders, business leaders and their communities. Where necessary you will enhance the ArcGIS experiences and workflows with relevant customization via common programming languages. Responsibilities Be an expert: Be proficient across ArcGIS and demonstrate the technology in new innovative ways. Understand stakeholder requirements, trends and associated workflows and incorporate these into your outputs. Drive innovation: Utilize front and back-end programming skills, such as HTML, CSS, ArcGIS API for JavaScript, Python, and more to enhance the delivery of ArcGIS based solutions, specifically ArcGIS Hub and ArcGIS Online. Deliver these with Project Management and Quality Assurance processes in mind. Solve problems: individually and as part of a team, proactively craft and propose solutions that demonstrate how geospatial brings value to users and communities. Tell our story: Design presentations and supporting materials for technical and non-technical audiences. Leverage existing and future Engagement Templates and Esri Unique Selling Points outputs. Create configuration guidance and best practices. Present to larger audiences where necessary. Influence: Contribute to the global community engagement strategy for Esri and collaborate with a team of technical contributors and stakeholders distributed globally. Requirements 5+ years of professional experience working with ArcGIS Technology, with a focus on ArcGIS Online and ArcGIS Hub and associated apps A passion for geographic knowledge and spatial thinking, promoting The Geographic Approach and experience of systems thinking A strong drive and interest to learn and launch new ideas quickly and work in a fast-paced team environment with a disciplined, process-oriented mindset Experience configuring and publishing ArcGIS data, maps, and apps with advanced configuration desirable, including interoperability Programming and scripting experience with languages such as HTML, CSS, Python and JavaScript; exposure and experience with latest AI tools in this space is desirable Strong presentation skills, with excellent verbal and written communication along with virtual and in-person collaboration skills International collaboration and business experience, working with multiple cultures, developed and emerging markets Ability to travel up to 10% domestically and internationally Bachelors in geography, computer science, or GIS-related field Visa sponsorship is not available for this posting. Applicants must be authorized to work for any employer in the U.S. Recommended Qualifications Knowledge of project management and design processes Certificates in common programming and scripting languages Prior learning or experience in business strategy, team leadership, technical or data science is a plus #LI-Onsite #LI-OH1

Category Engineering Hire Type Employee Job ID 12583 Base Salary Range $157000-$235000 Remote Eligible No Date Posted 21/08/2025 This position requires access to or use of information, which is subject to export restrictions, including the International Traffic in Arms Regulations (ITAR). All applicants for this position must be "U.S. Persons" within the meaning of the ITAR. "U.S. Persons" include U.S. Citizens, U.S. Lawful Permanent Residents (i.e. 'Green Card Holders'), Political Asylees, Refugees or other protected individuals as defined by 8 U.S.C. 1324b(a)(3). This role is required to work onsite in our Sunnyvale CA location. We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and experienced engineer with a deep understanding of the RTL to GDSII flow. You thrive on solving complex technical issues and enjoy working closely with customers to enhance their experience with cutting-edge technology. With your strong background in synthesis, physical design, and static timing analysis, you excel in diagnosing and resolving technical challenges. You are an excellent communicator, capable of conveying technical concepts clearly and effectively to both technical and non-technical stakeholders. Your scripting skills in Perl, Tcl, and Python, along with your knowledge of CAD automation methods, make you a valuable asset to any team. You are motivated to work collaboratively with internal teams and customers to drive product adoption and satisfaction. What You'll Be Doing: * Providing technical and engineering insight to support and improve the usability, applicability, and adoption of Synopsys products. * Diagnosing, troubleshooting, and resolving complex technical issues on customer installations. * Deploying and training customers on new implementations and capabilities. * Reviewing and acting upon product feedback and solutions performance from customers and other application partners. * Working directly with R&D to develop and implement the technical roadmap, specifications, and validation for improvements and enhancements. * Partnering with customer technical managers and Sales to identify business challenges and develop effective technical solutions for new accounts. The Impact You Will Have: * Enhancing customer satisfaction by ensuring seamless product deployment and support. * Driving product adoption and utilization through effective technical training and support. * Contributing to the technical roadmap and product improvements based on customer feedback. * Supporting the sales team in acquiring new accounts by providing technical expertise. * Improving product performance and reliability through collaborative efforts with R&D. * Strengthening customer relationships by addressing and resolving technical challenges promptly. What You'll Need: * 7+ years of RTL to GDSII full flow experience or knowledge. * In depth experience debugging complex engineering issues related to STA, DRC/DRV and PPA optimization * Exceptional interest and knowledge of Advanced Node & Design methodologies. * Proven aptitude and motivation to work with internal and customer groups. * Excellent verbal and written presentation/communication skills. * Hands-on experience in synthesis, physical design, static timing analysis, equivalence checking, parasitic extraction, DRC/LVS, and power analysis. * Knowledge of ASIC implementation domains outside of RTL2GDS including RTL coding, Verification, formal checking is a plus. * Good scripting skills (Python, Tcl, Perl); working knowledge of CAD automation methods. Who You Are: * A collaborative team player who thrives in a dynamic environment. * An excellent communicator with the ability to convey complex technical concepts effectively. * A proactive problem-solver with a keen eye for detail. * Customer-focused, with a passion for delivering exceptional service and support. * A continuous learner, always seeking to expand your technical knowledge and skills. The Team You'll Be A Part Of: You will be part of a highly skilled and dedicated team of engineers focused on providing exceptional technical support and solutions to our customers. Our team collaborates closely with R&D, Sales, and Customer Success to drive product innovation, adoption, and satisfaction. We value continuous learning, open communication, and a customer-centric approach in everything we do. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.

Category Engineering Hire Type Employee Job ID 13867 Base Salary Range $109000-$163000 Remote Eligible No Date Posted 20/12/2025 At Synopsys, we drive the innovations that shape the way the world connects and computes. Our technology powers cutting-edge silicon in applications from mobile and AI to autonomous systems and advanced computing. Join us to help customers achieve breakthrough performance using our leading EDA tool suite. We are seeking a Physical Design Engineer with strong technical skills in digital implementation and optimization. In this role you will work with engineering teams and customers to deliver solutions that drive timing closure, power and area optimization, and robust RTL-to-GDS flows using Synopsys tools. You Are You are an ASIC/physical design engineer with 2-4 years of hands-on experience in digital implementation flows. You understand full RTL-to-GDS design flows and are comfortable applying state-of-the-art methodologies to achieve timing closure and quality signoff. You have solid scripting skills to automate flows and customize solutions, and you communicate clearly with internal teams and customers to solve complex design challenges. What You'll Be Doing * Execute RTL-to-GDSII digital implementation flows, including logic synthesis, floorplanning, placement, clock tree synthesis (CTS), routing, and sign-off quality closure. * Work with customers and internal teams to troubleshoot and optimize implementation challenges, propose solutions, and deliver highly-tuned PPA results. * Utilize Synopsys tools such as Fusion Compiler, PrimeTime, and DSO.ai/FusionAI in digital implementation and static timing analysis. * Develop and enhance automation scripts and flows using TCL, Python, Perl, or other scripting languages. * Perform static timing analysis (STA), debug timing violations, and implement ECOs to improve performance and timing closure. * Drive DRC/LVS/Signoff quality closures at advanced technology nodes. * Collaborate with customers, product teams, and research groups to share best practices and feedback to improve tool flows. What You'll Need * Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related discipline. * 2-4 years of hands-on experience in digital physical design or backend implementation. * Experience with full RTL-to-GDS flows, including place & route methodologies, STA, timing closure, and signoff strategies. * Proficiency with Synopsys tools such as Fusion Compiler, PrimeTime, and familiarity with AI-assisted optimization tools (e.g., DSO.ai/FusionAI) is highly desirable. * Solid scripting skills in TCL, Python, Perl, or equivalent for flow automation. * Strong analytical ability to dissect complex timing, PPA, and design challenges. * Familiarity with unix/linux environments and engineering workflows. * Excellent communication skills and ability to work in collaborative team and customer-facing environments. Who You Are * A proactive self-starter who takes ownership of technical solutions and delivery. * Comfortable interfacing with customers and internal teams to understand requirements and deliver effective outcomes. * Able to adapt to evolving methodologies and rapidly learn emerging tool capabilities in EDA. * Detail-oriented and organized, capable of balancing multiple priorities in a fast-paced environment. The Team You'll Be Part Of Join a dynamic Applications Engineering team dedicated to customer success and powerful EDA solutions. You'll work closely with fellow engineers, researchers, and tool developers to enable high-performance physical design solutions and push the boundaries of what's possible in semiconductor design. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Are you looking to re-enter the workforce as a Physical Design Application Engineer after taking a career break for caregiving? Who is eligible to apply: Please ONLY consider applying if you are a Physical Designer and (IMPORTANT) who has been out of the workforce for caregiving for a period of at least two years and have a minimum of three years of Physical Design work experience. This role is not open to new college grads or interns. Please check our career site for those roles. Cadence is offering an opportunity to qualified candidates who meet our eligibility criteria to participate in a 16-week paid returnship program. You will be entered in a tailored program designed to jump start your skills through training, hands on projects and customer interaction. You will have an opportunity to update your resume, build connections and participate in fun events as you re-enter the workforce. In this program, you will work with best in class EDA tools, collaborate with R&D and the Sales team in a dynamic, innovative environment. Learn processes that are in the forefront of technology, how a company like Cadence works as well as experience how teams solve problems. We are seeking individuals with experience in Digital Synthesis, Place and Route and Signoff Analysis. Where is this returnship located: San Jose, CA What opportunity is offered: Candidates will find opportunities to be in the Application Engineering field spanning across Digital Synthesis, Place and Route and Signoff Analysis. How long is this returnship: 16 weeks Company Description: At Cadence, our core values are more than just words, they are the way we work, laugh, debate, care, question, and innovate together. We are One Cadence-One Team. Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation (EDA) company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Our team's shared passion for solving the world's toughest technical challenges and drive to do meaningful work makes us proud to be part of Cadence. Our unique culture has been recognized on FORTUNE Magazine's 100 Best Companies to Work For list and garnered accolades from the Great Place To Work Institute around the globe. #LI-MA1 The annual salary range for California is $59,500 to $110,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more. We're doing work that matters. Help us solve what others can't.