Post job

Design engineer jobs in Palo Alto, CA

- 6,476 jobs
All
Design Engineer
Mechanical Engineer
Asic Design Engineer
Lead Engineer
Hardware Design Engineer
Staff Engineer
Contracting Engineer
Electrical Design Engineer
Application Engineer
Product Engineer
Research Engineer
Integration Engineer
Senior Engineer
Principal Engineer
  • Senor ASIC Design Engineer

    Oho Group Ltd. 3.7company rating

    Design engineer job in San Jose, CA

    As an ASIC Design Engineer you will contribute to the design and development of high-performance processor and SoC technologies. In this role, you will be responsible for: Key Responsibilities Microarchitecture Development & Specification: Drive the process from early high-level architectural exploration and research through detailed microarchitecture definition and specification. RTL Design & Optimization: Develop, evaluate, and refine RTL implementations to achieve power, performance, area, and timing objectives. Design Delivery: Collaborate with cross-functional teams to deliver physical designs that meet timing, area, power, reliability, and testability goals. Validation: Support verification teams in building test benches, performing simulations, and ensuring functional and performance correctness. Performance Analysis: Explore high-performance architectural strategies and validate RTL correlation with target performance metrics. Requirements Strong understanding of microprocessor or SoC design, with 6+ years of experience in one or more of the following domains: High-performance cache controllers (pipeline design, hazard detection, parity/ECC, coherency and replacement policies) Coherent on-chip interconnects/fabrics for high-performance SoCs, including control structure design Proficiency in SystemVerilog Hands-on experience with simulators and waveform debugging tools Solid grasp of logic design principles and their timing/power implications Familiarity with low-power and high-performance microarchitecture techniques Experience programming in C or C++
    $121k-164k yearly est. 1d ago
  • NPI Mechanical Engineer - full time /Direct hire (onsite)

    Maxonic Inc.

    Design engineer job in Fremont, CA

    Job Title: NPI Mechanical Engineer Job Type: Full-time Work Schedule: Onsite Salary: $88000 - 120000/Yearly The Mechanical Engineer (Level 2) works with local manufacturing teams and Taiwan-based design teams to resolve mechanical issues in a timely manner and ensure smooth product development and production support. This role supports new product introduction (NPI), fixture and component design, and continuous improvements in manufacturability and assembly. This position is part of the Engineering Services team, which works across departments to support the engineering and operation teams with technical expertise in electronics, operational software, and systems integration. Responsibilities: Collaborate with cross-functional teams including R&D, manufacturing, and customer support. Analyze and resolve mechanical engineering issues, coordinating with design teams to determine root causes. Manage and guide the transition of NPI products into production, ensuring manufacturability and assembly readiness. Design and validate testing fixtures, jigs, and mechanical components to support new projects and production needs. Provide design-for-manufacturability (DFM) and design-for-assembly (DFA) feedback to improve product quality and efficiency. Review mechanical drawings and specifications for accuracy, tolerance, and compliance with company standards. Perform mechanical stress, fit, and tolerance analyses to ensure reliability and performance. Conduct failure analysis and propose corrective actions for mechanical and structural issues. Support tooling, sheet metal, and plastic component design, fabrication, and inspection. Document and update SOPs (Standard Operating Procedures), work instructions, and test plans. Support factory teams in the U.S. by bridging communication between Taiwan design teams and local production teams. Participate in cost reduction and process improvement initiatives related to mechanical design and manufacturing. Qualifications: Knowledge and experience with server, storage, and/or PC products. Familiarity with creating server assembly standard operating procedures (SOPs) for production lines. Skill in using measuring tools such as calipers and altimeters. Ability to interpret engineering drawings, including dimensional tolerances and GD&T (Geometric Dimensioning & Tolerancing). Understanding sheet metal product production and inspection; familiarity with NCT and hard tooling manufacturing is desirable. Understanding of plastic part production and inspection; familiarity with mold-up and hard tooling processes is desirable. Strong analytical problem-solving and communication skills. Proficiency in CAD tools (e.g., Creo/Pro-E) preferred. Bachelor's or Master's degree in Mechanical Engineering or equivalent. Minimum of 3 years of professional mechanical engineering experience. Ability to walk and stand on cement floors for extended periods. Ability to stoop, bend, and perform repetitive tasks. Prolonged periods of sitting and computer work. Ability to lift up to 30 pounds. About Maxonic: Since 2002 Maxonic has been at the forefront of connecting candidate strengths to client challenges. Our award winning, dedicated team of recruiting professionals are specialized by technology, are great listeners, and will seek to find a position that meets the long-term career needs of our candidates. We take pride in the over 10,000 candidates that we have placed, and the repeat business that we earn from our satisfied clients. Interested in Applying? Please apply with your most current resume. Feel free to contact Pramod Kumar (******************** / *************** for more details.
    $88k-120k yearly 5d ago
  • Mechanical Engineer

    Alexander Chapman

    Design engineer job in San Jose, CA

    Mechanical Engineer (Robotics) We are partnering with a robotics company building complex electro-mechanical systems where mechanical design directly determines real-world performance. This role is for someone who doesn't just design parts, but owns motion, reliability, and scale. What You'll Do Own the end-to-end mechanical design of complex electro-mechanical systems with moving parts Design and prototype custom mechanisms and actuators under aggressive timelines Drive concepts from first prototype through high-volume production Personally design parts for volume manufacturing processes, including: Injection molding Die casting Stamping / sheet metal Extrusion Powder metal / MIM Partner closely with contract manufacturers (CMs) to ensure DFM, reliability, and cost targets are met Build systems that are not just elegant but robust, testable, and shippable at scale What We're Looking For Exceptionally strong mechanical intuition, you understand how things move, fail, and improve Proven ability to design and prototype quickly without sacrificing rigor Track record of shipping reliable, hardware products at scale Deep hands-on experience designing custom mechanisms, joints, transmissions, and actuators Experience owning mechanical architecture for complex systems with dynamic loads and tight tolerances Comfortable operating across ambiguity, tight timelines, and high expectations Required Background Currently working at a robotics company (hands-on mechanical role) Background in electro-mechanical systems with real moving parts (not CAD-only work) Experience taking designs from concept → prototype → volume production Ideal Signals Designed robotic arms, legs, mobile platforms, end-effectors, or actuation systems Personally responsible for motor selection, gearing, kinematics, or load paths Close collaboration with electrical and controls teams Bias for execution and ownership over documentation and theory
    $82k-110k yearly est. 1d ago
  • Mixed Signal Design Engineer

    Clevanoo LLC

    Design engineer job in San Jose, CA

    Analog/Mixed-Signal Verification Engineer San Jose, CA -On-site Full-time/Direct Hire Responsibilities Develop and implement mixed-signal verification and coverage plans for complex IC designs based on design architecture and specifications Design and develop verification testbenches using industry-standard verification languages and methodologies Write and execute test cases to verify mixed-signal circuits for functionality, performance, and reliability Review and analyze verification results, and provide feedback to design teams Collaborate with design and layout teams to identify and resolve design issues Develop new verification methodologies, tools, and techniques, ensuring scalability and portability Sign-off mixed signal designs in preparation for tapeout Write behavioral models from custom analog and mixed-signal circuits in SystemVerilog HDL Collaborate with circuit design teams to understand fine details of custom circuits Collaborate with Design Verification team to craft hooks into the behavioral models for effective verification Run various simulations and equivalence checks to ensure that the model matches closely with the custom circuits Write scripts and simple tools for automating repetitive tasks Optimize and refine models to ensure accuracy while maintaining efficient simulation performance Review and analyze verification results, and provide feedback to design team Document modeling techniques and results for internal and external dissemination Keep updated with industry trends in modeling techniques Requirements Bachelor's degree in Electrical Engineering and 5+ years of relevant industry experience or equivalent Strong understanding of analog and mixed-signal circuit design and verification principles Ability to write test plans, present results, and communicate clearly with multi-functional teams Have a familiarity with verification methodologies and tools: simulators, waveform viewers, execution automation, simulation time optimization, and coverage collection Familiarity with analog behavioral models is a plus Deep knowledge of Verilog/SystemVerilog with ability to write synthesize-able and behavioral code Deep knowledge of digital logic gates, clocking and state elements Deep knowledge of SPICE simulation, HDL simulation and logic equivalence tools Working understanding of analog circuit architecture such as ADC, DAC, LDO, Charge pump, etc. Have good programming skills and can write efficient programs or scripts in Perl, Python, and/or C Excellent debugging, problem-solving and analytical skills Strong communication and teamwork skills -- Vilayath Khan ************************** Manager-TA
    $90k-127k yearly est. 3d ago
  • Machine Learning Research Engineer

    Acceler8 Talent

    Design engineer job in San Francisco, CA

    Machine Learning Research Engineer - Video Intelligence - Up to $250k A Series A Funded start-up who already have millions in recurring revenue are building next-generation AI infrastructure for video intelligence are looking for an Applied Research Engineer to join their team. What You'll Be Doing Build high-performance video understanding systems and large-scale processing pipelines Tackle ambiguous research problems with creative technical solutions Optimize model performance through clever pre/post-processing, parallelism, and inference optimization Work directly with customers and external teams to deliver end-to-end video intelligence products Collaborate with leading AI video labs on cutting-edge applications What We're Looking For 3+ years experience in computer vision or audio processing Strong Python skills with PyTorch or similar ML frameworks Excellent communication abilities, especially customer-facing Clean, maintainable coding practices Product-minded approach - you want to build complete solutions, not just train models Early startup experience is a plus What's In It For You: Competitive salary up to $250k Small, high-impact team with significant growth trajectory Opportunity to work with top AI video labs and collect world-class datasets Apply now for immediate consideration!
    $250k yearly 5d ago
  • Staff Backend Engineer

    80Twenty

    Design engineer job in San Francisco, CA

    80Twenty is a boutique marketing recruitment agency that connects high-growth companies with exceptional candidates. Want to build technology that truly moves the needle in healthcare? Join a fast-scaling, profitable healthcare services company - independently grown and not VC-backed - on a mission to make healthcare simpler, smarter, and more human! Our client is a healthcare tech and services company based in San Francisco, combining clinical expertise, operational excellence, and modern engineering to reshape how people experience care. From personalized medication management and transparent pharmacy pricing to community-based chronic care support, we're building a system that empowers both patients and providers. This is a fully onsite role based in San Francisco, CA. Candidates must be located within 30 miles of San Francisco. The standard schedule is Monday-Friday, 9am-7pm and may vary depending on business needs and role responsibilities. In this role, you will: Design, build, and scale backend services that power pharmacy, telehealth, and patient-facing workflows. Collaborate cross-functionally with product, operations, and pharmacy teams to deliver seamless integrations and reliable systems. Lead architectural design discussions and set long-term technical direction for the backend stack. Implement best practices for system reliability, observability, security, and scalability. Drive operational excellence through CI/CD pipelines, cloud infrastructure (AWS), and container orchestration (Kubernetes). Mentor fellow engineers and help shape our backend engineering culture. Optimize system performance and streamline complex data flows across distributed services. Influence and define standards for how we build, test, and deploy software across the company. Who You Are 7+ years of backend engineering experience, ideally in fast-moving production environments. Strong experience with Node.js (TypeScript / JavaScript) and modern backend frameworks. Deep familiarity with AWS, Kubernetes, CI/CD, and distributed system design. Adept at owning code from design through deployment - you care about maintainability, reliability, and long-term scalability. Excellent communicator who enjoys collaborating across disciplines. Motivated by solving complex real-world problems in healthcare and improving patient outcomes. Bonus points for experience in healthcare, pharmacy systems, inventory/fulfillment flows, or regulated environments. Why This Role Stands Out You'll own high-impact systems that directly affect patient and provider experiences. You'll shape backend architecture and engineering best practices in a growing company. You'll join a profitable, non-VC-backed organization focused on long-term sustainability. You'll work in-person with an ambitious, mission-driven team in downtown San Francisco. Competitive compensation, equity opportunities, and strong benefits designed to help you thrive. This is a great opportunity to be a key member of the engineering team, taking technical ownership of our pharmacy platform's core backend systems. Your work will directly power real-time healthcare operations and improve access to care. If you're excited to apply your engineering expertise to meaningful healthcare infrastructure - and want to join a company that values autonomy, sustainability, and impact - we want to hear from you! Base salary: $250k-300k DOE + generous equity and benefits
    $250k-300k yearly 4d ago
  • Embedded Hardware Design Engineer

    Synstack Technologies

    Design engineer job in San Jose, CA

    Domain: Embedded Hardware, PCB Design, FPGA, High-Speed Systems, EMI/EMC Experience: 10+ years San Jose, CA Based - Lead end-to-end hardware development for FPGA/SoC-based systems, including architecture, schematic design, PCB review, board bring-up, debugging, compliance testing, and cross-functional collaboration. Key Responsibilities: Hardware Design: Architecture, schematic capture, PCB review, documentation System Integration: High-speed board bring-up, signal/power integrity troubleshooting Testing & Compliance: DVT/PVT, EMI/EMC design, certification coordination Vendor Interface: PCB fabrication, assembly, procurement Sustenance: RMA debugging, redesign for compliance Collaboration: Work with firmware, mechanical, and test teams Technical Skills: Tools: Allegro, Altium, Interfaces: USB, BLE, SPI, I2C, Ethernet, CAN, PCIe Lab Expertise: Oscilloscopes, Logic Analyzers, Signal Generators Qualifications: Bachelor's in Electronics/Communication (or related), strong debugging and documentation skills
    $112k-158k yearly est. 1d ago
  • High-Speed Hardware Design Engineer

    Intelliswift-An LTTS Company

    Design engineer job in San Jose, CA

    Must have skills High-speed digital board design 25G+ SerDes Microprocessor-based reference design High-speed optics (10-25G+) FPGA / PCIe / Retimers / PHY components Hardware debugging (oscilloscope, analyzer, VNA) ======= High-Speed Hardware Design Engineer We are seeking a skilled High-Speed Hardware Design Engineer to lead the development of cutting-edge digital boards and systems. The ideal candidate will have hands-on experience with high-speed interfaces, optics, and advanced debugging tools. Key Responsibilities: Design and develop high-speed digital boards from concept to production. Work with 25G+ SerDes, high-speed optics (10-25G+), and microprocessor-based reference designs. Integrate and validate high-speed components including FPGAs, PHYs, Retimers, PCIe switches, and POLs. Perform hardware bring-up, signal integrity validation, and root-cause analysis using oscilloscopes, VNAs, and logic analyzers. Collaborate with cross-functional teams to ensure robust system performance. Develop and maintain automation scripts using Perl, Python, or similar languages. Preferred Qualifications: Proven experience in high-speed board design and debugging. Strong understanding of networking hardware and terminology. Proficiency in lab instrumentation and test setup.
    $112k-158k yearly est. 1d ago
  • Staff AI Engineer

    Quantix Search

    Design engineer job in Sunnyvale, CA

    Staff AI Engineer | Sunnyvale, CA | $225K-$300K + Equity We're partnering with a leading company in the software defined vehicle space to hire a Staff AI Engineer. Their technology is already running in more than five million vehicles on the road today and they are now building the next layer of AI that will power future automotive platforms. In this role you will work on advanced language models, retrieval systems and agent style architectures that support real world, safety critical use cases. You will own the full lifecycle of AI systems from early research through to stable, production grade services. What you'll do: Train and fine tune LLMs for reasoning and decision making Build retrieval pipelines and RAG systems for real time semantic search Design and scale ML systems that run in fault tolerant, privacy compliant environments Develop evaluation frameworks to measure reliability, correctness and performance Work closely with engineering and product teams to shape AI solutions that match real world needs What we're looking for: 5+ years of experience as an AI or ML engineer Hands on experience with LLMs, agent frameworks and RAG architectures Strong Python and experience with PyTorch or TensorFlow Background in building and deploying production ML systems Comfort working in a collaborative on site environment three days per week in Sunnyvale If this sounds like something you would like to explore, apply today and we'll be in touch
    $225k-300k yearly 1d ago
  • Product Engineer

    Crossing Hurdles

    Design engineer job in San Francisco, CA

    Crossing Hurdles is a global recruitment consultancy partnering with a fast-growing startup (YC W24) which is into orchestrating users' GitHub Action workflows on a fleet of bare-metal gaming CPUs, with build caches co-located next to CI jobs-all enabled by a single line of code. Raised a Series A funding, bringing total capital to $13.5M, and grew ARR from $1M to $3M in just 4 months, continuing to scale rapidly. Role - Product Engineer Location - 5 day/week in NYC/SF Required Tech Stack - React, TypeScript, Golang, Postgres, ClickHouse Compensation - $200k - $300k Benefits - Medical, Vision, and Dental insurance, Unlimited PTO, Quarterly offsite, 12 weeks fully paid parental leave (US) Requirements: 3 - 10 YoE as a great full stack engineer who is 50%-90% frontend leaning but can also work on the backend. Must be product-minded and have worked on customer-facing products Must be proficient in React / TypeScript Why Candidate Should Join: Orchestrates millions of virtual machines each month to run CI jobs efficiently across a proprietary fleet of bare-metal servers. Powers continuous integration for 600+ high-growth startups Founded by elite engineers
    $97k-134k yearly est. 2d ago
  • Frontend Engineer (React.JS & Node.JS) - W2 Contract

    Flexton Inc.

    Design engineer job in San Jose, CA

    Frontend Engineer Duration: 6+ months (possible extension) Type: W2 Contract (Open to Consider USC, GC, EAD) - No Third Party or C2C Experience: 6+ Years in an Enterprise Environment with BS or MS in Computer Science. Must Have: JavaScript, React.JS, Typescript, NodeJS and REST API Job Summary: Seeking a Frontend Engineer with strong experience in JavaScript, HTML, CSS, and hands-on expertise in React and Node.js. The role involves building scalable, high-quality UI components and collaborating in an Agile development environment. Responsibilities: Develop and maintain frontend modules using JavaScript, HTML, CSS, React, and Node.js. Implement unit testing (JUnit) and ensure code quality. Utilize jQuery and core data structures where applicable. Work closely with cross-functional teams in an Agile/Scrum setup. Participate in solution design, code reviews, and feature development. Required Skills: Bachelor's degree in Computer Science or related field with Strong proficiency in JavaScript, HTML, CSS. Must-have: React.js and Node.js. Experience with unit testing tools (JUnit). Good understanding of data structures and jQuery.
    $116k-167k yearly est. 1d ago
  • Smart Contract Engineer

    Odiin

    Design engineer job in San Francisco, CA

    You'll work closely with our product, engineering, and security teams to build scalable decentralized systems that push the boundaries of what's possible on-chain. Key Responsibilities: Design, write, test, and deploy smart contracts on Ethereum or other EVM-compatible blockchains. Collaborate with frontend and backend developers to integrate smart contracts into decentralized applications (dApps). Conduct peer reviews, optimize gas efficiency, and maintain best practices for security. Develop automated testing frameworks to ensure contract reliability. Stay up to date with emerging blockchain protocols, development tools, and security standards. Participate in smart contract audits and coordinate fixes for any identified vulnerabilities. Contribute to technical documentation for contracts and protocols. Requirements: Proven experience developing and deploying smart contracts in Solidity (or Rust, for non-EVM chains). Strong understanding of blockchain fundamentals, consensus mechanisms, and token standards (ERC-20, ERC-721, ERC-1155). Experience with smart contract development tools such as Hardhat, Foundry, Truffle, or Remix. Familiarity with Ethereum and Layer 2 scaling solutions (e.g., Arbitrum, Optimism, Polygon). Understanding of web3 libraries (ethers.js, web3.js) and dApp integrations.
    $117k-167k yearly est. 5d ago
  • Staff Machine Learning Engineer / Principal ML Engineer

    SRS Consulting Inc. 4.2company rating

    Design engineer job in San Jose, CA

    Role: Staff Machine Learning Engineer Duration: Long-term Mode of Interview: Virtual & Final In-person Why this role exists We're building privacy‐preserving LLM capabilities that help hardware design teams reason over Verilog/SystemVerilog and RTL artifacts-code generation, refactoring, lint explanation, constraint translation, and spec‐to‐RTL assistance. We're looking for a Staff‐level engineer to technically lead a small, high‐leverage team that fine‐tunes and productizes LLMs for these workflows in a strict enterprise data‐privacy environment. You don't need to be a Verilog/RTL expert to start; curiosity, drive, and deep LLM craftsmanship matter most. Any HDL/EDA fluency is a strong plus. What you'll do (Responsibilities) • Own the technical roadmap for Verilog/RTL‐focused LLM capabilities-from model selection and adaptation to evaluation, deployment, and continuous improvement. • Lead a hands‐on team of applied scientists/engineers: set direction, unblock technically, review designs/code, and raise the bar on experimentation velocity and reliability. • Fine‐tune and customize models using state‐of‐the‐art techniques (LoRA/QLoRA, PEFT, instruction tuning, preference optimization/RLAIF) with robust HDL‐specific evals: o Compile‐/lint‐/simulate‐based pass rates, pass@k for code generation, constrained decoding to enforce syntax, and "does‐it‐synthesize” checks. • Design privacy‐first ML pipelines on AWS: o Training/customization and hosting using Amazon Bedrock (including Anthropic models) where appropriate; SageMaker (or EKS + KServe/Triton/DJL) for bespoke training needs. o Artifacts in S3 with KMS CMKs; isolated VPC subnets & PrivateLink (including Bedrock VPC endpoints), IAM least‐privilege, CloudTrail auditing, and Secrets Manager for credentials. o Enforce encryption in transit/at rest, data minimization, no public egress for customer/RTL corpora. • Stand up dependable model serving: Bedrock model invocation where it fits, and/or low‐latency self‐hosted inference (vLLM/TensorRT‐LLM), autoscaling, and canary/blue‐green rollouts. • Build an evaluation culture: automatic regression suites that run HDL compilers/simulators, measure behavioral fidelity, and detect hallucinations/constraint violations; model cards and experiment tracking (MLflow/Weights & Biases). • Partner deeply with hardware design, CAD/EDA, Security, and Legal to source/prepare datasets (anonymization, redaction, licensing), define acceptance gates, and meet compliance requirements. • Drive productization: integrate LLMs with internal developer tools (IDEs/plug‐ins, code review bots, CI), retrieval (RAG) over internal HDL repos/specs, and safe tool‐use/function‐calling. • Mentor & uplevel: coach ICs on LLM best practices, reproducible training, critical paper reading, and building secure‐by‐default systems. What you'll bring (Minimum qualifications) • 10+ years total engineering experience with 5+ years in ML/AI or large‐scale distributed systems; 3+ years working directly with transformers/LLMs. • Proven track record shipping LLM‐powered features in production and leading ambiguous, cross‐functional initiatives at Staff level. • Deep hands‐on skill with PyTorch, Hugging Face Transformers/PEFT/TRL, distributed training (DeepSpeed/FSDP), quantization‐aware fine‐tuning (LoRA/QLoRA), and constrained/grammar‐guided decoding. • AWS expertise to design and defend secure enterprise deployments, including: o Amazon Bedrock (model selection, Anthropic model usage, model customization, Guardrails, Knowledge Bases, Bedrock runtime APIs, VPC endpoints) o SageMaker (Training, Inference, Pipelines), S3, EC2/EKS/ECR, VPC/Subnets/Security Groups, IAM, KMS, PrivateLink, CloudWatch/CloudTrail, Step Functions, Batch, Secrets Manager. • Strong software engineering fundamentals: testing, CI/CD, observability, performance tuning; Python a must (bonus for Go/Java/C++). • Demonstrated ability to set technical vision and influence across teams; excellent written and verbal communication for execs and engineers. Nice to have (Preferred qualifications) • Familiarity with Verilog/SystemVerilog/RTL workflows: lint, synthesis, timing closure, simulation, formal, test benches, and EDA tools (Synopsys/Cadence/Mentor). • Experience integrating static analysis/AST‐aware tokenization for code models or grammar‐constrained decoding. • RAG at scale over code/specs (vector stores, chunking strategies), tool‐use/function‐calling for code transformation. • Inference optimization: TensorRT‐LLM, KV‐cache optimization, speculative decoding; throughput/latency trade‐offs at batch and token levels. • Model governance/safety in the enterprise: model cards, red‐teaming, secure eval data handling; exposure to SOC2/ISO 27001/NIST frameworks. • Data anonymization, DLP scanning, and code de‐identification to protect IP. What success looks like 90 days • Baseline an HDL‐aware eval harness that compiles/simulates; establish secure AWS training & serving environments (VPC‐only, KMS‐backed, no public egress). • Ship an initial fine‐tuned/customized model with measurable gains vs. base (e.g., +X% compile‐pass rate, −Y% lint findings per K LOC generated). 180 days • Expand customization/training coverage (Bedrock for managed FMs including Anthropic; SageMaker/EKS for bespoke/open models). • Add constrained decoding + retrieval over internal design specs; productionize inference with SLOs (p95 latency, availability) and audited rollout to pilot hardware teams. 12 months • Demonstrably reduce review/iteration cycles for RTL tasks with clear metrics (defect reduction, time‐to‐lint‐clean, % auto‐fix suggestions accepted), and a stable MLOps path for continuous improvement. How we work (Security & privacy by design) • Customer and internal design data remain within private AWS VPCs; access via IAM roles and audited by CloudTrail; all artifacts encrypted with KMS. • No public internet calls for sensitive workloads; Bedrock access via VPC interface endpoints/PrivateLink with endpoint policies; SageMaker and/or EKS run in private subnets. • Data pipelines enforce minimization, tagging, retention windows, and reproducibility; DLP scanning and redaction are first‐class steps. • We produce model cards, data lineage, and evaluation artifacts for every release. Tech you'll touch • Modeling: PyTorch, HF Transformers/PEFT/TRL, DeepSpeed/FSDP, vLLM, TensorRT‐LLM • AWS & MLOps: Amazon Bedrock (Anthropic and other FMs, Guardrails, Knowledge Bases, Runtime APIs), SageMaker (Training/Inference/Pipelines), MLflow/W&B, ECR, EKS/KServe/Triton, Step Functions • Platform/Security: S3 + KMS, IAM, VPC/PrivateLink (incl. Bedrock), CloudWatch/CloudTrail, Secrets Manager • Tooling (nice to have): HDL toolchains for compile/simulate/lint, vector stores (pgvector/OpenSearch), GitHub/GitLab CI
    $149k-200k yearly est. 1d ago
  • Signal and Power Integrity Engineer

    Insight Global

    Design engineer job in San Jose, CA

    We are seeking an experienced Electrical Engineer to lead Signal Integrity (SI) and Power Integrity (PI) efforts for semiconductor test systems. In this role, you will design, test, and evaluate electrical, optical, and thermal systems, including semiconductors, photonics, and embedded devices. You will conduct feasibility studies, develop prototypes, and manage independent design projects while collaborating with internal teams, partners, and suppliers. Additional responsibilities include supporting product development, mentoring junior engineers, and providing guidance on field issues. Required Skills & Experience Education & Experience • BS in Electrical Engineering (MS preferred) • BS + 5 years or MS + 4 years relevant experience Technical Expertise • High-speed signal and power integrity design at PCB, package, or system level • Simulation tools: ADS, HFSS, CST • S-parameter modeling and simulations • High-speed SERDES (Tx/Rx equalization) • High-speed data communications (eye diagrams, BER testing) • SI/PI knowledge at PCB or package level Nice to Have Skills & Experience • MS in Electrical Engineering. • Experience with photonics and optical signaling • Experience with designing, certifying, and deploying semiconductor capital equipment. • Ability to work in cross-functional teams building complex test systems. • Intermediate software skills, including experiment instrumentation and execution (meters, power supplies). • Ability to read, write, and speak Japanese.
    $109k-152k yearly est. 1d ago
  • Applications Engineer - Marketing

    Socionext Us 4.6company rating

    Design engineer job in Milpitas, CA

    Socionext America Inc. (SNA) Socionext Inc., world's second largest fabless semiconductor company, designs, develops and delivers leading edge System-on-Chip cusom silicon solutions to global customers. The company is focused on datacenter compute server, networking, storage, artificial intelligence, automotive and industrial automation market segments that drive today's leading-edge services and applications. Socionext combines world-class expertise, deep enterprise class product development experience, and an extensive IP portfolio to provide differentiating solutions. Socionext Inc. is headquartered in Shin-Yokohama, and has offices in Japan, United States, Europe and Asia. We are seeking a Marketing Manager for our Data Center business with a background as an Applications Engineer. The primary responsibilities include but are not limited to: Create Data Center market technologies inflexion insights Develop Market Requirements Document (MRD) by engaging with market leading customers and capturing technology needs, systems roadmaps Study emerging market and industry technology trends Develop datacenter business opportunities and win strategies Advocate IP offerings roadmap to customers and collect feedback Working closely with management to drive all phases of customer design wins and execution Requirements for this position : Bachelor's Degree in EE, Masters preferred 5+ years of successful experience in marketing and closing business 8+ years of experience with data center networking, storage and server products (knowledge of data center interconnects) Must have experience in networking and storage industry. In depth knowledge of Storage applications is required. Familiarity with solid state storage is a plus. Requires an excellent understanding of ASIC design and manufacturing flows, including a good grasp of the competitive landscape Knowledge required - ASIC Marketing, CNICs/HBAs, PCIe, NVMe, Flash, SSD, SATA, SAS, iSCSI Ability to guide products through development, including the definition and trade off analysis of architectures and new features for the components required for Data Center ASIC Ability to lead with varied goals and objectives to achieve business unit's direction and purpose Ability to use financial tools such as ROI and NPV analysis to build business cases. Teamwork, dedication, strong communications and interpersonal skills Some travel ~10%
    $105k-148k yearly est. 5d ago
  • Lead Azure Databricks Engineer

    Fractal 4.2company rating

    Design engineer job in Palo Alto, CA

    Fractal Analytics is a strategic AI partner to Fortune 500 companies with a vision to power every human decision in the enterprise. Fractal is building a world where individual choices, freedom, and diversity are the greatest assets. An ecosystem where human imagination is at the heart of every decision. Where no possibility is written off, only challenged to get better. We believe that a true Fractalite empowers imagination with intelligence. And that it will be such Fractalites that will continue to build the company for the next 100 years. Please visit Fractal | Intelligence for Imagination for more information about Fractal. Job Title: Lead Data Engineer - Databricks & Azure (SQL Migration) Location: Hybrid @ Palo Alto Compensation: $140,000 - $175,000 per year Role Overview: We are seeking a skilled Lead Data Engineer to support the migration of on-premise SQL Server databases to the Azure Databricks Lakehouse Platform. This role involves designing and implementing parameter-driven ETL frameworks, migrating SQL stored procedures, views, and business logic to Databricks Unity Catalog stored procedures, and supporting data governance strategies. The ideal candidate will have proven experience with Databricks, Unity Catalog, Delta Lake, and ADF, and will work closely with the team to deliver scalable, efficient, and secure data migration solutions. Key Responsibilities: Design and implement data migration pipelines from on-prem SQL Server to Azure Databricks Lakehouse. Build parameter-driven/config-based ETL mappings for reusable and dynamic pipelines. Migrate SQL stored procedures, views, and business logic from SQL Server to Databricks Unity Catalog stored procedures within the Databricks Lakehouse using Databricks SQL or PySpark. Configure and manage Databricks Unity Catalog for governance, lineage, access control, and security. Develop and optimize Delta Lake tables following the Medallion architecture (Bronze, Silver, Gold). Orchestrate ETL workflows via Azure Data Factory (ADF) and Databricks Workflows. Implement data access controls, account-level permissions, and object ownership via Unity Catalog. Collaborate with architects, developers, and business stakeholders to ensure data quality, lineage, and governance. Troubleshoot and optimize ETL pipelines for performance, scalability, and cost efficiency. Support CI/CD integration using Databricks Repos, Git, and Azure DevOps. Required Skills: 10+ years of experience in data engineering, including cloud migration projects. Hands-on expertise in Azure Databricks, ADF, ADLS Gen2, and Databricks Unity Catalog. Lakebridge Very good knowledge of SQL DB Stored procs, SSIS, SSRS Proven experience in migrating SQL stored procedures, views, and business logic to Databricks Unity Catalog stored procedures. Strong skills in Databricks SQL, PySpark, and Python for data transformation. Experience designing parameter-driven/config-based ETL frameworks. Deep understanding of Delta Lake, Medallion architecture, and data modeling. Knowledge of data governance, lineage tracking, and security policies. Experience with CI/CD automation, Git, and Azure DevOps. Visa Status: We are currently unable to sponsor visas. Only candidates who are visa-independent will be considered. Pay The wage range for this role takes into account the wide range of factors that are considered in making compensation decisions including but not limited to skill sets; experience and training; licensure and certifications; and other business and organizational needs. The disclosed range estimate has not been adjusted for the applicable geographic differential associated with the location at which the position may be filled. At Fractal, it is not typical for an individual to be hired at or near the top of the range for their role and compensation decisions are dependent on the facts and circumstances of each case. A reasonable estimate of the current range is: $110,000 - $145,000. In addition, you may be eligible for a discretionary bonus for the current performance period. Benefits As a fulltime employee of the company or as an hourly employee working more than 30 hours per week, you will be eligible to participate in the health, dental, vision, life insurance, and disability plans in accordance with the plan documents, which may be amended from time to time. You will be eligible for benefits on the first day of employment with the Company. In addition, you are eligible to participate in the Company 401(k) Plan after 30 days of employment, in accordance with the applicable plan terms. The Company provides for 11 paid holidays and 12 weeks of Parental Leave. We also follow a “free time” PTO policy, allowing you the flexibility to take time needed for either sick time or vacation. Fractal provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state or local laws.
    $140k-175k yearly 1d ago
  • Lead AI Engineer

    1Five

    Design engineer job in San Francisco, CA

    The Role Our client is looking for a Lead AI Engineer to spearhead the development of our state-of-the-art foundation model for manufacturing and CAD. This is a leadership role at the intersection of AI, technical architecture, and company vision: a chance to shape not only our models, but the direction of AI in the physical world. What You'll Do Architect and lead the development of a next-generation foundation model that integrates text, geometry, and design intelligence. Build and code: set the standard for technical excellence in ML engineering and model development. Define and own the technical roadmap for Backflip's core model, including architecture, data, training, and evaluation strategy. Shape AI strategy in close collaboration with Backflip's leadership team, ensuring the technical direction is in harmony with product and customer goals. Drive execution: set ambitious objectives, define milestones, and uphold a high technical bar across the team. Mentor and develop engineers across AI and software, fostering growth, creativity, and technical mastery. Collaborate deeply with customers, product, and the sales team to ground model design in real-world feedback and deliver impactful AI-powered tools. Ship real products. You've done it before, and you'll do it again - taking models from research to production systems used by real people in the physical world. Who You Are You've led and shipped at least one (ideally multiple) ML products or large models into real-world production. You have deep experience building large-scale multimodal or generative models (text, 3D, or visual), and are fluent in PyTorch, distributed training, and modern ML infrastructure. You're comfortable thinking across architecture, data, and evaluation, and thrive in the ambiguity of solving hard problems end-to-end. You've led teams or initiatives that influenced company direction, product definition, or customer experience. You bring strong communication and leadership skills, with a clear sense of how technical vision connects to product and customer value. You care deeply about building tools that expand human capability, not just optimizing benchmarks. You're inspired by the opportunity to redefine how AI reshapes manufacturing and design in the real world. What We're Looking For 5-7+ years in deep learning / generative AI with a record of shipping complex systems. Expert in multimodal and generative models (transformers, diffusion, autoregressive); strong Python + PyTorch. Evidence of technical leadership as an IC: you've set standards, led cross-functional efforts, and made architectural decisions that lasted. Fluency from research to production: data strategy, training, tooling, serving, and performance engineering. Bonus Experience with CAD, 3D geometry, graphics, differentiable programming, or AI for the physical world.
    $87k-139k yearly est. 1d ago
  • Senor ASIC Design Engineer

    Oho Group Ltd. 3.7company rating

    Design engineer job in San Francisco, CA

    As an ASIC Design Engineer you will contribute to the design and development of high-performance processor and SoC technologies. In this role, you will be responsible for: Key Responsibilities Microarchitecture Development & Specification: Drive the process from early high-level architectural exploration and research through detailed microarchitecture definition and specification. RTL Design & Optimization: Develop, evaluate, and refine RTL implementations to achieve power, performance, area, and timing objectives. Design Delivery: Collaborate with cross-functional teams to deliver physical designs that meet timing, area, power, reliability, and testability goals. Validation: Support verification teams in building test benches, performing simulations, and ensuring functional and performance correctness. Performance Analysis: Explore high-performance architectural strategies and validate RTL correlation with target performance metrics. Requirements Strong understanding of microprocessor or SoC design, with 6+ years of experience in one or more of the following domains: High-performance cache controllers (pipeline design, hazard detection, parity/ECC, coherency and replacement policies) Coherent on-chip interconnects/fabrics for high-performance SoCs, including control structure design Proficiency in SystemVerilog Hands-on experience with simulators and waveform debugging tools Solid grasp of logic design principles and their timing/power implications Familiarity with low-power and high-performance microarchitecture techniques Experience programming in C or C++
    $122k-166k yearly est. 1d ago
  • Mechanical Engineer

    Alexander Chapman

    Design engineer job in San Francisco, CA

    Mechanical Engineer (Robotics) We are partnering with a robotics company building complex electro-mechanical systems where mechanical design directly determines real-world performance. This role is for someone who doesn't just design parts, but owns motion, reliability, and scale. What You'll Do Own the end-to-end mechanical design of complex electro-mechanical systems with moving parts Design and prototype custom mechanisms and actuators under aggressive timelines Drive concepts from first prototype through high-volume production Personally design parts for volume manufacturing processes, including: Injection molding Die casting Stamping / sheet metal Extrusion Powder metal / MIM Partner closely with contract manufacturers (CMs) to ensure DFM, reliability, and cost targets are met Build systems that are not just elegant but robust, testable, and shippable at scale What We're Looking For Exceptionally strong mechanical intuition, you understand how things move, fail, and improve Proven ability to design and prototype quickly without sacrificing rigor Track record of shipping reliable, hardware products at scale Deep hands-on experience designing custom mechanisms, joints, transmissions, and actuators Experience owning mechanical architecture for complex systems with dynamic loads and tight tolerances Comfortable operating across ambiguity, tight timelines, and high expectations Required Background Currently working at a robotics company (hands-on mechanical role) Background in electro-mechanical systems with real moving parts (not CAD-only work) Experience taking designs from concept → prototype → volume production Ideal Signals Designed robotic arms, legs, mobile platforms, end-effectors, or actuation systems Personally responsible for motor selection, gearing, kinematics, or load paths Close collaboration with electrical and controls teams Bias for execution and ownership over documentation and theory
    $82k-111k yearly est. 1d ago
  • Electrical Design Engineer 4

    Maxonic Inc.

    Design engineer job in Milpitas, CA

    Job Title: Electrical Design Engineer 4 Work Schedule: On-site Rate: $71, Based on experience. Responsibilities: Designs electrical parts, modules and subsystems to support the design of whole systems. Responsible for the complete design process, including requirements specification, feasibility studies, cost and scheduling, conducting various hand-on testing and analysis, such as circuit, timing, thermal/cooling, electrical loads; conceptual and detailed design using design tools (i.e. OrCAD, PSpice, etc...), detailed drawings, design review presentations, procurement of prototype parts, system integration, prototype testing, and handoff to manufacturing. These tasks will require working with other engineering groups such as ME, OE, SW, systems and manufacturing engineers to ensure flawless integration and test at the subsystem and system level. Develops the required supporting documentation, such as assembly and test procedures, and service manuals. Works closely with and manages suppliers to ensure all design requirements are specified and achieved. Addresses and resolves product issues thru the product phases. Has strong leadership, communication and problem solving skills. Minimum B.S. in electrical engineering 5 years experience Skills: Category Name Required Importance Experience Area of Expertise Electromechanical No 2 Area of Expertise Schematic Capture No 1 Areas of Expertise Circuit Design No 1 Areas of Expertise Electrical Troubleshooting No 1 Technical Skills Circuit Failure Mode Analysis No 1 Technical Skills Electrical Testing No 1 Technical Skills Schematic Development No 1 About Maxonic: Since 2002 Maxonic has been at the forefront of connecting candidate strengths to client challenges. Our award winning, dedicated team of recruiting professionals are specialized by technology, are great listeners, and will seek to find a position that meets the long-term career needs of our candidates. We take pride in the over 10,000 candidates that we have placed, and the repeat business that we earn from our satisfied clients. Interested in Applying? Please apply with your most current resume. Feel free to contact Lavanya Dommeti (********************* / *************** for more details.
    $71 hourly 4d ago

Learn more about design engineer jobs

How much does a design engineer earn in Palo Alto, CA?

The average design engineer in Palo Alto, CA earns between $77,000 and $148,000 annually. This compares to the national average design engineer range of $57,000 to $102,000.

Average design engineer salary in Palo Alto, CA

$107,000

What are the biggest employers of Design Engineers in Palo Alto, CA?

The biggest employers of Design Engineers in Palo Alto, CA are:
  1. Meta
  2. Google
  3. Apple
  4. Array Labs
  5. Snap
  6. Mythic
  7. Cerebras
  8. Tesla
  9. Infojini
  10. Reliable Robotics
Job type you want
Full Time
Part Time
Internship
Temporary