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  • Senior Aerospace Engineer - Aircraft Components

    United Airlines 4.6company rating

    Design engineer job in San Francisco, CA

    A leading airline company in San Francisco is seeking an experienced aircraft maintenance engineer to analyze and resolve technical challenges, ensure regulatory compliance, and provide detailed project management. Candidates should possess a Bachelor's degree in Engineering and have extensive knowledge in airline operations. This full-time role offers competitive compensation and a comprehensive benefits package. #J-18808-Ljbffr
    $104k-133k yearly est. 3d ago
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  • SoC Machine Learning Design Engineer

    Apple Inc. 4.8company rating

    Design engineer job in Cupertino, CA

    Cupertino, California, United States At Apple we believe our products begin with our people. By hiring a diverse team, we drive creative thought. By giving that team everything they need, we drive innovation. By hiring incredible engineers, we drive precision. And through our collaborative process, we build memorable experiences for our customers! These elements come together to make Apple an amazing environment for motivated people to do the greatest work of their lives. You will become part of a hands‑on development team that sets the standard in cultivating excellence, creativity and innovation. Come help us design the next generation of revolutionary Apple products. We are looking for a forward‑thinking and unusually talented engineer. As a member of our dynamic group, you will have the rare and rewarding opportunity to craft and implement methodologies and solutions with a high impact on upcoming products that will delight and inspire millions of Apple's customers every single day. In this role, you will be directly involved in our SoC design machine learning efforts, collaborating right alongside our internal multi‑functional teams, and using your expertise in machine learning to improve productivity and optimizations across several SoC design related functions spanning from design to validation. Description As a member of the SoC design machine learning team, you will be part of a dynamic team that is building the most efficient application processors on the planet, powering the next generation of Apple products. Your expertise in machine learning will be instrumental in optimizing for efficiency, quality and speed for our chip‑design process. You'll play a crucial role in developing generative AI and machine learning solutions for optimizations in RTL Design, Verification, and Power/Performance/Area efforts. You will collaborate closely with our internal multi‑functional teams as well as the AIML organization at Apple to understand domain‑specific needs and tailor machine learning solutions to these domains. As part of this role, you will keep abreast of emerging technologies in machine learning and chip design to ensure our solutions remain state‑of‑the‑art. Prior leadership experience is a plus. Minimum Qualifications Minimum of BS + 3 years relevant industry experience. Preferred Qualifications Practical experience and knowledge of generative AI and modern machine learning methods. Experience with any of the following: RAG systems including embedding models, retrieval strategies, and context optimization techniques. Generative AI pipeline development. AI evaluation and testing proficiency including designing test suites and implementing human evaluation frameworks. Experience with AI coding assistants. Experience with AI infrastructure protocols such as MCP. Experience with deep neural networks and reinforcement learning is a plus. Solid math background and understanding of algorithms and data structures. Experience with current deep learning frameworks, such as PyTorch, TensorFlow, JAX or MLX. Experience with hardware description languages like Verilog, SystemVerilog or VHDL. Experience with Chip design and verification front end flows is a plus: Working verification experience with UVM testbenches. Working experience with front‑end tools such as Static timing analysis and CDC/RDC. Strong communication and collaboration skills, with the ability to work efficiently in cross‑functional teams. Master's or PhD with relevant publications preferred but not required. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $147,400 and $272,100, and your base pay will depend on your skills, qualifications, experience, and location. Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program. Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant. Apple accepts applications to this posting on an ongoing basis. #J-18808-Ljbffr
    $147.4k-272.1k yearly 3d ago
  • Mechanical Design Engineer

    Droyd

    Design engineer job in San Francisco, CA

    About the team Droyd builds autonomous robotic systems that automate repetitive manual work in real environments. Our robots operate in production settings, which means mechanical design has to be robust, manufacturable, and tightly integrated with electronics and control systems. Our mechanical team designs the structures, linkages, and assemblies that make the robots real. This work moves fast and lives on the shop floor as much as it does in CAD. About the role As a Mechanical Design Engineer at Droyd, you'll own mechanical subsystems from first sketch through working prototype. You'll design, build, break, and iterate on real hardware. This is a hands‑on role. You'll spend time in CAD, but also at the printer, in the shop, and on the robot. You'll work closely with electrical, software, and robotics teams to bring systems together. This role is based in Burlingame, CA. We're an in‑person company. We build faster that way. In this role, you'll Own mechanical subsystem design from concept to prototype and iteration Design parts and assemblies in CAD, supported by hand calculations and FEA when needed Design for rapid prototyping methods including 3D printing and CNC machining Make decisions on materials, tolerances, and manufacturing methods Integrate mechanical designs with motors, sensors, electronics, and actuators Build prototypes yourself using 3D printers, shop tools, and CNC equipment Work closely with manufacturing to turn designs into physical hardware quickly We're looking for someone who Has a strong portfolio showing complete systems taken from concept to physical prototype Has experience on hands‑on engineering teams such as Formula SAE, aerospace clubs, or robotics teams Has internship or early‑career experience on real hardware projects or at hardware startups Is proficient with modern CAD tools (Onshape preferred, but not required) Understands manufacturing methods, tolerancing, and assembly workflows Is comfortable with hands‑on fabrication and rapid iteration Nice to have Experience with FEA, topology optimization, or generative design Exposure to electronics, controls, or mechatronic systems Interest in industrial or visual design alongside functional engineering About Droyd Droyd builds autonomous robotic systems to automate manual work for enterprises. We design the hardware, write the control stack, and deploy robots that operate in real environments. If we do this right, robots stop being prototypes and start being infrastructure. Join us and help build hardware that ships. #J-18808-Ljbffr
    $92k-123k yearly est. 4d ago
  • Physical Design Engineer - New College Grad 2026

    Nvidia Corporation 4.9company rating

    Design engineer job in Santa Clara, CA

    Physical Design Engineer - New College Grad 2026 page is loaded## Physical Design Engineer - New College Grad 2026locations: US, CA, Santa Claratime type: Full timeposted on: Posted Todayjob requisition id: JR2009983We are now looking for a Physical Design Engineer!NVIDIA has continuously pioneered and reinvented itself over two decades through various avenues of computing: Graphics, High Performance Computing, Artificial Intelligence, Research, and more. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to tackle, that only we can solve, and that matter to the world. This is our life's work, to amplify human creativity, intelligence, and technology. Today, visual computing is becoming increasingly central to how people interact with technology, and there has never been a more exciting time to join our team. We are looking for a Physical Design Engineer who will be responsible for all aspects of physical design and implementation of Graphics processors, integrated chipsets, and other ASICs targeted at the desktop, laptop, workstation, set-top box and home networking markets.**What you will be doing:*** As a member of the team, you will participate in the efforts in establishing CAD and physical design methodologies (flow and tools development) as well as implementation.* Your day to day will include developing chip floor plan, power/clock distribution, chip assembly and P&R, timing closure, power and noise analysis and back-end verification across multiple projects.* This position requires you to work with EDA vendor (Synopsys, Cadence, Mentor, etc.) tool suites such as: ICC2,PrimeTime, dc\_shell, Innovus, SeaHawk.* You will interact with a diverse team engineers.**What we need to see:*** Completing an BSEE, MSEE or PhD (or equivalent experience).* Deep understanding of VLSI and Physical Design related basics & concepts.* Possess a deep understanding of static timing analysis, clock/power distribution and analysis, RC extraction and correlation, place and route, circuit design and analysis.* Experience in scripting and programming using several of the following languages/tools: Perl, C, C++, TCL, Scheme, Skill, or Make.* Previous internship or project experience in physical design implementation With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world's most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our best-in-class engineering teams are rapidly growing. If you're a creative and autonomous engineer with a passion for technology, we want to hear from you!Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 96,000 USD - 161,000 USD for Level 1, and 108,000 USD - 184,000 USD for Level 2.You will also be eligible for equity and .Applications for this job will be accepted at least until December 19, 2025.NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. #J-18808-Ljbffr
    $132k-175k yearly est. 5d ago
  • Senior Product Design Engineer

    Epoch Biodesign

    Design engineer job in San Bruno, CA

    Mill is all about answering a simple question: how can we prevent waste? Less waste can save time, money, energy, maybe even our planet. And there's no better place to start than food. Food waste is one of the most solvable climate problems facing us today. Plus, our trash really stinks. It's gross, heavy, and our least favorite chore. At Mill we are striving to build a better environment for all, as we take on climate and kitchen change. As a member of Mill's Product Design Engineering team you will be part of a cross functional team to design, validate and ship Mill's hardware products. You will work closely with other members of the PD team as well as cross functional groups including Industrial Design, Electrical Engineering, Reliability, Product Management and Operations. Objectives of this role: Design mechanical systems to balance complex tradeoffs between cross functional teams including Industrial Design, Electrical Engineering, Reliability, Product Management and Operations Generate detailed CAD models, specifications and documentation Prototype, Test and Analyze component and system designs Validate and system performance and iterate designs to achieve targets Create predictive models and correlate with real world performance Perform root cause analysis of performance failures and drive corrective actions Work directly with the supply chain to ensure parts are properly manufactured and assembled. Qualifications BS degree in mechanical engineering or equivalent 2 + years experience working in mechanical product design. Consumer Electronics or Home Appliance industries are preferred Expertise in CAD modeling, experience with NX is preferred. Detailed knowledge of plastic and metal part manufacturing processes Solid understanding of product design concepts including Design for Manufacturing (DFM), Design for Assembly (DFA), Tolerance Analysis Demonstrated ability to apply engineering fundamentals to find simple solutions to complex problems A strong desire to work hands-on Strong communication skills The estimated base salary range for this position is $150k to $175k, which does not include the value of benefits or a potential equity grant. A wide range of factors are considered in making compensation decisions, including but not limited to skill sets, market conditions, experience and training, licensure and certifications, and business and organizational needs. #J-18808-Ljbffr
    $150k-175k yearly 2d ago
  • Senior AI Product Engineer for CAD & Drawing Automation

    Hanomi Inc.

    Design engineer job in San Francisco, CA

    A tech startup focused on CAD intelligence is seeking a talented individual to own the creation and refinement of computational geometry features using Python and C++. You'll collaborate closely with engineers and gain insights from customers to shape the product roadmap. The role offers a generous equity package, opportunities for growth, and relocation assistance to San Francisco. Excellent communication skills and experience with reinforcement learning algorithms are required. #J-18808-Ljbffr
    $107k-146k yearly est. 3d ago
  • Principal Mechanical Engineer

    Fusion Energy Base

    Design engineer job in Milpitas, CA

    About Commonwealth Fusion Systems: Commonwealth Fusion Systems is on a mission to deliver the urgent transition to fusion energy. Combining decades of research, top talent, and new technologies, we're designing and building commercially viable fusion power plants. And working with policymakers and suppliers to build the energy industry of the future. We're in the best position to make it happen. Since 2018, we've raised nearly $3 billion in capital, making us the largest and leading private fusion company in the world. Now we're looking for more thinkers, doers, builders, and makers to join us. People who'll bring new perspectives, solve tough problems, and thrive as part of a team. If that's you and this role fits, we want to hear from you. Principal Mechanical Engineer We're looking for a Principal Mechanical Engineer to join our R&D and equipment design team to help build the next generation of thin‑film deposition technology. The Principal Mechanical Engineer will be responsible for the design and implementation of advanced R&D equipment and complex machinery. This role requires strong technical expertise, procedural discipline, and the ability to collaborate across engineering and technology functions to ensure safe, reliable, and high‑performance equipment. If you enjoy working on complex design problems, mentoring others, and solving problems in a collaborative, fast‑paced environment, this is your opportunity to make an impact. What you'll do: Lead the design and implementation of advanced R&D equipment for thin‑film processing, including ownership of key mechanical modules and sub‑systems Define system level requirements and drive innovative design concepts to meet these requirements Lead design reviews for overall mechanical system and key mechanical subsystems Generate and maintain interfaces with other engineering subsystems Report on and be accountable for project progress to stakeholders Work effectively within a multi‑disciplinary team of top scientists and engineers Mentor engineering staff for effectiveness and delivery of on‑time & in‑spec outcomes Get things done: drive projects, consistently deliver, act with speed What we're looking for: Master's degree in Mechanical Engineering or related field (or equivalent industrial experience) 15+ years of experience with at least 7 years of experience working as a principal mechanical design engineer or engineering team lead in a relevant context: design and implementation of R&D systems and manufacturing equipment Ability to conceive of novel solutions for complex engineering systems in challenging environments Expertise with 3D modeling; preferred experience with SolidWorks and NX Experience with COMSOL, ANSYS or other FEA tools Ability to select and qualify vendors for components or subsystems Demonstrated ability to lead in either direct or matrix structures Strong verbal and written communication skills and a dedication to high‑quality documentation Bonus points for: Ph.D. in Mechanical Engineering or related field (or equivalent industrial experience) Prior success building first‑of‑kind or experimental tools for material science or semiconductor R&D Familiarity in applying Semi‑S8, ASME, ACI, ASTM, and other mechanical standards to design solutions Experience with the operation of equipment in a manufacturing environment Must‑have Requirements: Ability to occasionally lift up to 50 lbs Perform activities such as stooping, climbing, standing, or sitting for extended periods of time Dedication to safety to mitigate industrial hazards that may include heat, cold, noise, fumes, strong magnets, lead (Pb), high voltage, and cryogenics Willingness to travel or work required nights/weekends/on‑call occasionally $150,000 - $225,000 a year Benefits Competitive compensation with equity 12.5 Company‑wide Holidays Flexible vacation days 10 sick days Generous parental leave policy Health, dental, and vision insurance 401(k) with employer matching Professional growth opportunities Team‑building activities #LI‑Onsite At CFS, we excel in fast‑paced environments, driven by our values of integrity, execution, impact, and self‑critique. As we grow, we're eager to bring on mission‑driven folks who offer diverse perspectives and fresh ways to tackle challenges. We value diversity deeply and are proud to be an equal opportunity employer by choice. We consider all qualified applicants equally, regardless of race, color, national origin, ancestry, citizenship status, protected veteran status, religion, physical or mental disability, marital status, sex, sexual orientation, gender identity or expression, age, or any other basis protected by law. This role requires compliance with U.S. laws concerning the export of controlled or protected technologies or information (collectively, “Export Control Laws #J-18808-Ljbffr
    $150k-225k yearly 1d ago
  • AI Accelerator Silicon Design Engineer

    Openai 4.2company rating

    Design engineer job in San Francisco, CA

    A leading AI research organization based in San Francisco is looking for a Silicon Implementation Engineer to develop and optimize physical design strategies for next-generation AI accelerators. The ideal candidate will collaborate with RTL designers and drive implementation solutions while ensuring power, performance, and area optimizations. This role requires strong expertise in physical design and methodology development, with a background in coding and tool creation. Experience with AI-focused chips is a plus. #J-18808-Ljbffr
    $96k-131k yearly est. 5d ago
  • AI-Driven Marketing Engineer - Build GTM Tools

    Verdigris Technologies Inc.

    Design engineer job in Palo Alto, CA

    A leading tech company in California is seeking a Technical Marketing Lead who will own marketing systems and build automation tools. You'll create AI-native workflows and work with tools like Claude Code and Cursor. Ideal candidates will have 4-8 years of B2B marketing experience and a track record of building and deploying effective systems. This is a chance to take ownership from day one and prove yourself in a rapidly evolving environment. #J-18808-Ljbffr
    $109k-157k yearly est. 2d ago
  • Hardware Engineer I Co-op - Hands-On Hardware Design

    Cisco Systems 4.8company rating

    Design engineer job in San Francisco, CA

    Please note this posting is to advertise potential job opportunities. This exact role may not be open today but could open in the near future. When you apply, a Cisco representative may contact you directly if a relevant position opens. Applications are accepted until further notice. Please note this posting is to advertise potential job opportunities. This exact role may not be open today but could open in the near future. When you apply, a Cisco representative may contact you directly if a relevant position opens. *Meet the Team* Engineering: Open-minded, driven, diverse and deeply creative people at Cisco design the hardware that makes the internet work. Bring your knowledge of computers and networking and take it to a new level in any one of the following product categories including: cloud, social, mobile/wireless, video, VoIP, big data, collaboration, web, Internet of Things, routing, switching, IPv6, data center, HPC, Telepresence and many more. Your work will impact billions globally. Supply Chain Operations: Collaborate with peers on projects that have a real-world impact. From our processes to manufacturing, you'll deliver a standout customer experience of Cisco products and services. Take your creative ideas from the drawing board to deliver powerful solutions. You'll collaborate with multi-functional teams to determine our infrastructural needs and product specifications. *Your Impact* Join our Creative Hardware Engineering team and make a tangible impact across the full product development cycle-from foundational circuit design to large system integration-seeing your contributions realized in high-volume manufacturing. Shape the product lifecycle by managing multiple priorities and advancing both immediate and long-term hardware goals. Build and sustain strong relationships with cross-functional teams while collaborating on ASIC Design and Verification for reliable, high-performance products. Drive innovation in System/Board Design, leveraging excellent communication skills to align and deliver robust hardware solutions. Apply your collaborative spirit and technical expertise to optimize Circuit Board Layout for efficiency, manufacturability, and quality. Champion Hardware Automation initiatives, working across business groups to streamline development and testing processes. Lead Validation and Test activities by fostering positive team dynamics and ensuring product excellence. Enhance Signal Integrity, coordinating with extended teams to achieve optimal speed and data fidelity in complex systems. Advance Power Design strategies, contributing to energy-efficient and sustainable hardware solutions as a trusted team player. Minimum Qualifications Currently enrolled in an undergraduate degree program in Electrical Engineering, Computer Engineering, or a related field. Foundational understanding of hardware engineering principles, including experience with hardware design and tools (e.g., Altium, Cadence, Mentor Graphics) and simulation software. Familiarity with hardware testing and debugging techniques using lab equipment such as oscilloscopes, logic analyzers, and multimeters. Strong grasp of engineering fundamentals and technical problem-solving abilities. Able to commit to a 6-month co-op program. Able to legally live and work in the country for which you're applying, without visa support or sponsorship *Preferred Qualifications* Ability to lead multiple tasks, prioritize effectively, and work toward both short- and long-term goals. Experience building and maintaining positive working relationships within diverse and extended teams. Excellent written and verbal communication skills. Proven ability to work collaboratively across business groups and teams (hardware, software, manufacturing, etc.). Why Cisco? At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. Message to applicants applying to work in the U.S. and/or Canada: Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process. U.S. employees are offered benefits, subject to Cisco's plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time. U.S. employees are eligible for paid time away as described below, subject to Cisco's policies: 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees 1 paid day off for employee's birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco Non-exempt employees receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees Exempt employees participate in Cisco's flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations) 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next Additional paid time away may be requested to deal with critical or emergency issues for family members Optional 10 paid days per full calendar year to volunteer For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco's policies. Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows: .75% of incentive target for each 1% of revenue attainment up to 50% of quota; 1.5% of incentive target for each 1% of attainment between 50% and 75%; 1% of incentive target for each 1% of attainment between 75% and 100%; and Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation. For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid. The applicable full salary ranges for this position, by specific state, are listed below: New York City Metro Area: $44,000.00 - $185,000.00 Non-Metro New York state & Washington state: $44,000.00 - $185,000.00 For quota-based sales roles on Cisco's sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined. ** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements. Cisco is an Aff... (EOE statement continues) #J-18808-Ljbffr
    $44k-185k yearly 4d ago
  • Growth & Marketing Engineer

    Relace

    Design engineer job in San Francisco, CA

    About Us Relace is building the models and infrastructure that code agents reach for. We power the fastest model on OpenRouter (10,000 tok) and deliver optimized small language models designed for retrieval, application, and core code generation functions. Our technology supports some of the world's fastest-moving companies - including Lovable, Figma, and Vercel - as they deploy and scale code generation to hundreds of millions of users. We recently raised our Series A from a16z, and we're growing quickly. Our team is made up of mathematicians, physicists, and computer scientists who are deeply passionate about their craft. If you thrive on ambitious technical problems, care about elegant systems design, and want to build the foundation of how code gets written at scale, this is the place for you. The Role We're looking for a Head of Growth who can move fast, experiment relentlessly, and turn great ideas into measurable traction. You'll be in the trenches, shipping campaigns, testing new channels, building loops, and driving real user adoption. As our first dedicated growth leader, you'll own our playbook across social, product, community, and performance marketing. You should be as comfortable writing a launch tweet or spinning up a landing page as you are evaluating funnel metrics and iterating on experiments. You'll work closely with our founders, engineering, and product teams to bring Relace to the broader developer and builder ecosystem. You'll: Run fast, creative campaigns across X (Twitter), LinkedIn, Discord, and other channels to build awareness and convert technical audiences. Design, launch, and iterate growth loops that turn attention into active users and advocates. Identify new distribution channels, partnerships, and viral opportunities before they're obvious. Own our growth stack - from analytics to landing pages to automation. Build a culture of experimentation: rapid iteration, smart measurement, and learning fast. Collaborate directly with engineering and research to translate technical breakthroughs into accessible, compelling narratives. #J-18808-Ljbffr
    $109k-157k yearly est. 5d ago
  • Product Engineer - On-Chain Payments & Integrations

    Tempo 4.2company rating

    Design engineer job in San Francisco, CA

    A blockchain-based payment company is looking for an early Product Engineer to help partners move money on-chain. You will work with design partners to build production-ready applications. Responsibilities include delivering customer applications, building fullstack solutions, and collaborating with cross-functional teams. The ideal candidate has strong TypeScript skills, and needs to thrive in a collaborative, high-energy environment. This role is perfect for engineers aspiring to take initiative and deliver impactful solutions. #J-18808-Ljbffr
    $88k-118k yearly est. 4d ago
  • Physical Design Engineer, Machine Learning

    Apple Inc. 4.8company rating

    Design engineer job in Sunnyvale, CA

    At Apple, we believe our products begin with our people. By hiring a diverse team, we drive creative thought. By giving that team everything they need, we drive innovation. By hiring incredible engineers, we drive precision. And through our collaborative process, we build memorable experiences for our customers! These elements come together to make Apple an amazing environment for motivated people to do the greatest work of their lives. You will become part of a hands-on development team that sets the standard in cultivating excellence, creativity and innovation. Come help us design the next generation of revolutionary Apple products. We are looking for a forward-thinking and talented engineer. As a member of our team, you will have the opportunity to craft and implement methodologies with high impact on upcoming products that will delight millions of Apple's customers. In this role, you will be involved in our physical design machine learning efforts, collaborating with internal teams, and using your expertise to ensure that our SOCs achieve optimal Power, Performance, and Area (PPA). Description As part of the physical design machine learning architecture team, you will work on building efficient application processors for Apple products. Your experience in physical design and machine learning will help solve complex problems across RTL design, logic synthesis, floor planning, power/clock distribution, place and route, timing/noise analysis, power/thermal analysis, voltage drop analysis, and manufacturing/yield considerations. You will collaborate with design, power, post silicon, CAD, software, and machine learning teams in a dynamic environment. Minimum Qualifications Bachelor's degree and 3+ years of relevant industry experience. Understanding of optimization algorithms, data structures, and linear algebra. Knowledge of VLSI fundamentals, including physical design. Preferred Qualifications Experience with advanced machine learning algorithms like GNNs, VAEs, transformers, diffusion models, LLMs. Programming skills in Python and C/C++. Master's or PhD with relevant publications in Machine Learning or EDA algorithms. Strong communication and organizational skills. At Apple, compensation includes base pay within a range depending on skills and experience, along with stock programs, benefits, and educational reimbursement. The role may also be eligible for bonuses, commissions, or relocation support. Apple is an equal opportunity employer committed to diversity and inclusion. We promote equal opportunity regardless of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or other protected characteristics. #J-18808-Ljbffr
    $133k-176k yearly est. 5d ago
  • Hands-on Mechanical Design Engineer for Robotics Prototyping

    Droyd

    Design engineer job in San Francisco, CA

    A company specializing in robotic systems seeks a Mechanical Design Engineer to design and build mechanical subsystems from concept to prototype. This hands-on role involves using CAD, collaborating with electrical and software teams, and fabricating prototypes in a shop environment. Candidates should have a strong engineering portfolio and experience on hands-on engineering teams. The position is in California and requires in-person presence. #J-18808-Ljbffr
    $92k-123k yearly est. 4d ago
  • AI-Powered Mechanical Engineer, Industrial Systems

    Epoch Biodesign

    Design engineer job in San Francisco, CA

    An AI-native engineering firm in San Francisco seeks a talented mechanical engineer to lead the design and commissioning of mechanical systems across various industrial applications. The role involves using innovative AI-powered engineering tools and working closely with cross-functional teams to create efficient solutions. Ideal candidates will have foundational knowledge in mechanical engineering, hands-on experience with fluid systems or HVAC, and excellent collaboration skills. This is an opportunity to be part of an engineering-led team driving impactful projects. #J-18808-Ljbffr
    $104k-149k yearly est. 4d ago
  • Physical Design Engineer

    Openai 4.2company rating

    Design engineer job in San Francisco, CA

    About the Team OpenAI's Hardware team designs the custom silicon that powers the world's most advanced AI systems. From system‑level architecture to custom circuit implementations, we partner closely with model and infrastructure teams to deliver performance, power, and efficiency breakthroughs across all layers of the stack. About the Role We are seeking a highly skilled Silicon Implementation Engineer with deep expertise in physical design and methodology. This individual contributor role sits within our physical design team and is central to delivering power, performance, and area (PPA) optimized datapath and interconnect solutions for next‑generation AI accelerators. You'll work closely with RTL designers to define and execute on physical design strategies. You will develop tools, flows and methodologies to increase team productivity. Your work will directly impact silicon's performance and cost efficiency, as well as the team's execution velocity and quality. In this role, you will: Develop, build and own tools, flows and methodologies for physical implementation Own physical implementation of floorplan blocks from floorplanning to final signoff Collaborate with RTL designers to drive optimal block implementation solutions Analyze and optimize design for timing, power, and area trade‑offs, working in collaboration with EDA vendors and ASIC partners Qualifications: BS w/ 4+ or MS with 2+ years or PhD with 0-1 year(s) of relevant industry experience in physical design and methodology development Demonstrated success in taping out complex silicon designs Hands‑on experience with block physical implementation and PPA convergence Strong coding experience with python, bazel, TCL Strong experience building physical design tools, flows and methodologies Strong understanding of microarchitecture, RTL design, physical design, circuit design, physical verification and timing closure. Deep familiarity with industry‑standard tools and flows for physical synthesis, PNR, LEC and power estimation Bonus: Experience with AI or HPC‑focused chips Experience with optimizing PPA for high performance compute cores Hands‑on experience with top‑level design methodologies About OpenAI OpenAI is an AI research and deployment company dedicated to ensuring that general‑purpose artificial intelligence benefits all of humanity. We push the boundaries of the capabilities of AI systems and seek to safely deploy them to the world through our products. AI is an extremely powerful tool that must be created with safety and human needs at its core, and to achieve our mission, we must encompass and value the many different perspectives, voices, and experiences that form the full spectrum of humanity. We are an equal opportunity employer, and we do not discriminate on the basis of race, religion, color, national origin, sex, sexual orientation, age, veteran status, disability, genetic information, or other applicable legally protected characteristic. For additional information, please see OpenAI's affirmative Action and Equal Employment Opportunity Policy Statement Background checks for applicants will be administered in accordance with applicable law, and qualified applicants with arrest or conviction records will be considered for employment consistent with those laws, including the San Francisco Fair Chance Ordinance, the Los Angeles County Fair Chance Ordinance for Employers, and the California Fair Chance Act, for US‑based candidates. For unincorporated Los Angeles County workers: we reasonably believe that criminal history may have a direct, adverse and negative relationship with the following job duties, potentially resulting in the withdrawal of a conditional offer of employment: protect computer hardware entrusted to you from theft, loss or damage; return all computer hardware in your possession (including the data contained therein) upon termination of employment or end of assignment; and maintain the confidentiality of proprietary, confidential, and non‑public information. In addition, job duties require access to secure and protected information technology systems and related data security obligations. To notify OpenAI that you believe this job posting is non‑compliant, please submit a report through this form. No response will be provided to inquiries unrelated to job posting compliance. We are committed to providing reasonable accommodations to applicants with disabilities, and requests can be made via link. OpenAI Global Applicant Privacy Policy At OpenAI, we believe artificial intelligence has the potential to help people solve immense global challenges, and we want the upside of AI to be widely shared. Join us in shaping the future of technology. #J-18808-Ljbffr
    $96k-131k yearly est. 5d ago
  • Senior Principal Mech Engineer, R&D Equipment Lead

    Fusion Energy Base

    Design engineer job in Milpitas, CA

    A leading fusion energy company in Milpitas is seeking a Principal Mechanical Engineer to join their R&D team focused on advanced thin-film deposition technology. Responsibilities include designing R&D equipment, leading complex projects, and mentoring engineering staff. The ideal candidate will have a Master's in Mechanical Engineering, over 15 years of experience in mechanical design, and familiarity with tools such as SolidWorks and ANSYS. Competitive salary and benefits are offered, including 12.5 holidays and flexible vacation days. #J-18808-Ljbffr
    $110k-150k yearly est. 1d ago
  • Staff ML Engineer - AI-Powered Observability Platform

    Cisco Systems 4.8company rating

    Design engineer job in San Jose, CA

    A global technology company is looking for a seasoned software engineer to enhance AI capabilities within their observability platform. Candidates should have a strong background in AI/ML systems, cloud computing, and robust technical leadership. This role is pivotal in driving innovation in data analysis and delivering scalable solutions. The ideal candidate will thrive in an agile environment and provide mentorship to junior engineers. Enjoy competitive salaries and benefits while contributing to impactful technology solutions. #J-18808-Ljbffr
    $151k-191k yearly est. 4d ago
  • Product Engineer (SF)

    Tempo 4.2company rating

    Design engineer job in San Francisco, CA

    Tempo is a layer-1 blockchain purpose-built for stablecoins and real-world payments, born from Stripe's experience in global payments and Paradigm's expertise in crypto tech. Tempo's payment-first design provides a scalable, low-cost predictable backbone that meets the needs of high-volume payment use cases. Our goal is to move money reliably, cheaply, and at scale. Our north star is simplicity for users: fintechs, traditional banks, merchants, platforms, and anyone else looking to move their payments into the 21st century. We're building Tempo with design partners who are global leaders in AI, e-commerce, and financial services: Anthropic, Coupang, Deutsche Bank, DoorDash, Mercury, Nubank, OpenAI, Revolut, Shopify, Standard Chartered, Visa, and more. We're a team of crypto-optimists, building the infrastructure needed to bring real, substantial economic flows onchain. We like to move fast and swing for the fences - join us! The Role We're hiring for an early Product Engineer to help Tempo's partners move money on-chain. You'll work directly with design partners to diagnose, design, build, and deliver production-ready applications and integrations. You'll build world-class products that bring together the best in wallets, APIs, explorers, and payment systems, capable of turning any customer need into running code. This is a deeply technical, high-ownership role for someone who thrives on autonomy, collaboration, and execution. The ideal candidate combines the mindset of a product-oriented engineer with the instincts of a customer-facing developer, working across Tempo's stack to unblock integrations, ship fixes quickly, and feed insights back into Product and Engineering. The role is ideal for customer- and product-centric engineers who aspire to be founders. Responsibilities Scope, architect, and deliver customer applications that meet functional, security, and reliability requirements Build and own fullstack partner applications across frontend, backend, and on-chain components for partners on Tempo Stand up reliable backends with services, queues, and data models; integrate partner systems and third-party SDKs; optimize for performance and cost Prototype to validate with POCs and middleware to unblock partners quickly, and graduate successful patterns to production quality Collaborate with Product, Partnerships, and Engineering to prioritize and land high-impact improvements surfaced from the field Customer engagements can range from month-long embedded product builds, to week-long feature deliveries, to short-term Q&A and support work Qualifications Experience as a fullstack software engineer or forward deployed engineer at a blockchain, fintech, or infrastructure company. Prior experience with customer-facing roles is not required, but may be beneficial. Deep proficiency in TypeScript is a must to build performant, delightful product experiences. The ideal candidate can take customer requirements to architect and design a solution, ship into production, and debug across frontend, backend, SDK, and onchain layers. Nice to have Wagmi, Viem, and Foundry experience and bonus for Solidity, Go, Rust, and infrastructure experience. Strong communication and customer empathy; able to bridge technical depth with clear, actionable guidance for non-technical audiences. Proven ability to operate independently and make product-level tradeoffs in high-context, fast-moving environments Attributes High-energy, proactive, and execution-driven Engineer by trade with a deep curiosity for how systems work end-to-end Sharp communicator who can represent Tempo's technology with clarity and conviction Highly autonomous, comfortable prioritizing and shipping fixes directly in the field Collaborative and adaptable; learns fast from partners and feeds insights back into the product loop Scrappy and hands-on; willing to dive deep to make integrations succeed #J-18808-Ljbffr
    $88k-118k yearly est. 4d ago
  • Research-Hardware Codesign Engineer

    Openai 4.2company rating

    Design engineer job in San Francisco, CA

    Research-Hardware Codesign Engineer | OpenAI Careers Research-Hardware Codesign Engineer Hardware - San Francisco Apply now (opens in a new window) About the Team OpenAI's Hardware organization develops silicon and system-level solutions designed for the unique demands of advanced AI workloads. The team is responsible for building the next generation of AI silicon while working closely with software and research partners to co-design hardware tightly integrated with AI models. In addition to delivering production-grade silicon for OpenAI's supercomputing infrastructure, the team also creates custom design tools and methodologies that accelerate innovation and enable hardware optimized specifically for AI. About the Role We're seeking a Research-Hardware Codesign Engineer to operate at the boundary between model research and silicon/system architecture. You'll help shape the numerics, architecture, and technology bets of future OpenAI silicon in collaboration with both Research and Hardware. Your work will include debugging gaps between rooflines and reality, writing quantization kernels, derisking numerics via model evals, quantifying system architecture tradeoffs, and implementing novel numeric RTL. This is a hands‑on role for people who go looking for hard problems, get to ground truth, and drive it to production. Strong prioritization and clear, honest communication are essential. Location: San Francisco, CA (Hybrid: 3 days/week onsite) Relocation assistance available. In this role: Build on our roofline simulator to track evolving workloads, and deliver analyses that quantify the impact of system architecture decisions and support technology pathfinding. Debug gaps between performance simulation and real measurements; clearly communicate root cause, bottlenecks, and invalid assumptions. Write emulation kernels for low‑precision numerics and lossy compression schemes, and get Research the information they need to trade efficiency with model quality. Prototype numerics modules by pushing RTL through synthesis; hand off novel numerics cleanly, or occasionally own an RTL module end‑to‑end. Proactively pull in new ML workloads, prototype them with rooflines and/or functional simulation, and drive initial evaluation of new opportunities or risks. Understand the whole picture from ML science to hardware optimization, and slice this end‑to‑end objective into near‑term deliverables. Build ad‑hoc collaborations across teams with very different goals and areas of expertise, and keep progress unblocked. Communicate design tradeoffs clearly with explicit assumptions and confidence levels; produce a trail of evidence that enables confident execution. You Will Thrive in this Role if: An exceptional track record of high‑quality technical output, and a bias for shipping a prototype now and iterating later in the absence of clear requirements. Strong Python, and C++ or Rust, with a cautious attitude toward correctness and an intuition for clean extensibility. Experience writing Triton, CUDA, or similar, and an understanding of the resulting mapping of tensor ops to functional units. Working knowledge of PyTorch or JAX; experience in large ML codebases is a plus. Practical understanding of floating point numerics, the ML tradeoffs of reduced precision, and the current state of the art in model quantization. Deep understanding of transformer models, and strong intuition for transformer rooflines and the tradeoffs of sharded training and inference in large‑scale ML systems. Experience writing RTL (especially for floating point logic) and understanding of PPA tradeoffs is a plus. Strong cross‑functional communication (e.g. across ML researchers and hardware engineers); ability to slice ambiguous early‑incubation ideas into concrete arenas in which progress can be made. About OpenAI OpenAI is an AI research and deployment company dedicated to ensuring that general‑purpose artificial intelligence benefits all of humanity. We push the boundaries of the capabilities of AI systems and seek to safely deploy them to the world through our products. AI is an extremely powerful tool that must be created with safety and human needs at its core, and to achieve our mission, we must encompass and value the many different perspectives, voices, and experiences that form the full spectrum of humanity. We are an equal opportunity employer, and we do not discriminate on the basis of race, religion, color, national origin, sex, sexual orientation, age, veteran status, disability, genetic information, or other applicable legally protected characteristic. For additional information, please see OpenAI's Aff… . Background checks for applicants will be administered in accordance with applicable law, and qualified applicants with arrest or conviction records will be considered for employment consistent with those laws, including the San Francisco Fair Chance Ordinance, the Los Angeles County Fair Chance Ordinance for Employers, and the California Fair Chance Act, for US‑based candidates. For unincorporated Los Angeles County workers: we reasonably believe that criminal history may have a direct, adverse and negative relationship with the following job duties, potentially resulting in the withdrawal of a conditional offer of employment: protect computer hardware entrusted to you from theft, loss or damage; return all computer hardware in your possession (including the data contained therein) upon termination of employment or end of assignment; and maintain the confidentiality of proprietary, confidential, and non‑public information. In addition, job duties require access to secure and protected information technology systems and related data security obligations. To notify OpenAI that you believe this job posting is non‑compliant, please submit a report through this form . No response will be provided to inquiries unrelated to job posting compliance. We are committed to providing reasonable accommodations to applicants with disabilities, and requests can be made via this link . OpenAI Global Applicant Privacy Policy At OpenAI, we believe artificial intelligence has the potential to help people solve immense global challenges, and we want the upside of AI to be widely shared. Join us in shaping the future of technology. Compensation $230K - $460K + Offers Equity Apply now (opens in a new window) #J-18808-Ljbffr
    $121k-162k yearly est. 1d ago

Learn more about design engineer jobs

How much does a design engineer earn in San Mateo, CA?

The average design engineer in San Mateo, CA earns between $78,000 and $148,000 annually. This compares to the national average design engineer range of $57,000 to $102,000.

Average design engineer salary in San Mateo, CA

$107,000

What are the biggest employers of Design Engineers in San Mateo, CA?

The biggest employers of Design Engineers in San Mateo, CA are:
  1. Goken America
  2. Replit
  3. CelLink
  4. Twenty Labs
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