Electrical engineer internship jobs in San Marcos, CA - 282 jobs

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering Applicants selected will be subject to a government security investigation and must meet eligibility requirements for access to classified information. Must be a U.S. citizen and eligible to receive a U.S. Government security clearance We are seeking a highly skilled and motivated Physical Design Engineer to join our team. The ideal candidate will have hands‑on experience in RTL‑to‑GDSII flow, with a strong focus on Floor‑planning, Clock Tree Synthesis, Place‑n‑Route (PnR), DRC and Timing closure. This role involves architecting and implementing robust, low‑skew, power‑efficient clock distribution networks tailored for a complex design to meet performance, power, and area goals. This role requires full‑time onsite work in San Diego, CA (5 days per week). Minimum Qualifications: Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience. PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. Key Responsibilities: Execute floorplanning, placement, clock tree synthesis (CTS), and routing using industry‑standard tools (e.g., Innovus, ICC2). Drive timing closure across multiple corners and modes using static timing analysis (STA) tools (e.g., PrimeTime). Collaborate with RTL designers to resolve timing, congestion, and DRC issues. Optimize design for power, performance, and area (PPA). Conduct formal equivalence checks between RTL and netlist. Support physical verification including DRC, LVS, and antenna checks. Work closely with backend teams for tapeout preparation and signoff. Excellent scripting skills (TCL, Python, Perl) for reference flow automation. Execute full‑chip and block‑level physical verification including DRC, LVS, ERC, antenna, and density checks using industry‑standard tools (e.g., Calibre, Pegasus, ICV). Customize and optimize reference physical verification flows to align with project needs and foundry requirements. Perform GDS‑to‑GDS comparisons to validate ECO changes, ensure layout integrity, and support tapeout readiness. Debug and resolve physical verification violations, working closely with layout, design, and CAD teams. Collaborate with foundries to ensure compliance with latest design rule manuals (DRMs) and tapeout checklists. Support signoff verification, including multi‑corner/multi‑mode analysis and ECO validation. Develop and maintain automation scripts for verification flows, reporting, and regression testing. Interface with EDA vendors to resolve tool issues and improve flow robustness. Participate in design reviews, providing feedback on layout quality, rule compliance, and manufacturability. Ensure timely delivery of clean GDSII for tapeout, with full verification signoff. Perform full‑chip and block‑level static timing analysis (STA) using industry‑standard tools (e.g., Synopsys PrimeTime, Cadence Tempus). Develop, validate, and maintain timing constraints (SDC) for multiple modes and corners. Collaborate with RTL, synthesis, and physical design teams to ensure timing‑aware design practices. Debug and resolve setup, hold, and transition violations across various PVT corners. Drive timing closure through iterative optimization and ECO implementation. Customize and enhance timing analysis flows to improve accuracy, efficiency, and scalability. Analyze clock tree timing, including skew, latency, and jitter impacts. Support signoff timing verification, including cross‑domain timing and false/multicycle path handling. Define and implement low‑power architecture using CLP methodology across RTL and physical design stages. Develop and maintain power intent files (UPF/CPF) and ensure alignment with design specifications. Customize and optimize low‑power reference flows to meet project‑specific requirements. Collaborate with RTL, synthesis, and physical design teams to integrate power‑aware features such as power gating, retention, isolation, and level shifting. Perform power‑aware static checks, simulation, and formal verification to validate power intent. Debug and resolve issues related to power domain crossings, voltage islands, and power sequencing. Support signoff verification including power‑aware LVS/DRC, STA, and EM/IR analysis. Ensure compliance with foundry low‑power guidelines and contribute to successful tapeout. Qualifications: Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field. 4+ years of experience in physical design, with a focus on clock tree design and implementation. Strong understanding of digital timing concepts, clock domain crossing, and synchronous/asynchronous design. Proficiency with EDA tools for CTS, STA, and physical verification (e.g., ICC2, Innovus, PrimeTime). Experience with advanced nodes (e.g., 7nm, 5nm, 3nm) and FinFET technologies. Solid scripting skills (TCL, Python, Perl) for flow automation and data analysis. Familiarity with low‑power design techniques, including clock gating and multi‑voltage domains. Preferred Skills: Experience with custom clock tree architectures such as H‑tree, mesh, or spine‑based topologies. Knowledge of EM/IR analysis, thermal‑aware clocking, and reliability modeling. Exposure to high‑speed interface clocking (e.g., SerDes, DDR, PCIe). Understanding of package‑level clock planning and signal integrity. Principal Duties & Responsibilities: Leverages advanced ASIC knowledge and experience to define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power products. Creates advanced architectures, circuit specifications, logic designs, and/or system simulations based on system‑level requirements. Collaborates across functional teams (e.g., software architecture, hardware architecture, product management, program management teams) to develop and execute an implementation strategy that meets system requirements and customer needs. Evaluates all aspects of complex process flow from high‑level design to synthesis, place and route, timing and power use, and verification or similarly for custom circuit design/layout flow. Utilizes tools/applications (e.g., RTL to GDS Flow, Virtuoso) to execute and enable advanced architecture and design of multiple complex blocks/SoC or IC Packages. Writes and reviews detailed technical documentation for complex EDA/IP/ASIC projects. Level of Responsibility: • Works independently with minimal supervision. • Provides supervision/guidance to other team members. • Decision‑making is significant in nature and affects work beyond immediate work group. • Requires verbal and written communication skills to convey complex information. May require negotiation, influence, tact, etc. • Has a moderate amount of influence over key organizational decisions (e.g., is consulted by senior leadership to make key decisions). • Tasks do not have defined steps; planning, problem‑solving, and prioritization must occur to complete the tasks effectively. Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e‑mail disability‑************************** or call Qualcomm's toll‑free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification. Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. Pay range and Other Compensation & Benefits: $140,000.00 - $210,000.00 The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales‑incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer - and you can review more details about our US benefits at this link. If you would like more information about this role, please contact Qualcomm Careers. #J-18808-Ljbffr

Job Description: Electrical Engineer (Multiple Levels: Electrical Designer | Electrical Engineer | Senior Electrical Engineer) We are seeking skilled and motivated Electrical professionals across multiple experience levels to join our team in the building industry. This opportunity is open to candidates ranging from Electrical Designers to experienced and Senior Electrical Engineers specializing in building systems. The ideal candidate will possess expertise in electrical engineering principles with a focus on building systems and a strong understanding of how electrical systems integrate with multidisciplinary MEP designs. A solid working knowledge of California regulations, including the California Building Code and California Electrical Code, is essential for engineering-level roles. Proficiency in utilizing Revit and BIM (Building Information Modeling) software is a key component of this position. Responsibilities and level of responsibility will be aligned with the candidate's experience, skill set, and licensure. Responsibilities: Design and Planning: Assist with or lead the development of electrical design concepts, specifications, and calculations for various building types, including multifamily, commercial, retail, industrial, and life science projects, in accordance with applicable codes and standards. Create electrical layouts, schematic diagrams, single-line diagrams, and system drawings for power distribution, lighting, and low-voltage systems. Collaborate with architects, engineers, and project stakeholders to ensure coordinated and integrated electrical system designs. Support continuous improvement of electrical design efficiency, sustainability, and cost-effectiveness while maintaining safety and compliance.. System Analysis: Perform or support load calculations, voltage drop analysis, short-circuit calculations, lighting calculations, and coordination studies, as appropriate to experience level. Assist with evaluating energy-efficient technologies and sustainable design strategies for electrical systems. Technical Documentation: Prepare detailed electrical drawings, plans, and specifications for construction documentation using AutoCAD and Revit/BIM. Generate technical reports, project documentation, and compliance materials as required by project and regulatory standards. Project Management & Coordination: Support or lead coordination of electrical designs with mechanical, plumbing, architectural, and structural disciplines. Participate in project meetings and internal design reviews. Review and coordinate electrical drawings prior to transmittal to ensure completeness and accuracy. Assist with project scheduling, budgeting, and resource planning related to electrical tasks. Quality Assurance: Conduct reviews to ensure electrical designs comply with applicable codes, standards, and project requirements. Collaborate with internal quality assurance processes to verify performance and safety of electrical installations. Client Engagement (Mid- to Senior-Level): Communicate effectively with clients and project teams regarding electrical design questions. Support responses to RFIs, submittals, and design clarifications as needed. Professional Development: Stay current with industry trends, electrical codes, and emerging technologies. Identify opportunities for innovation and improvements in electrical system design. Requirements: Electrical Designer / Junior Level: Bachelor's degree in Electrical Engineering, Electrical Design, or a related field preferred, or equivalent professional experience. Proficiency in AutoCAD; Revit experience preferred. Basic understanding of electrical building systems and construction documentation. Strong attention to detail and ability to work collaboratively. Electrical Engineer: Bachelor's degree in Electrical Engineering or a related field. Experience in electrical design for building systems. Working knowledge of the California Building Code and California Electrical Code. Proficiency in AutoCAD and Revit/BIM. Strong analytical, organizational, and problem-solving skills. Senior Electrical Engineer: Extensive experience in electrical engineering within the building industry. Strong knowledge of California codes and jurisdictional requirements. Ability to lead projects, coordinate across disciplines, and mentor junior staff. Professional Engineering (PE) licensure in California preferred but not required. Familiarity with sustainable design practices and energy efficiency is a plus. Compensation & Benefits: The compensation range is dependent on the facts and circumstances of each case. The factors considered in making compensation decisions include skill sets, experience and training, licensure and certifications, and other business and organizational needs. We offer a competitive benefits package including: A competitive salary. Medical coverage reimbursement Personal time off (PTO) Paid company holiday. Flexibility with work schedule. Employee Assistance Program If you are a Electrical professional with a passion for building systems and a desire to grow within an MEP engineering firm, we invite you to apply and join the 120 Degreez team. Other Information: 120 Degreez is an equal opportunity employer that is committed to diversity and inclusion in the workplace. We prohibit discrimination and harassment of any kind based on race, color, sex, religion, sexual orientation, national origin, disability, genetic information, pregnancy, or any other protected characteristic as outlined by federal, state, or local laws.

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering Applicants selected will be subject to a government security investigation and must meet eligibility requirements for access to classified information. Must be a U.S. citizen and eligible to receive a U.S. Government security clearance We are seeking a highly skilled and motivated Physical Design Engineer to join our team. The ideal candidate will have hands‑on experience in RTL‑to‑GDSII flow, with a strong focus on Floor‑planning, Clock Tree Synthesis, Place‑n‑Route (PnR), DRC and Timing closure. This role involves architecting and implementing robust, low‑skew, power‑efficient clock distribution networks tailored for a complex design to meet performance, power, and area goals. This role requires full‑time onsite work in San Diego, CA (5 days per week). Minimum Qualifications: Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience. PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. Key Responsibilities: Execute floorplanning, placement, clock tree synthesis (CTS), and routing using industry‑standard tools (e.g., Innovus, ICC2). Drive timing closure across multiple corners and modes using static timing analysis (STA) tools (e.g., PrimeTime). Collaborate with RTL designers to resolve timing, congestion, and DRC issues. Optimize design for power, performance, and area (PPA). Conduct formal equivalence checks between RTL and netlist. Support physical verification including DRC, LVS, and antenna checks. Work closely with backend teams for tapeout preparation and signoff. Excellent scripting skills (TCL, Python, Perl) for reference flow automation. Execute full‑chip and block‑level physical verification including DRC, LVS, ERC, antenna, and density checks using industry‑standard tools (e.g., Calibre, Pegasus, ICV). Customize and optimize reference physical verification flows to align with project needs and foundry requirements. Perform GDS‑to‑GDS comparisons to validate ECO changes, ensure layout integrity, and support tapeout readiness. Debug and resolve physical verification violations, working closely with layout, design, and CAD teams. Collaborate with foundries to ensure compliance with latest design rule manuals (DRMs) and tapeout checklists. Support signoff verification, including multi‑corner/multi‑mode analysis and ECO validation. Develop and maintain automation scripts for verification flows, reporting, and regression testing. Interface with EDA vendors to resolve tool issues and improve flow robustness. Participate in design reviews, providing feedback on layout quality, rule compliance, and manufacturability. Ensure timely delivery of clean GDSII for tapeout, with full verification signoff. Perform full‑chip and block‑level static timing analysis (STA) using industry‑standard tools (e.g., Synopsys PrimeTime, Cadence Tempus). Develop, validate, and maintain timing constraints (SDC) for multiple modes and corners. Collaborate with RTL, synthesis, and physical design teams to ensure timing‑aware design practices. Debug and resolve setup, hold, and transition violations across various PVT corners. Drive timing closure through iterative optimization and ECO implementation. Customize and enhance timing analysis flows to improve accuracy, efficiency, and scalability. Analyze clock tree timing, including skew, latency, and jitter impacts. Support signoff timing verification, including cross‑domain timing and false/multicycle path handling. Define and implement low‑power architecture using CLP methodology across RTL and physical design stages. Develop and maintain power intent files (UPF/CPF) and ensure alignment with design specifications. Customize and optimize low‑power reference flows to meet project‑specific requirements. Collaborate with RTL, synthesis, and physical design teams to integrate power‑aware features such as power gating, retention, isolation, and level shifting. Perform power‑aware static checks, simulation, and formal verification to validate power intent. Debug and resolve issues related to power domain crossings, voltage islands, and power sequencing. Support signoff verification including power‑aware LVS/DRC, STA, and EM/IR analysis. Ensure compliance with foundry low‑power guidelines and contribute to successful tapeout. Qualifications: Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field. 4+ years of experience in physical design, with a focus on clock tree design and implementation. Strong understanding of digital timing concepts, clock domain crossing, and synchronous/asynchronous design. Proficiency with EDA tools for CTS, STA, and physical verification (e.g., ICC2, Innovus, PrimeTime). Experience with advanced nodes (e.g., 7nm, 5nm, 3nm) and FinFET technologies. Solid scripting skills (TCL, Python, Perl) for flow automation and data analysis. Familiarity with low‑power design techniques, including clock gating and multi‑voltage domains. Preferred Skills: Experience with custom clock tree architectures such as H‑tree, mesh, or spine‑based topologies. Knowledge of EM/IR analysis, thermal‑aware clocking, and reliability modeling. Exposure to high‑speed interface clocking (e.g., SerDes, DDR, PCIe). Understanding of package‑level clock planning and signal integrity. Principal Duties & Responsibilities: Leverages advanced ASIC knowledge and experience to define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power products. Creates advanced architectures, circuit specifications, logic designs, and/or system simulations based on system‑level requirements. Collaborates across functional teams (e.g., software architecture, hardware architecture, product management, program management teams) to develop and execute an implementation strategy that meets system requirements and customer needs. Evaluates all aspects of complex process flow from high‑level design to synthesis, place and route, timing and power use, and verification or similarly for custom circuit design/layout flow. Utilizes tools/applications (e.g., RTL to GDS Flow, Virtuoso) to execute and enable advanced architecture and design of multiple complex blocks/SoC or IC Packages. Writes and reviews detailed technical documentation for complex EDA/IP/ASIC projects. Level of Responsibility: • Works independently with minimal supervision. • Provides supervision/guidance to other team members. • Decision‑making is significant in nature and affects work beyond immediate work group. • Requires verbal and written communication skills to convey complex information. May require negotiation, influence, tact, etc. • Has a moderate amount of influence over key organizational decisions (e.g., is consulted by senior leadership to make key decisions). • Tasks do not have defined steps; planning, problem‑solving, and prioritization must occur to complete the tasks effectively. Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e‑mail disability‑************************** or call Qualcomm's toll‑free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification. Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. Pay range and Other Compensation & Benefits: $140,000.00 - $210,000.00 The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales‑incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer - and you can review more details about our US benefits at this link. If you would like more information about this role, please contact Qualcomm Careers. #J-18808-Ljbffr

Stantec's Buildings team is on a mission to become the world's leading integrated design practice. Our architects, engineers, interior designers, consultants, sustainability specialists, and technologists are passionate about the power of design. Our collaborative culture and our innovative, sustainable approach to projects help us create buildings that matter to our world. Together, we are enhancing the quality of life globally through design. Join us and design your place with Stantec. Your Opportunity As a Principal, Electrical Engineering, one must bring deep knowledge and thought leadership that is client-facing, strategic and transparent, and of technical excellence. A focus on experience and relationships in the A/E/C industry to contribute to the overall strategic and tactical leadership of the Stantec Buildings engineering team and leading the electrical engineering practice in the San Diego Area. This position is client-facing requiring leadership in strategic projects, while advancing the overall engineering practice as well as team growth and development. In addition, business development, contributions to project delivery standards and work processes, quality control, workload forecasting, financial performance accountability and collaboration with other disciplines is critical. The principal contributes to differentiating Stantec from other competing firms and thereby positions Stantec as innovators in the industry. Your Key Responsibilities Business Development/Strategy - approximately 25% of time Be a primary contributor to building Stantec's Sector Engineering practice in the San Diego Area. Be a Principal leader within the San Diego office. Partner with the other Principal leaders in the office to help develop and sustain strategic growth objectives and tactical plans to ensure the continued growth trajectory of the office and integrated practice. Interface regularly with additional architectural, mechanical engineering and electrical engineering leaders in US West and across North America to thrive and contribute within the integrated design practice Develop and execute strategic and tactical business and marketing plans for the engineering practice in San Diego that aligns with Business Center, Regional and National practice goals to advance the overall Buildings practice. Sustain and grow top line revenue helping to achieve growth objectives in the San Diego/Southern California and US West areas in collaboration with the Regional Business Leader, Business Center Practice Leaders, and Engineering leaders in US West to achieve key operational performance metrics. Develop and maintain industry relationships and visibility with current and prospective clients, sub-consultants, and partner firms in the local and regional A/E industry. Assist with the development of the annual business plan and budget for the business center and working with the leadership team to achieve key performance indicators. Develop presentation materials and present to clients and at strategic industry events. Represent the firm through published articles, public speaking engagements and attendance at industry and community events, meetings, and conferences. Develop project proposals. Assist the marketing department with the development of health sector engineering marketing materials and content. People and Practice Management - approximately 20% of time Hire, develop, grow and lead a team consisting of engineering project managers, engineer's designers, and production team members. In conjunction with other stakeholders, identify and forecast staff needs and assignments based on current and projected workload and SME requirements. Hold project team members accountable for technical excellence, delivery standards, and best practices. Responsible for managing the financial performance, quality control processes, and project delivery for Electrical Engineering projects. Ensure compliance with best practices, including Stantec PM Frameworks Project Involvement. Project Design and Delivery - approximately 40% of time Work with PM's and SMEs on key projects to develop and deliver client drawings, specifications, presentations, reports, and other deliverables. Successfully manage projects of significant scope, complexity, and revenue budget. Apply buildings engineering and project management knowledge while leading cross-functional resources to meet project requirements within established timeframes and budgets. Meet technical, contractual, schedule, budgetary and client service objectives for projects. Apply strong engineering skills, experience and knowledge to the design and oversight of the design for building projects. Manage and plan the production resources and workflow to produce the design documentation, drawings, and calculations required for engineering projects. Act as a QC and/or Independent Technical reviewer on Electrical Engineering projects. Technical Leadership - approximately 15% of time Maintain awareness of operational, technical, or regulatory changes within Electrical Engineering and AEC industry overall, disseminate such knowledge to team and firm, and integrate into existing processes and standards. Assist to maintain and update Health Sector Engineering specifications, technical documentation, and standards in collaboration with other technical resources within Stantec. Oversee Electrical Engineering Design delivery process and best practices and coordinate with other disciplines. Provide oversight for Electrical Engineering continuing education and development, including staff education and certification process & balance firm, studio and staff needs. Learning/Maintaining and Expanding Technical and Managerial Skills: Maintain current knowledge of technologies and trends impacting Stantec's core service offerings and markets and continually strengthens skills. Your Capabilities and Credentials Outstanding client service skills with ability to lead practice members in consistently delivering an exceptional standard of service to every client. Strong managerial skills with ability to hire, engage, develop, and retain top-tier talent. Strong business acumen with ability to identify, develop and map strategy, prepare, interpret, and manage budgets, and analyze business results. Business development skills with ability to identify and develop prospects, nurture key relationships, cross-sell services, negotiate, and engage business. Comprehensive understanding of building project components, project management and delivery systems; ability to continuously evaluate and refine processes to increase efficiency and client satisfaction. Ability to manage clients, projects, fee, scope, and teams to achieve budget, schedule and deliverable objectives while meeting key stakeholder critical success factors. Familiarity with, and ability to produce, project-related documents and documentation standards required of a Project Manager. Ability to integrate design elements with other disciplines to deliver a coordinated design. Strong knowledge of applicable codes and standards. A commanding knowledge of technical issues supporting delivered design services. Strong technical understanding and working knowledge of buildings systems for the following core markets: Healthcare, Higher Education, Science and Technology, Mission Critical Facilities, Commercial/Workspace. Strong knowledge of the Health Sector market is preferred. Deep understanding of and ability to apply sustainable design principles within projects. Outstanding consulting skills with ability to present a credible, engaging image in keeping with Stantec's high service standards. Excellent verbal and written communication skills and polished presentation and public speaking skills. Fundamental understanding of NFPA 70, 72, 99 101,110 and/or FGI Guidelines as they specifically apply to hospitals, ambulatory surgical centers, and medical office buildings. Deep knowledge preferred for fire alarm and detection systems as well as healthcare technology systems such as nurse call communications, synchronized clocks, and voice/data/video infrastructure systems. Experience to identify and manage items of risk that may occur on projects. Ability to identify and manage potential unanticipated scope. Passion to integrate design elements with other disciplines to deliver a coordinated design. Dedication to apply sustainable design principles within projects while maintaining the process driven requirements of the markets we focus on facilities. Successful history of collaboration with contractors in various alternative construction delivery processes such as Design assist, Design-Build, and IPD Possess a valid driver's license with a good driving record Education and Experience Bachelor's degree in engineering 15+ years related professional experience Professional Engineering license Project Management Professional certification a plus LEED AP Credential preferred Typical office environment working with computers and remaining sedentary for long periods of time. Field work may include exposure to the elements including inclement weather. This description is not a comprehensive listing of activities, duties or responsibilities that may be required of the employee and other duties, responsibilities and activities may be assigned or may be changed at any time with or without notice This description is not a comprehensive listing of activities, duties or responsibilities that may be required of the employee and other duties, responsibilities and activities may be assigned or may be changed at any time with or without notice. Stantec is a place where the best and brightest come to build on each other's talents, do exciting work, and make an impact on the world around us. Join us and redefine your personal best. About Stantec Stantec is a global leader in sustainable engineering, architecture, and environmental consulting. The diverse perspectives of our partners and interested parties drive us to think beyond what's previously been done on critical issues like climate change, digital transformation, and future-proofing our cities and infrastructure. We innovate at the intersection of community, creativity, and client relationships to advance communities everywhere, so that together we can redefine what's possible. Pay Range: • Locations in CO, HI, MD & Various CA, NJ Areas - Min Salary $ 137,300.00 - Max Salary $ 205,900.00 Pay Transparency: In compliance with pay transparency laws, pay ranges are provided for positions in locations where required. Please note, the final agreed upon compensation is based on individual education, qualifications, experience, and work location. At Stantec certain roles are bonus eligible. Benefits Summary: Regular full-time and part-time employees (working at least 20 hours per week) have access to medical, dental, and vision plans, a wellness program, health saving accounts, flexible spending accounts, 401(k) plan, employee stock purchase program, life and accidental death & dismemberment (AD&D) insurance, short-term/long-term disability plans, emergency travel benefits, tuition reimbursement, professional membership fee coverage and paid family leave. Regular full-time and part-time employees will receive ten paid holidays in each calendar year. In addition, employees will be eligible to accrue vacation between 10 and 20 days per year and eligible for paid sick leave (and if more generous, in accordance with state and local law). Temporary/casual employees have access to 401(k) plans, employee stock purchase program, and paid leave, in accordance with state and local law. The benefits information listed above may not apply to union positions because benefits for such positions are governed by applicable collective bargaining agreements Primary Location: United States | CA | San Diego Organization: BC-2045 Buildings-US California Engineering Employee Status: Regular Travel: Yes Schedule: Full time Job Posting: 16/06/2025 10:06:36 Req ID: REQ250000HO Stantec provides equal employment opportunities to all qualified employees and applicants for future and current employment and prohibit discrimination on the grounds of race, colour, religion, sex, national origin, age, marital status, genetic information, disability, sexual orientation, gender identity or gender expression. We prohibit discrimination in decisions concerning recruitment, hiring, referral, promotion, compensation, fringe benefits, job training, terminations or any other condition of employment. Stantec is in compliance with laws and regulations and ensures equitable opportunities in all aspects of employment. At Stantec we are committed to ensuring our recruitment process is accessible to all. If you require reasonable adjustments to be made during the recruitment process then please inform a member of our Talent Acquisition team. #J-18808-Ljbffr

* Required Education: * Bachelors Degree in Engineering or Electrical Engineering with 2 years work experience OR Masters Degree in Engineering or Electrical Engineering Required Skills: Experience in Handset testing commercial OEM or Qualcomm devices in Field / Lab Environment across 5G/4G/3G operators Experience in drive testing in field on-site and ability to debug / troubleshoot /analyzing basic device / OTA issues (camping, provisioning) between device and network Experience in testing, debugging and familiarity with Android OS Excellent written and verbal communication skills Has valid US Drivers License Experience using QC tools like QXDM, QCAT, PCAT etc Understanding of software development and testing concepts for wireless handset for various air interface standards - 5G (SA, NSA, mmW, NRDC), LTE Need to be in field for 8 hrs with Van/drive test as part of Field Engineer Position Preferred Skills/Education: Experience with Stability Testing Experience with air interface performance analysis, characterization and optimization Experience with test planning / test case development Understanding of Physical/MAC layers and Call Processing concepts Exposure to programming in C, Perl, Shell Scripting is a plus

9 months + San Diego, CA -100% onsite Must Have Experience in Handset testing commercial OEM or Field / Lab Environment across 5G/4G/3G operators Experience in drive testing in field on-site and ability to debug / troubleshoot /analyzing basic device / OTA issues (camping, provisioning) between device and network Experience in testing, debugging and familiarity with Android OS Excellent written and verbal communication skills Has valid US Drivers License Nice To Have JOB DESCRIPTION Required Education: Bachelors Degree in Engineering or Electrical Engineering with 2 years work experience OR Masters Degree in Engineering or Electrical Engineering Required Skills: Experience in Handset testing commercial OEM / Lab Environment across 5G/4G/3G operators Experience in drive testing in field on-site and ability to debug / troubleshoot /analyzing basic device / OTA issues (camping, provisioning) between device and network Experience in testing, debugging and familiarity with Android OS Excellent written and verbal communication skills Has valid US Drivers License Experience using QC tools like QXDM, QCAT, PCAT etc Understanding of software development and testing concepts for wireless handset for various air interface standards - 5G (SA, NSA, mmW, NRDC), LTE Need to be in field for 8 hrs with Van/drive test as part of Field Engineer Position Preferred Skills/Education: Experience with Stability Testing Experience with air interface performance analysis, characterization and optimization Experience with test planning / test case development Understanding of Physical/MAC layers and Call Processing concepts Exposure to programming in C, Perl, Shell Scripting is a plus Apolis2024

Introduction ASML is one of the world's leading manufacturers of lithography systems that help enable Moore's Law and the creation of increasingly powerful and capable electronic devices. Our San Diego-based light source division, Cymer, is renowned for developing both deep ultraviolet (DUV) lithography light sources and next generation extreme ultraviolet (EUV) light sources. As the world's leading semiconductor equipment manufacturer, ASML enables chipmakers to produce cheaper, speedier chips - and to produce them faster - thereby enabling all the technology you use today. The systems we produce integrate several large and sophisticated machines, themselves each a feat of engineering innovation, precision, and speed. We are a multinational company with over 70 locations in 16 countries, headquartered in Veldhoven, the Netherlands. We have 18 office locations around the United States including main offices in Wilton, CT, Chandler, AZ, San Jose, CA and San Diego, CA (DUV laser and EUV light source creation). We are currently recruiting for internships located at our office in San Diego, CA. In the Cymer Light Source (CLS) division in San Diego, we design and manufacture Deep Ultraviolet (DUV) lasers, used directly in the chipmaking process. Far from a basic “consumer” laser, these machines are complex, powerful, and flexible. The lasers we make require: durable and high-speed precise motion-controlled optics to maintain wavelength to femtometer accuracy under high laser powers; advanced materials to endure the harsh Fluorine-rich environments and high powers; clever mechanical designs to allow high performance and fit all the parts within a confined space, but still allow easy manufacturing and servicing; very fast high power electronics and electrical designs to deliver short high voltage pulses at precise timing to control pulse energy within hundredths of a percent; gas flows at hurricane speeds to keep the laser discharge area clear; cutting edge controllers and algorithms to deliver stable and consistent performance and automate all operations; and advanced real-time electronics, firmware and software to control the laser and interact with other equipment. The laser needs to minimize use of expensive or rare resources like energy or Neon gas. It needs to actively control temperatures, pressures, gas concentrations, timing and voltages precisely to maintain good performance. It must react instantly to changing customer demands and environmental conditions. And it needs to do all of this, operating continuously and reliably for months while producing billions of perfect light pulses, without any human intervention or downtime. If you have a passion for technology and innovation you'll want to check us out. Be a part of Cymer / ASML. Be a part of progress. One Company, One Goal, Limitless Innovation. It's our people that make the difference. Job Mission We are looking for a talented engineering student with a strong and diverse background in electrical engineering to join our DUV EE controls team during the summer. This position will be a key contributor the characterization and testing of critical components and assemblies used in our DUV lasers. Your Assignment Develops test plans and fixtures for testing and characterization of the high voltage ceramic capacitors and related assemblies. Conducts performance and reliability characterization and testing over mechanical, environmental, and aging variables experienced by Cymer laser systems. Utilizes precision high voltage and current diagnostics and data acquisition equipment during performance testing and accelerated life testing Develops and implements programmable automated test scripts and data acquisition while using engineering and statistical analysis tools for data processing and analysis. Manage and monitor accelerated life testing shot accumulation, test conditions, and key performance indicators. Collaborates with pulsed power and laser discharge chamber teams on test planning, test execution, and data analysis. Collaborates with internal and external analytical services to provide optical, x-ray, and SEM analysis of sample components. Other responsibilities may be added as business conditions arise Your Profile Requires a minimum of three years progress toward Bachelor's Degree in Electrical or related field. Master's in progress candidate is strongly preferred. Experience At least 3 years of relevant academic or work related experience. Project leadership skills Experience with DoE (design of experiments) Strong background in analog circuit design; high power and voltage experience recommended Familiar with analog test equipment, LabVIEW, Python, and MatLab. Hands on experience with component-level and assembly hardware troubleshooting Experience with electronics test equipment - high-speed oscilloscopes, high speed voltage and current diagnostics, and high-speed data acquisition and process. Experience creating and executing detailed performance and life testing plans. Other information PHYSICAL DEMANDS AND WORK ENVIRONMENT The physical demands described here are representative of those that must be met by an employee to successfully perform the essential functions of this job. Reasonable accommodations may be made to enable individuals with disabilities to perform the essential functions. While performing the duties of this job, the employee routinely is required to sit; walk; talk; hear; use hands to keyboard, finger, handle, and feel; stoop, kneel, crouch, twist, reach, and stretch. The employee is occasionally required to move around the campus. The employee may occasionally lift and/or move up to 50 pounds. Specific vision abilities required by this job include close vision, color vision, peripheral vision, depth perception, and ability to adjust focus. Can work under deadlines. The environment generally is moderate in temperature and noise level. Must be able to read and interpret data, information, and documents. Can observe and respond to people and situations and interact with others encountered in the course of work. Can learn and apply new information or skills. Work may include onsite technical support involving heavy lifting of equipment & modules. Position will require technical work activity in a clean-room production environment and/or laboratory setting. The environment generally is moderate in temperature and noise level. Occasionally may be exposed to loud noise bursts and may be exposed to toxic gases (fluorine). Must be able to work in small, confined spaces. The current base annual salary range for this role is currently $18.00 - $57.00. Pay scales are determined by role, level, location and alignment with market data. Individual pay is determined through interviews and an assessment of several factors that that are unique to each candidate, including but not limited to job-related skills, relevant education and experience, certifications, abilities of the candidate and pay relative to other team members. Our recruiters can share more information about our bonus program, benefits and equity during the hiring process. We are committed to leveraging the diverse backgrounds, perspectives, and experiences of our workforce to create opportunities for our people and the business. EOE This position requires access to controlled technology, as defined in the United States Export Administration Regulations (15 C.F.R. § 730, et seq.). Qualified candidates must be legally authorized to access such controlled technology prior to beginning work. Business demands may require ASML to proceed with candidates who are immediately eligible to access controlled technology. Inclusion and diversity ASML is an Equal Opportunity Employer that values and respects the importance of a diverse and inclusive workforce. It is the policy of the company to recruit, hire, train and promote persons in all job titles without regard to race, color, religion, sex, age, national origin, veteran status, disability, sexual orientation, or gender identity. We recognize that inclusion and diversity is a driving force in the success of our company. Need to know more about applying for a job at ASML? Read our frequently asked questions. Request an Accommodation ASML provides reasonable accommodations to applicants for ASML employment and ASML employees with disabilities. An accommodation is a change in work rules, facilities, or conditions which enable an individual with a disability to apply for a job, perform the essential functions of a job, and/or enjoy equal access to the benefits and privileges of employment. If you are in need of an accommodation to complete an application, participate in an interview, or otherwise participate in the employee pre-selection process, please send an email to USHR_Accommodation@asml.com to initiate the company's reasonable accommodation process. Please note: This email address is solely intended to provide a method for applicants to initiate ASML's process to request accommodation(s). Any recruitment questions should be directed to the designated Talent Acquisition member for the position.

Associate Electrical Engineer - San Diego San Diego - Hybrid - At least 2 days in office a week. Must be a US Citizen or Green Card holder. This role could be based in client's Los Angeles, San Diego, San Francisco, or Seattle Office. Also, the candidate must have done electrical engineering work in the state of CA. Job Summary As an Associate Electrical Engineer, you will have the opportunity to apply your technical knowledge of building services systems across a portfolio of ground-breaking projects in the US and globally. Strong communication skills and teamwork are essential to life and in turn, we can offer you unrivalled career, project, and development opportunities. What would you be doing? As a key part of the team, your responsibilities will be varied, but likely to include: Work closely with clients, architects and other company Engineers and/or design team members as part of a dedicated and skilled team Produce coordinated detailed design drawings, electronic models, specifications, written reports, site observation reports, schedules etc. on a variety of projects within the electrical discipline, as well as the coordination with utility companies and obtaining the necessary electrical permit approvals from Plan Check Organize technical and financial proposals for new work Manage workload of Project Discipline Engineers and Technicians (including verification of quality). Take responsibility for concept and preliminary engineering solutions for detail design Prepare Technical Specifications Monitor financial performance of jobs Keep senior staff informed of important and relevant service/design decisions and the objectives of the client are achieved Mentor junior Electrical Engineers Continually ensure practices, policies, strategy and services represent the clients best interests and that company policy is in keeping with current legislation and the relevant building codes for the relevant state etc Plan, organize and manage personal workload in order to meet deadlines in line with client commitments Proactively raise concerns regarding workload and ability to meet deadlines Maintain an overview of the project teams workload and commitments in order to successfully meet deadlines and balance resource utilization Actively contribute towards delivering profitable projects in the context of project finances Monitor financial performance of jobs, with the setting up and managing of job/project administrative systems, including planning and monitoring job resourcing/expenditure (adjusting these as necessary). What are we looking for? 8+ years experience of electrical engineering design in the building services and construction industry Experience working on projects in the following sectors is preferred: Higher Education, Museums, Commercial, Transportation Hubs and/or Stadiums Relevant bachelor or masters degree Professional Engineer (P.E.) desirable LEED AP accredited preferred Experience using Revit Familiarity using computational analysis tools such as electrical fault analysis and lighting design software Ability to accept a high degree of responsibility in a team-based organization, combined with ability to work independently Excellent technical knowledge of electrical systems; ability to investigate, identify and provide solutions to technical problems Excellent client-facing and communication skills (verbal and written), with experience presenting (you will often be required to present solutions directly to 'c-suite' level stakeholders) Experience in the preparation of technical reports for delivery direct to a client audience Ability to problem solve and propose multiple solutions to Clients and objectively summarize the benefits and shortfalls of each Required Knowledge, Skills, and Abilities: (Hiring Companies ATS Questions): 1. Do you have 8+ years experience of electrical engineering design in the building services and construction industry i.e. commercial, museums, higher education buildings, airports (larger scale projects, residential wouldnt be relevant) 2. Do you have competency in using design software such as Revit and familiarity with computational analysis tools for electrical fault analysis and lighting design. 3. Do you have capability to lead projects and mentor junior engineers within the team, fostering their growth and development. 4. Do you have Professional Engineer (P.E.) Certification: Possession of a Professional Engineer (P.E.) certification to enhance credibility and expertise in the field. - preferred 5. Do you have LEED AP Accreditation: Accreditation as a Leadership in Energy and Environmental Design (LEED) Accredited Professional demonstrates expertise in sustainable design practices. - preferred 6. Must be a US Citizen or Green Card holder.

The application window is expected to close on 2/30/2026. This is an onsite role and will work out of our Carlsbad, CA office location. Meet the Team: The system hardware team in Cisco Client Optical Group is seeking a Senior PCB and Signal/Power Integrity Engineer for the design and analysis of high-speed PCB/substrate and power distribution networks. As a member of the hardware design team, you will help develop the next generations of Cisco optical module products, participating in the definition and design of current and next-generation ASICs, packages, PCBs and PCBAs. You will be working in a team of electrical and mechanical engineers, collaborating closely with system architects, ASIC engineers, package engineers, layout engineer and other SI/PI engineers in the creation of next-generation optical modules. Your Impact: High-speed link modeling and simulation, including high-speed I/O, IC package, chip-on-chip-on-substrate design and system interconnections. Modeling and analyzing power delivery networks. Electromagnetic modeling of complex 3-dimensional structures. Work with layout engineer on PCB placement and routing for best SI and PI performance. Perform pre- and post-route signal integrity analysis of both PCB and ASIC package designs and correct the issues on the layout. Write signal integrity design guidelines, PCB test plans, and test reports. Decide appropriate PCB material, stack-up, and work with vendors to address any DFM (Design for Manufacturability) issues. Support prototype function bring-up, validation, and troubleshooting. Work closely with other hardware team members including HW design, CAD, Mechanical, Power, EMC, and Diagnostics to deliver first-class products. Drive the definition, implementation, and continuous improvement of advanced SI/PI methodologies, simulation flows, and design processes. Lead comprehensive SI/PI/PCB design reviews, providing expert guidance and ensuring adherence to stringent performance and reliability targets. Minimum Qualifications: 5+ years of related experience with a Bachelor's Degree in EE, or 3+ years of experience with a Master's Degree. Experience applying EE fundamentals, EM theory, and coupling mechanisms in circuit or system design, analysis, troubleshooting through projects, coursework, or work experience. Demonstrated experience with simulation or analysis of transmission lines, channel modeling, and signal/power integrity via academic or professional projects. High-speed PCB design experience from concept to release. Practical experience configuring and interpreting measurements from VNA, TDR, and oscilloscopes, demonstrated in lab, research, or engineering roles. Preferred Qualifications: Working knowledge of tools such as: HFSS, Cadence Clarity 3Dlayout and workbench, Cadence PowerSI/PowerDC, Allegro PCB Editor, and Allegro Package Designer. Self-motivation, collaboration, strong communication, and a desire to innovate are important. Working experience with high-speed NRZ and PAM4 SerDes, as well as high-speed PCB/package development and PI analysis. Masters or PhD in Electrical Engineering Knowledge of optical transceiver module types, form factors, and requirements. Why Cisco? At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. Message to applicants applying to work in the U.S. and/or Canada:The starting salary range posted for this position is $122,000.00 to $172,100.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits. Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process. U.S. employees are offered benefits, subject to Cisco's plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time. U.S. employees are eligible for paid time away as described below, subject to Cisco's policies: 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees 1 paid day off for employee's birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees Exempt employees participate in Cisco's flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations) 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next Additional paid time away may be requested to deal with critical or emergency issues for family members Optional 10 paid days per full calendar year to volunteer For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco's policies. Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows: .75% of incentive target for each 1% of revenue attainment up to 50% of quota; 1.5% of incentive target for each 1% of attainment between 50% and 75%; 1% of incentive target for each 1% of attainment between 75% and 100%; and Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation. For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid. The applicable full salary ranges for this position, by specific state, are listed below: New York City Metro Area: $135,800.00 - $222,400.00 Non-Metro New York state & Washington state: $122,000.00 - $197,900.00 * For quota-based sales roles on Cisco's sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined. ** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.

As an Associate Electrical Engineer, you will have the opportunity to apply your technical knowledge of building services systems across a portfolio of ground-breaking projects in the US and globally. Strong communication skills and teamwork are essential to life and in turn, we can offer you unrivalled career, project, and development opportunities. What would you be doing? As a key part of the team, your responsibilities will be varied, but likely to include: Work closely with clients, architects and other Engineers and/or design team members as part of a dedicated and skilled team Produce coordinated detailed design drawings, electronic models, specifications, written reports, site observation reports, schedules etc. on a variety of projects within the electrical discipline, as well as the coordination with utility companies and obtaining the necessary electrical permit approvals from Plan Check Organize technical and financial proposals for new work Manage workload of Project Discipline Engineers and Technicians (including verification of quality). Take responsibility for concept and preliminary engineering solutions for detail design Prepare Technical Specifications Monitor financial performance of jobs Keep senior staff informed of important and relevant service/design decisions and the objectives of the client are achieved Mentor junior Electrical Engineers Continually ensure practices, policies, strategy and services represent the clients best interests and that our policy is in keeping with current legislation and the relevant building codes for the relevant state etc Plan, organize and manage personal workload in order to meet deadlines in line with client commitments Proactively raise concerns regarding workload and ability to meet deadlines Maintain an overview of the project teams workload and commitments in order to successfully meet deadlines and balance resource utilization Actively contribute towards delivering profitable projects in the context of project finances Monitor financial performance of jobs, with the setting up and managing of job/project administrative systems, including planning and monitoring job resourcing/expenditure (adjusting these as necessary). What are we looking for? 8+ years experience of electrical engineering design in the building services and construction industry Experience working on projects in the following sectors is preferred: Higher Education, Museums, Commercial, Transportation Hubs and/or Stadiums Relevant bachelor or masters degree Professional Engineer (P.E.) desirable LEED AP accredited preferred Experience using Revit Familiarity using computational analysis tools such as electrical fault analysis and lighting design software Ability to accept a high degree of responsibility in a team-based organization, combined with ability to work independently Excellent technical knowledge of electrical systems; ability to investigate, identify and provide solutions to technical problems Excellent client-facing and communication skills (verbal and written), with experience presenting (you will often be required to present solutions directly to 'c-suite' level stakeholders) Experience in the preparation of technical reports for delivery direct to a client audience Ability to problem solve and propose multiple solutions to Clients and objectively summarize the benefits and shortfalls of each In return Solve some of the most interesting challenges on world-class projects in collaboration with top architects Work within a truly multidisciplinary environment, capitalizing on our extensive knowledge base in CFD, building physics, micro-climate analysis, climate change mitigation and energy master planning to inform truly environmentally responsive MEP designs Advance your career within a forward-thinking, global community of engineering professionals Have a positive impact on the environment through your work locally, nationally, and internationally Must have: 8+ years experience of electrical engineering design in the building services and construction industry i.e. Higher Education commercial, museums, higher education buildings, airports (larger scale projects, residential wouldnt be relevant) Must have done electrical engineering work in the state of CA. Competency in using design software such as Revit and familiarity with computational analysis tools for electrical fault analysis and lighting design. Capability to lead projects and mentor junior engineers within the team, fostering their growth and development. Nice to have: Professional Engineer (P.E.) Certification: Possession of a Professional Engineer (P.E.) certification to enhance credibility and expertise in the field. LEED AP Accreditation: Accreditation as a Leadership in Energy and Environmental Design (LEED) Accredited Professional demonstrates expertise in sustainable design practices.

Who We Are: We are driven by a passion to design and manufacture the highest quality grid-scale power converters available. Rooted in this passion, we provide our customers with inverters and DC/DC converters from 250 kW to 6 MW. EPC's products are designed in house and manufactured in the USA. Power electronics are the core technology behind decarbonization. With major growth sectors such as renewable energy, energy storage, and electric vehicle charging, EPC is growing fast. What We Do: EPC is located in the center of a high-tech commercial park in Poway, CA to meet the demands of its rapidly growing customer base. We are focused on developing and manufacturing robust and reliable power conversion solutions to solve real-world customer problems, and doing it in a smaller, more powerful footprint than anything else available today. We enjoy what we do, and we encourage a creative, healthy, and highly collaborative environment. Our goal is to work together as a fun, creative, and professional team; learning from and encouraging one-another as we push the state of the art forward in power electronics. The Role: EPC Power is looking to add an electrical engineer to our engineering team. In this role you will work closely with manufacturing and be developing a transition to automation on the manufacturing floor, database generation/management, manufacturing test development, and inverter and component testing. After training and becoming familiar with EPC products, you will be an integral part of the engineering test team. You will have opportunities to contribute to new product development, customer requests, engineering testing, engineering/manufacturing automation and troubleshooting. Responsibilities: Leading a transition to a fully automated production test process Creating effective database for all production test results Generating automated test reports containing relevant test results Working to create a comprehensive power test application that will report relevant test data & calibration of voltage/currents of power inverters Perform engineering testing of damaged production products resulting in root cause analysis Work with a team of engineers to improve production test procedures to create a robust test process Support repair of maintenance of test equipment as needed Requirements: B.Sc. or M.Sc. in Electrical Engineering 2 years of experience using NI LabVIEW software Experience using lab equipment - oscilloscopes, DMM, function generators, power supplies, DAQ PCB troubleshooting experience AutoCAD Electrical experience 1-2 years experience in an engineering role Hands on experience testing electrical systems Experience creating and analyzing database results Preferred: Internship experience Previous experience working in a lab environment Experience creating scripts via Python Interest in working with power electronics Experience with electrical wiring diagrams/circuits Familiarity with NI TestStand Benefits: 401(k) matching Dental and vision insurance Disability insurance Employee assistance program Flexible spending account Health insurance Life insurance Paid time off Tuition reimbursement COVID-19 considerations: In order to ensure the safest environment possible for all team members during the COVID-19 pandemic, team members are provided hand sanitizer, gloves, face masks, alternative work schedules and whenever possible isolated work areas EPC Power is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.

Job Description: Associate Electrical Engineer San Diego or San Fransico or Los Angeles, CA - Hybrid. Skills: Electrical Engineering Expertise, Building Services and Construction Industry Experience, Professional Engineer (P.E.) Desirable, Revit. Experience level: Associate Experience required: 8 Years Education level: Bachelors degree Job function: Engineering Industry: Construction Total position: 1 Relocation assistance: Yes Visa sponsorship eligibility: No Note: This role could be based in client's Los Angeles, San Diego, San Francisco, or Seattle Office. Also, the candidate must have done electrical engineering work in the state of CA. Job Summary What would you be doing? As a key part of the team, your responsibilities will be varied, but likely to include: Work closely with clients, architects and clients other Engineers and/or design team members as part of a dedicated and skilled team Produce coordinated detailed design drawings, electronic models, specifications, written reports, site observation reports, schedules etc. on a variety of projects within the electrical discipline, as well as the coordination with utility companies and obtaining the necessary electrical permit approvals from Plan Check Organize technical and financial proposals for new work Manage workload of Project Discipline Engineers and Technicians (including verification of quality). Take responsibility for concept and preliminary engineering solutions for detail design Prepare Technical Specifications Monitor financial performance of jobs Keep senior staff informed of important and relevant service/design decisions and the objectives of the client are achieved Mentor junior Electrical Engineers Continually ensure practices, policies, strategy and services represent the clients best interests and that Client's policy is in keeping with current legislation and the relevant building codes for the relevant state etc Plan, organize and manage personal workload in order to meet deadlines in line with client commitments Proactively raise concerns regarding workload and ability to meet deadlines Maintain an overview of the project teams workload and commitments in order to successfully meet deadlines and balance resource utilization Actively contribute towards delivering profitable projects in the context of project finances Monitor financial performance of jobs, with the setting up and managing of job/project administrative systems, including planning and monitoring job resourcing/expenditure (adjusting these as necessary). What are we looking for? 8+ years experience of electrical engineering design in the building services and construction industry Experience working on projects in the following sectors is preferred: Higher Education, Museums, Commercial, Transportation Hubs and/or Stadiums Relevant bachelor or masters degree Professional Engineer (P.E.) desirable LEED AP accredited preferred Experience using Revit Familiarity using computational analysis tools such as electrical fault analysis and lighting design software Ability to accept a high degree of responsibility in a team-based organization, combined with ability to work independently Excellent technical knowledge of electrical systems; ability to investigate, identify and provide solutions to technical problems Excellent client-facing and communication skills (verbal and written), with experience presenting (you will often be required to present solutions directly to 'c-suite' level stakeholders) Experience in the preparation of technical reports for delivery direct to a client audience Ability to problem solve and propose multiple solutions to Clients and objectively summarize the benefits and shortfalls of each In return Solve some of the most interesting challenges on world-class projects in collaboration with top architects Work within a truly multidisciplinary environment, capitalizing on Clients extensive knowledge base in CFD, building physics, micro-climate analysis, climate change mitigation and energy master planning to inform truly environmentally responsive MEP designs Advance your career within a forward-thinking, global community of engineering professionals Have a positive impact on the environment through your work locally, nationally, and internationally What we offer: Generous benefits package Annual discretionary bonus Generous PTO (4-5 weeks depending on position) in addition to 10 paid holidays 401k with company match Hybrid working & summer hours Reimbursement for certain professional licenses and associated renewals and exam fees Global network of experts Learning and development opportunities Be a part of our Young Employees Forum and our Diversity and Inclusion Forum Required Skills: Relocation Financial Performance Eligibility Project Teams Renewals Analysis Mitigation Higher Education Lighting Legislation Balance Revit Codes Architects Approvals Communication Skills Physics Electrical Engineering Energy Transportation Specifications Strategy Construction Education Preparation Software Planning Design Engineering Communication

We're looking for people who put their innovation to work to advance our success - and their own. Join an organization that ensures a more secure world through connecting and protecting our customers with inventive electrical solutions. * Design and implementation of hardware for embedded electronic systems, from requirements to production and market launch; * Close collaboration with the global software team to set up and test embedded Linux (bootloader, kernel, drivers) on the hardware; * Development, testing, and troubleshooting of hardware components; * Integrating and validating new hardware designs; * Evaluating third-party hardware solutions and open-source projects; * Designing and developing printed circuit boards (PCBs) and other electronic components; * Providing technical support after production; * Collaborating with other engineers and developers to design and develop hardware and software interfaces; * Creation and maintenance of hardware design specifications; * Monitoring, testing, and troubleshooting electronic systems; * Ensuring technological developments in the field of electronics engineering and integrating them into future projects; YOU HAVE: * Bachelor's degree in electronics, electrical engineering, or a comparable field; * Several years of professional experience in the development of electronic hardware; * Very good knowledge of the design and development of printed circuit boards (PCBs) with ECAD software such as Altium or Mentor Graphics/PADS; * In-depth knowledge of embedded Linux, system configuration, and scripting; * Experience in the development and implementation of embedded firmware for microcontrollers (MCU) with C/C++; * Knowledge of communication protocols such as Ethernet, Modbus, CAN, or wireless technologies; * Familiarity with software tools such as repository management (Git/Subversion), Jira, and static analysis tools; * Experience working with an engineering team using agile methods; * Excellent interpersonal and communication skills; * High level of commitment and flexibility in a challenging, dynamic work environment; * Very good written and spoken German and good written and spoken English WE HAVE: * A dynamic global reach with diverse operations around the world that will stretch your abilities, provide plentiful career opportunities, and allow you to make an impact every day * nVent is a leading global provider of electrical connection and protection solutions. We believe our inventive electrical solutions enable safer systems and ensure a more secure world. We design, manufacture, market, install and service high performance products and solutions that connect and protect some of the world's most sensitive equipment, buildings and critical processes. We offer a comprehensive range of systems protection and electrical connections solutions across industry-leading brands that are recognized globally for quality, reliability and innovation. * Our principal office is in London and our management office in the United States is in Minneapolis. Our robust portfolio of leading electrical product brands dates back more than 100 years and includes nVent CADDY, ERICO, HOFFMAN, ILSCO, SCHROFF and TRACHTE. Learn more at ************** * Commitment to strengthen communities where our employees live and work * We encourage and support the philanthropic activities of our employees worldwide * Through our nVent in Action matching program, we provide funds to nonprofit and educational organizations where our employees volunteer or donate money * Core values that shape our culture and drive us to deliver the best for our employees and our customers. We're known for being: * Innovative & adaptable * Dedicated to absolute integrity * Focused on the customer first * Respectful and team oriented * Optimistic and energizing * Accountable for performance * Benefits to support the lives of our employees At nVent, we connect and protect our customers with inventive electrical solutions. People are our most valuable asset. Inclusion and diversity means that we celebrate and encourage each other's authenticity because we understand that uniqueness sparks growth. #LI-PC1 #LI-Hybrid

GROW WITH US AND STAY EXTRAORDINARY: Launch your career to new heights with Innoflight-one of San Diego's fastest-growing Aerospace and Defense innovators. Here, visionary minds engineer the future of space technology through pioneering, compact, and cyber-secure solutions. From software-defined radios to cutting-edge cryptographic systems and avionics, everything we build powers the next era of New Space. Join our small, agile, and mission-driven team where your work has real impact and your growth has no limits. We're not just reaching for the stars-we're engineering them. Let's innovate the infinite, together. A DAY IN THE LIFE: As a Hardware Engineer II, you'll design and develop analog, power, and embedded systems for next-gen spacecraft. You'll work across multiple projects, collaborating with cross-functional teams to deliver high-performance space hardware from concept to launch-guiding PCB layouts, solving complex challenges, and ensuring signal integrity throughout the design process. You'll also be deeply involved in performance testing, sustainment support, and the continuous enhancement of mission-critical electronic systems. WHAT YOU'LL DO Design and Develop Hardware Systems: Lead the design, testing, and debugging of analog, power, and embedded board-level electronic systems with high-speed digital interfaces such as Rocket I/O, Ethernet, PCI-e, DDR, RS-422, and LVDS. Provide PCB Design Support: Guide internal and external layout teams with stack-up configuration, signal/power integrity requirements, and high-speed routing constraints. Collaborate Across Disciplines: Work closely with software, firmware (HDL), mechanical, and systems engineers to ensure full subsystem integration; contribute to peer design reviews and mentor junior engineers. Create and Review Documentation: Develop and review detailed specifications, Interface Control Documents (ICDs), test procedures, and user manuals for new and existing hardware. Conduct Signal and Power Integrity Analysis: Simulate circuitry in SPICE and perform advanced signal and power integrity analysis to ensure robust performance in radiation- and EMI-sensitive environments. Support Manufacturing and Test: Provide hands-on support for hardware troubleshooting, integration, test automation (e.g., Python, PowerShell), and manufacturing processes throughout the product lifecycle. YOU'RE AWESOME AT: Embedded Hardware Design: You're a schematic design pro, with deep experience in development and debugging of board-level systems. High-Speed Interface Design: You know how to design, simulate, and troubleshoot high-speed digital interfaces, applying best practices in signal integrity. PCB Layout Guidance: You provide clear direction on layout strategies, interface specs, and stack-up configurations to maximize performance. WHAT YOU'LL NEED: Bachelor's degree in Electrical Engineering or a related discipline. 3 or more years of experience designing and developing embedded and board-level electronic hardware. Proficient in high-speed digital and analog circuit design, including PCI-e, DDR, LVDS, and switching power supplies. Hands-on experience with microprocessor-based systems, FPGAs, digital logic, memory architectures, and power electronics. Skilled in schematic capture and PCB design tools (e.g., Altium, OrCAD, HyperLynx) and knowledgeable in signal/power integrity and simulation. Strong collaborator with cross-functional teams; experience with EMI/EMC compliance, radiation testing, and scripting in Python or PowerShell. Ability to obtain a U.S. security clearance. COMPENSATION & BENEFITS: The starting base salary for this position ranges from $100,000 to $120,000 per year, depending on the candidate's job-related knowledge, skills, and experience. In addition to a competitive base salary, Innoflight offers a well-rounded compensation package that includes a Profit-Sharing Bonus and a Cash Performance Bonus to reward both individual and company performance. Additional benefits include: 401(k) with 3% company match (automatic enrollment) Comprehensive medical, dental, vision, HSA & life insurance 10 paid holidays + 120 hours PTO (starting in year one) Access to ancillary benefits such as critical illness, accident, disability, legal and pet insurance. WHY YOU'LL LOVE WORKING HERE: Flexible Work-Life Balance: Enjoy a 9/80 work schedule with every other Friday off-whether you use it to recharge, work on a passion project, or spend time with family, the choice is yours. Continuous Learning & Development: We're serious about professional development. From tuition reimbursement to internal "Ask Me Anything" sessions and weekly “Lunch & Learns,” we make learning a core part of the job. Mission-Driven Culture: We aren't just building tech-we're enabling the next era of space exploration. Our Culture Ambassadors help lead initiatives around inclusion, positivity, recognition, and transparency. Here, your voice is heard, your work is respected, and your individuality is celebrated. BE YOU, WITH US: At Innoflight, we are committed to fostering an inclusive and equitable workplace where everyone belongs. We recognize that great talent comes in many forms, and you don't need to meet every requirement to bring value to our team. If this role excites you, we encourage you to apply-even if you don't check every box. YOU SHOULD KNOW: Potential new employees must successfully complete a background check which includes criminal search, education certification and employment verification prior to hire. Applicants must be authorized to work for any employer in the U.S as you must have the ability to obtain a security clearance. We are unable to sponsor or take over sponsorship of an employment Visa. A NOTE TO STAFFING AGENCIES: Innoflight does not accept unsolicited resumes from agencies, recruiters, or any third-party sources. Any such submissions will be considered property of Innoflight, and no fees will be paid in the event a candidate is hired from an unsolicited referral. To California residents applying for this job, please read Innoflight's CCPA Notice: ********************************************************************************************* #LI-Onsite

We are seeking a highly skilled RF, Analog, and Mixed Signal Engineer to join our engineering team. The ideal candidate will possess strong analytical abilities, a passion for innovation, and extensive experience in designing and implementing RF/mmW and/or analog/mixed-signal circuits. Description Our team is responsible for all aspects of silicon development for cellular transceivers, with a particular emphasis on highly integrated and efficient designs and technologies that transform the user experience at the product level. This highly visible role puts you at the center of a silicon design group with a critical impact on getting functional products to hundreds of millions of customers quickly! Responsibilities As an RF IC design engineer, you will be responsible for providing RF solutions for cellular transceiver chips. Responsibilities include: Working with platform architects, system, and digital design groups to define the requirements for RF and baseband blocks based on the system requirements. Collaborating with the technology team on process selection for the target device. Driving transistor-level feasibility studies of RF/mixed-signal circuit blocks and architectures. Designing various component blocks inside the RF transceiver, including LNA, upconverters/downconverters, baseband filters, VGAs, LO/PLL circuits, driver amplifiers/power amplifiers, linear RF switches, attenuators, low noise regulators, amplifiers, and biasing circuits. Working closely with the mask design team to implement layout views of designs. Minimum Qualifications BS and 3+ years of relevant industry experience required. Preferred Qualifications Direct experience designing and bringing into mass production highly integrated cellular RF transceivers in deep sub-micron RF CMOS technology. Ability to innovate and implement novel solutions for sophisticated engineering problems. Ability to collaborate with multi-functional teams to define system architecture and requirements. Familiarity with various RF transceiver architectures and their trade-offs; capability to collaborate with the digital design group for an optimum partition between the digital and analog domains. Deep understanding of RF CMOS implementation fundamentals and basic building blocks, including LNAs, mixers, VCOs and DCOs, PLLs, LO, and PAs. Design experience with digital TX or analog/digital/sampling PLL circuits is a bonus. Solid understanding of bandgaps, bias, opamps, LDOs, feedback, and compensation techniques. RF device modeling experience, including device noise parameters and inductor modeling. Insights into packaging effects, supply isolations, high-frequency ESD structures, and circuit layout for optimum RF performance. Very good knowledge of one or more of the following tools: Cadence/Virtuoso, Spectre, AMS, GoldenGate, AFS, ADS, EMX, layout parasitic extraction tools, SimVision, RelExpert. Bring-up and debugging skills, and experience in working with production test engineers to build test plans and design for testability. Ability to stay up to date with industry trends and new technologies to drive continuous improvement. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $139,500 and $258,100, and your base pay will depend on your skills, qualifications, experience, and location. Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program. Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant. Apple accepts applications to this posting on an ongoing basis. #J-18808-Ljbffr

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: Applicants selected will be subject to a government security investigation and must meet eligibility requirements for access to classified information. ** Must be a U.S. citizen and eligible to receive a U.S. Government security clearance ** We are seeking a highly skilled and motivated Physical Design Engineer to join our team. The ideal candidate will have hands‑on experience in RTL‑to‑GDSII flow, with a strong focus on floor‑planning, clock tree synthesis, place‑and‑route, DRC and timing closure. This role involves architecting and implementing robust, low‑skew, power‑efficient clock distribution networks tailored for a complex design to meet performance, power, and area goals. This role requires full‑time onsite work in San Diego, CA (5 days per week). Minimum Qualifications: Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience. PhD in Science, Engineering, or related field. Key Responsibilities: Execute floorplanning, placement, clock tree synthesis (CTS), and routing using industry‑standard tools (e.g., Innovus, ICC2). Drive timing closure across multiple corners and modes using static timing analysis (STA) tools (e.g., PrimeTime). Collaborate with RTL designers to resolve timing, congestion, and DRC issues. Optimize design for power, performance, and area (PPA). Conduct formal equivalence checks between RTL and netlist. Support physical verification including DRC, LVS, and antenna checks. Work closely with backend teams for tapeout preparation and signoff. Excellent scripting skills (TCL, Python, Perl) for reference flow automation. Execute full‑chip and block‑level physical verification including DRC, LVS, ERC, antenna, and density checks using industry‑standard tools (e.g., Calibre, Pegasus, ICV). Customize and optimize reference physical verification flows to align with project needs and foundry requirements. Perform GDS‑to‑GDS comparisons to validate ECO changes, ensure layout integrity, and support tapeout readiness. Debug and resolve physical verification violations, working closely with layout, design, and CAD teams. Collaborate with foundries to ensure compliance with the latest design rule manuals (DRMs) and tapeout checklists. Support signoff verification, including multi‑corner/multi‑mode analysis and ECO validation. Develop and maintain automation scripts for verification flows, reporting, and regression testing. Interface with EDA vendors to resolve tool issues and improve flow robustness. Participate in design reviews, providing feedback on layout quality, rule compliance, and manufacturability. Ensure timely delivery of clean GDSII for tapeout, with full verification signoff. Perform full‑chip and block‑level static timing analysis (STA) using industry‑standard tools (e.g., Synopsys PrimeTime, Cadence Tempus). Develop, validate, and maintain timing constraints (SDC) for multiple modes and corners. Collaborate with RTL, synthesis, and physical design teams to ensure timing‑aware design practices. Debug and resolve setup, hold, and transition violations across various PVT corners. Drive timing closure through iterative optimization and ECO implementation. Customize and enhance timing analysis flows to improve accuracy, efficiency, and scalability. Analyze clock tree timing, including skew, latency, and jitter impacts. Support signoff timing verification, including cross‑domain timing and false/multicycle path handling. Interface with EDA vendors to resolve tool issues and improve flow robustness. Participate in design reviews, providing insights on timing risks and mitigation strategies. Define and implement low‑power architecture using CLP methodology across RTL and physical design stages. Develop and maintain power intent files (UPF/CPF) and ensure alignment with design specifications. Customize and optimize low‑power reference flows to meet project‑specific requirements. Collaborate with RTL, synthesis, and physical design teams to integrate power‑aware features such as power gating, retention, isolation, and level shifting. Perform power‑aware static checks, simulation, and formal verification to validate power intent. Debug and resolve issues related to power domain crossings, voltage islands, and power sequencing. Support signoff verification including power‑aware LVS/DRC, STA, and EM/IR analysis. Interface with EDA vendors to resolve tool issues and improve low‑power flow robustness. Participate in design reviews, providing insights on power architecture, risks, and mitigation strategies. Ensure compliance with foundry low‑power guidelines and contribute to successful tapeout. Qualifications: Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field. 3+ years of experience in physical design, with a focus on clock tree design and implementation. Strong understanding of digital timing concepts, clock domain crossing, and synchronous/asynchronous design. Proficiency with EDA tools for CTS, STA, and physical verification (e.g., ICC2, Innovus, PrimeTime). Experience with advanced nodes (e.g., 7nm, 5nm, 3nm) and FinFET technologies. Solid scripting skills (TCL, Python, Perl) for flow automation and data analysis. Familiarity with low‑power design techniques, including clock gating and multi‑voltage domains. Preferred Skills: Experience with custom clock tree architectures such as H‑tree, mesh, or spine‑based topologies. Knowledge of EM/IR analysis, thermal‑aware clocking, and reliability modeling. Exposure to high‑speed interface clocking (e.g., SerDes, DDR, PCIe). Understanding of package‑level clock planning and signal integrity. Principal Duties & Responsibilities: Applies ASIC knowledge and experience to define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power products. Creates architectures, circuit specifications, logic designs, and/or system simulations based on system‑level requirements. Collaborates across teams (e.g., software architecture, hardware architecture) to develop and execute an implementation strategy that meets system requirements and customer needs. Evaluates all aspects of process flow from high‑level design to synthesis, place and route, timing and power use, and verification or similarly for custom circuit design/layout flow. Utilizes tools/applications (e.g., RTL to GDS Flow, Virtuoso) to execute and enable architecture and design of an individual block/SoC or IC Package. Writes detailed technical documentation for EDA/IP/ASIC projects. Level of Responsibility: Works independently with minimal supervision. Decision‑making may affect work beyond immediate work group. Requires verbal and written communication skills to convey information. May require basic negotiation, influence, tact, etc. Has a moderate amount of influence over key organizational decisions (e.g., is consulted by senior leadership to make key decisions). Tasks require multiple steps which can be performed in various orders; some planning, problem‑solving, and prioritization must occur to complete the tasks effectively. To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification. Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. Pay range and Other Compensation & Benefits $115,600.00 - $173,400.00 The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales‑incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer - and you can review more details about our US benefits at this link. If you would like more information about this role, please contact Qualcomm Careers. #J-18808-Ljbffr

A prominent engineering firm in San Diego is seeking a Principal in Electrical Engineering to lead strategic projects and develop client relationships. Responsibilities include managing engineering practices, driving business development, and overseeing project teams. Candidates should have extensive experience and a Bachelor's degree in engineering. This role offers competitive compensation and a collaborative work environment. #J-18808-Ljbffr

Job Description: Candidate will be responsible for testing physical/MAC layers, protocol layers, and data applications implemented on various company Modem products, handsets and data cards. Candidate will work directly with Engineers in performing daily testing tasks and reporting test results. Must be able to follow directions, perform consistent and thorough testing, and provide accurate test status and reports. The effort will involve multimode operations of handset devices, gaining knowledge in the following technology areas: CDMA2000, 1xEV-DO, WCDMAGSM/GPRS, LTE Training will be provided to allow the employee to perform their job function. The position will require travel in North America, 75% of the time and an opportunity to relocate to critical markets for longer durations. Some overtime work may be required. Successful candidate must have strong communication skills, must be an effective team player and be able to work independently Min Qualifications Exposure to commercial field test and data analysis tools for wireless telephony product verification Handset test experience with UMTS/CDMA operators or with commercial handset OEMs Experience using QC tools like QXDM, QCAT, CAIT, etc. is very useful. Exposure in one or more of following areas: oUnderstanding of digital communications systems, RF propagation, CDMA, OFDM, telecommunications concepts oUnderstanding of Physical/MAC layers and Call Processing concepts in one or more of the following air interface standards CDMA2000, 1xEV-DO (Rev 0/A/B), GSM/ GPRS /EDGE / Rel99/ Rel5 / HSDPA/ HSUPA/HSPA+, LTE oUnderstanding of wire line and wireless data protocol stacks including RLP, PPP, IP, TCP, IPV6, MIPV6, etc. Understanding of software development and testing concepts for wireless handsets for various air interface standards ,Familiarity with IP telephony network , SIP, IMS, and IP telephony standards Pref Qualifications: Familiarity with air interface performance analysis, characterization and optimization oExposure to programming in C, Perl, shell scripting is a plus Comments for Suppliers: 0-4yrs exp onsite critical - San Diego

Please note this posting is to advertise potential job opportunities. This exact role may not be open today but could open in the near future. When you apply, a Cisco representative may contact you directly if a relevant position opens. Applications are accepted until further notice. Please note this posting is to advertise potential job opportunities. This exact role may not be open today but could open in the near future. When you apply, a Cisco representative may contact you directly if a relevant position opens. Meet the Team Engineering: Open-minded, driven, diverse and deeply creative people at Cisco design the hardware that makes the internet work. Bring your knowledge of computers and networking and take it to a new level in any one of the following product categories including: cloud, social, mobile/wireless, video, VoIP, big data, collaboration, web, Internet of Things, routing, switching, IPv6, data center, HPC, Telepresence and many more. Your work will affect billions globally. Supply Chain Operations: Collaborate with peers on projects that have a real-world impact. From our processes to manufacturing, you'll deliver a standout customer experience of Cisco products and services. Take your innovative ideas from the drawing board to deliver powerful solutions. You'll collaborate with multi-functional teams to determine our infrastructural needs and product specifications. Your Impact You will change the product development from the lowest levels of circuit design to large system design and see your contribution all the way through to high volume manufacturing. Creative Hardware Engineering positions available in: * ASIC Design and Verification * System/Board Design * Circuit Board Layout * Hardware Automation, Validation and Test * Signal Integrity * Power Design Minimum Qualifications * Completion within the past 3 years, or current enrollment with expected completion within 12 months, of a Bachelor's degree program. Relevant fields include Electrical Engineering, Computer Engineering, Mechanical Engineering, a related program, or holders of equivalent academic certifications. * Familiarity with hardware description languages (e.g., Verilog, VHDL) and/or PCB design tools (e.g., Altium, Cadence, Mentor Graphics). * Foundational knowledge of embedded systems and microcontrollers. * Familiarity with scripting or programming languages (e.g., Python, MATLAB, C/C++) for automating test or data analysis tasks. * Able to legally live and work in the country for which you're applying, without visa support or sponsorship Preferred Qualifications * Experience with hardware prototyping (e.g., breadboards, FPGAs, Arduino, Raspberry Pi, or similar platforms). * Familiarity with signal and power integrity concepts and tools. * Exposure to hardware validation and debugging in a team or project setting. * Experience with simulation tools (e.g., SPICE, HyperLynx, HFSS) for circuit analysis or electromagnetic modeling. * Experience working in multi-functional teams (e.g., collaborating with software, manufacturing, or mechanical engineers). Why Cisco? At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. Message to applicants applying to work in the U.S. and/or Canada: Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process. U.S. employees are offered benefits, subject to Cisco's plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time. U.S. employees are eligible for paid time away as described below, subject to Cisco's policies: * 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees * 1 paid day off for employee's birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco * Non-exempt employees receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees * Exempt employees participate in Cisco's flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations) * 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next * Additional paid time away may be requested to deal with critical or emergency issues for family members * Optional 10 paid days per full calendar year to volunteer For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco's policies. Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows: * .75% of incentive target for each 1% of revenue attainment up to 50% of quota; * 1.5% of incentive target for each 1% of attainment between 50% and 75%; * 1% of incentive target for each 1% of attainment between 75% and 100%; and * Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation. For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid. The applicable full salary ranges for this position, by specific state, are listed below: New York City Metro Area: $94,200.00 - $137,500.00 Non-Metro New York state & Washington state: $84,000.00 - $122,200.00 * For quota-based sales roles on Cisco's sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined. Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.