The application window is expected to close on 1/30/2026. This is an onsite role and will require working out of our Carlsbad, CA office location. **Meet the Team** As a Photonic PackagingEngineer, you will play a key role in developing/supporting the next generation packaging platform for Cisco's Silicon Photonics Integrated Circuits and chipsets. You'll have the opportunity to work as a key member of the platform development team that is responsible for developing critical optical components, processes, and tools.
**Your Impact**
Design, Develop and Support
+ Provide engineering support for Cisco's internally developed photonic assembly packaging tools.
+ Gather and analyze data from Cisco's automated packaging tools/processes to shape new projects targeting improvement in novel subassemblies used in Cisco-designed high-volume manufacturing platforms.
+ Recommend and implement test/assembly/process improvements, including cycle time reduction and automation of system to minimize required operator time and intervention.
+ Design, build, and test prototypes of critical, complex electromechanical assemblies to be used in automated manufacturing/test tools.
Diagnostics Development & Lifecycle Management
+ Follow new tools, processes, and components from development to production to ensure successful integration of new platform technologies.
+ Apply analytics and AI/ML to stimulate edge cases, optimize strategies, improve coverage, usability, debug capabilities and problem detection using structured problem-solving methodologies.
Collaboration & Team Development
+ Partner with hardware, software, and manufacturing teams to ensure multi-functional alignment and successful transition to manufacturing.
+ Develop and execute project plans with predictability, quality and velocity.
+ Collaborate and travel to assure successful product deployment across a global environment
+ Mentor and develop high-performing teams, emphasizing continuous learning in diagnostics, data engineering, advanced analytics, and effective use of AI-assisted development tools.
**Minimum Qualifications**
+ Bachelors + 7 years of related experience, or Masters + 4 years of related experience, or PhD + 1 year of related experience
+ Hardware/process automation experience
**Preferred Qualifications**
+ Experience in hardware/software automation of photonics assembly/test.
+ Experience with machine vision in an automation environment.
+ Data analysis (SQL/JMP) in a semiconductor production environment
+ Software development using C# on .NET
+ Knowledge of photonics, fiber optics and semiconductor lasers
**Why Cisco?**
At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.
Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.
We are Cisco, and our power starts with you.
**Message to applicants applying to work in the U.S. and/or Canada:**
The starting salary range posted for this position is $134,300.00 to $195,400.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.
Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.
U.S. employees are offered benefits, subject to Cisco's plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.
U.S. employees are eligible for paid time away as described below, subject to Cisco's policies:
+ 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees
+ 1 paid day off for employee's birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco
+ Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees
+ Exempt employees participate in Cisco's flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)
+ 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next
+ Additional paid time away may be requested to deal with critical or emergency issues for family members
+ Optional 10 paid days per full calendar year to volunteer
For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco's policies.
Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:
+ .75% of incentive target for each 1% of revenue attainment up to 50% of quota;
+ 1.5% of incentive target for each 1% of attainment between 50% and 75%;
+ 1% of incentive target for each 1% of attainment between 75% and 100%; and
+ Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.
For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.
The applicable full salary ranges for this position, by specific state, are listed below:
New York City Metro Area:
$152,400.00 - $255,100.00
Non-Metro New York state & Washington state:
$134,300.00 - $224,800.00
* For quota-based sales roles on Cisco's sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined.
** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.
Cisco is an Affirmative Action and Equal Opportunity Employer and all qualified applicants will receive consideration for employment without regard to race, color, religion, gender, sexual orientation, national origin, genetic information, age, disability, veteran status, or any other legally protected basis.
Cisco will consider for employment, on a case by case basis, qualified applicants with arrest and conviction records.
$152.4k-255.1k yearly 16d ago
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Photonic Packaging Engineer
Cisco Systems, Inc. 4.8
Carlsbad, CA jobs
The application window is expected to close on 1/30/2026. This is an onsite role and will require working out of our Carlsbad, CA office location. Meet the Team As a Photonic PackagingEngineer, you will play a key role in developing/supporting the next generation packaging platform for Cisco's Silicon Photonics Integrated Circuits and chipsets. You'll have the opportunity to work as a key member of the platform development team that is responsible for developing critical optical components, processes, and tools.
Your Impact
Design, Develop and Support
* Provide engineering support for Cisco's internally developed photonic assembly packaging tools.
* Gather and analyze data from Cisco's automated packaging tools/processes to shape new projects targeting improvement in novel subassemblies used in Cisco-designed high-volume manufacturing platforms.
* Recommend and implement test/assembly/process improvements, including cycle time reduction and automation of system to minimize required operator time and intervention.
* Design, build, and test prototypes of critical, complex electromechanical assemblies to be used in automated manufacturing/test tools.
Diagnostics Development & Lifecycle Management
* Follow new tools, processes, and components from development to production to ensure successful integration of new platform technologies.
* Apply analytics and AI/ML to stimulate edge cases, optimize strategies, improve coverage, usability, debug capabilities and problem detection using structured problem-solving methodologies.
Collaboration & Team Development
* Partner with hardware, software, and manufacturing teams to ensure multi-functional alignment and successful transition to manufacturing.
* Develop and execute project plans with predictability, quality and velocity.
* Collaborate and travel to assure successful product deployment across a global environment
* Mentor and develop high-performing teams, emphasizing continuous learning in diagnostics, data engineering, advanced analytics, and effective use of AI-assisted development tools.
Minimum Qualifications
* Bachelors + 7 years of related experience, or Masters + 4 years of related experience, or PhD + 1 year of related experience
* Hardware/process automation experience
Preferred Qualifications
* Experience in hardware/software automation of photonics assembly/test.
* Experience with machine vision in an automation environment.
* Data analysis (SQL/JMP) in a semiconductor production environment
* Software development using C# on .NET
* Knowledge of photonics, fiber optics and semiconductor lasers
Why Cisco?
At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.
Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.
We are Cisco, and our power starts with you.
Message to applicants applying to work in the U.S. and/or Canada:
The starting salary range posted for this position is $134,300.00 to $195,400.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.
Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.
U.S. employees are offered benefits, subject to Cisco's plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.
U.S. employees are eligible for paid time away as described below, subject to Cisco's policies:
* 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees
* 1 paid day off for employee's birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco
* Non-exempt employees receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees
* Exempt employees participate in Cisco's flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)
* 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next
* Additional paid time away may be requested to deal with critical or emergency issues for family members
* Optional 10 paid days per full calendar year to volunteer
For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco's policies.
Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:
* .75% of incentive target for each 1% of revenue attainment up to 50% of quota;
* 1.5% of incentive target for each 1% of attainment between 50% and 75%;
* 1% of incentive target for each 1% of attainment between 75% and 100%; and
* Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.
For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.
The applicable full salary ranges for this position, by specific state, are listed below:
New York City Metro Area:
$152,400.00 - $255,100.00
Non-Metro New York state & Washington state:
$134,300.00 - $224,800.00
* For quota-based sales roles on Cisco's sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined.
Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.
$152.4k-255.1k yearly 16d ago
Product Quality Engineer (Hybrid)
Cisco 4.8
San Jose, CA jobs
The application window is expected to close on 12/23/2025. Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. This is a hybrid role with three days per week in the Cisco San Jose office.
Meet The Team
Our team is part of Cisco's Supply chain operations. You would be joining Cisco's central quality team that handles the field and factory performance for core routing and data center switching products.
It's a diverse group comprising of quality and failure analysis engineers who engage closely with the design, factory, component supplier and customer engagement teams. You'd be working on some of the most ground breaking technology rollout in the networking industry associated with ASIC facilitating ASIC infrastructure, low power system design, innovative cooling and coordinated telemetry features. You'd also be establishing new processes in place that address a changing dynamic and quality expectation with web-scale customers.
Your Impact
Product Quality Engineer will own and drive New Product Introduction Quality, Factory Quality and Field Quality of Digital Products that include Hardware, Software and Cloud Service offerings from Cisco.
The work also includes factory yield performance management to meet six sigma quality goals, pursuing a quality plan to meet release requirements for new product introduction through gate reviews, serve as a subject-matter authority on Hardware Quality Metrics, perform actionable data analysis to detect subtle trends and identify root causes to drive continuous improvement activities and increase customer satisfaction.
* Gathering quality requirements and data for Cisco products.
* Providing recommendations for quality improvement and governance that will be used by several Cisco Business Units.
* Communicating proposals, strategies and status to Cisco Executives.
* Detailing business requirements and analyzing data to provide appropriate metrics and performance KPIs to business users.
* Coordinating the research, analysis and recommendations for technical approaches to solving customer issues related to quality, reliability and customer experience of Cisco offerings.
* Independently identify issues with product lines based on trending field return data.
* You will be speaking publicly to Sr executive members quarterly product quality performance.
Minimum Requirements For The Role
* Bachelor's Degree in Engineering.
* 8+ years of experience working on Electrical design, Failure analysis and hardware quality management on networking routers/switches.
* Solid understanding in performing root cause investigation, data analysis and communicating findings, closed loop corrective, preventative and risk mitigation actions to executives and business partners.
* 5+ years of experience in communicating with Sr executives, customer account teams.
Preferred Skills
* Masters in Electrical Engineering.
**Why Cisco?**
At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.
Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.
We are Cisco, and our power starts with you.
**Message to applicants applying to work in the U.S. and/or Canada:**
The starting salary range posted for this position is $159,800.00 to $202,300.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.
Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.
U.S. employees are offered benefits, subject to Cisco's plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.
U.S. employees are eligible for paid time away as described below, subject to Cisco's policies:
+ 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees
+ 1 paid day off for employee's birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco
+ Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees
+ Exempt employees participate in Cisco's flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)
+ 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next
+ Additional paid time away may be requested to deal with critical or emergency issues for family members
+ Optional 10 paid days per full calendar year to volunteer
For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco's policies.
Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:
+ .75% of incentive target for each 1% of revenue attainment up to 50% of quota;
+ 1.5% of incentive target for each 1% of attainment between 50% and 75%;
+ 1% of incentive target for each 1% of attainment between 75% and 100%; and
+ Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.
For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.
The applicable full salary ranges for this position, by specific state, are listed below:
New York City Metro Area:
$159,800.00 - $232,600.00
Non-Metro New York state & Washington state:
$141,700.00 - $206,400.00
* For quota-based sales roles on Cisco's sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined.
** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.
Cisco is an Affirmative Action and Equal Opportunity Employer and all qualified applicants will receive consideration for employment without regard to race, color, religion, gender, sexual orientation, national origin, genetic information, age, disability, veteran status, or any other legally protected basis.
Cisco will consider for employment, on a case by case basis, qualified applicants with arrest and conviction records.
$159.8k-232.6k yearly 49d ago
Product Quality Engineer (Hybrid)
Cisco Systems, Inc. 4.8
San Jose, CA jobs
The application window is expected to close on 12/23/2025. Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. This is a hybrid role with three days per week in the Cisco San Jose office.
Meet The Team
Our team is part of Cisco's Supply chain operations. You would be joining Cisco's central quality team that handles the field and factory performance for core routing and data center switching products.
It's a diverse group comprising of quality and failure analysis engineers who engage closely with the design, factory, component supplier and customer engagement teams. You'd be working on some of the most ground breaking technology rollout in the networking industry associated with ASIC facilitating ASIC infrastructure, low power system design, innovative cooling and coordinated telemetry features. You'd also be establishing new processes in place that address a changing dynamic and quality expectation with web-scale customers.
Your Impact
Product Quality Engineer will own and drive New Product Introduction Quality, Factory Quality and Field Quality of Digital Products that include Hardware, Software and Cloud Service offerings from Cisco.
The work also includes factory yield performance management to meet six sigma quality goals, pursuing a quality plan to meet release requirements for new product introduction through gate reviews, serve as a subject-matter authority on Hardware Quality Metrics, perform actionable data analysis to detect subtle trends and identify root causes to drive continuous improvement activities and increase customer satisfaction.
* Gathering quality requirements and data for Cisco products.
* Providing recommendations for quality improvement and governance that will be used by several Cisco Business Units.
* Communicating proposals, strategies and status to Cisco Executives.
* Detailing business requirements and analyzing data to provide appropriate metrics and performance KPIs to business users.
* Coordinating the research, analysis and recommendations for technical approaches to solving customer issues related to quality, reliability and customer experience of Cisco offerings.
* Independently identify issues with product lines based on trending field return data.
* You will be speaking publicly to Sr executive members quarterly product quality performance.
Minimum Requirements For The Role
* Bachelor's Degree in Engineering.
* 8+ years of experience working on Electrical design, Failure analysis and hardware quality management on networking routers/switches.
* Solid understanding in performing root cause investigation, data analysis and communicating findings, closed loop corrective, preventative and risk mitigation actions to executives and business partners.
* 5+ years of experience in communicating with Sr executives, customer account teams.
Preferred Skills
* Masters in Electrical Engineering.
Why Cisco?
At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.
Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.
We are Cisco, and our power starts with you.
Message to applicants applying to work in the U.S. and/or Canada:
The starting salary range posted for this position is $159,800.00 to $202,300.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.
Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.
U.S. employees are offered benefits, subject to Cisco's plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.
U.S. employees are eligible for paid time away as described below, subject to Cisco's policies:
* 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees
* 1 paid day off for employee's birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco
* Non-exempt employees receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees
* Exempt employees participate in Cisco's flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)
* 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next
* Additional paid time away may be requested to deal with critical or emergency issues for family members
* Optional 10 paid days per full calendar year to volunteer
For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco's policies.
Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:
* .75% of incentive target for each 1% of revenue attainment up to 50% of quota;
* 1.5% of incentive target for each 1% of attainment between 50% and 75%;
* 1% of incentive target for each 1% of attainment between 75% and 100%; and
* Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.
For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.
The applicable full salary ranges for this position, by specific state, are listed below:
New York City Metro Area:
$159,800.00 - $232,600.00
Non-Metro New York state & Washington state:
$141,700.00 - $206,400.00
* For quota-based sales roles on Cisco's sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined.
Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.
$159.8k-232.6k yearly 45d ago
Staff Skunkworks Manufacturing Test Engineer
Lockheed Martin 4.8
Palmdale, CA jobs
Lockheed Martin Aeronautics. Be More Than You Can Imagine. At Lockheed Martin Aeronautics, we're taking innovation to the next level. From designing the most advanced air vehicle to designing aircraft that defies gravity, our engineers live on the cutting edge of technology. Never have the opportunities for a technical career been so limitless.
Who You Are
You are a multi-faceted teammate able to communicate and function effectively on an engineering team to create a collaborative environment that allows for the establishment of mission goals. Self-motivated and inspired, you thrive in an environment where you are empowered to work your craft, never settling for the bare minimum.
Selected candidate will support testing during the build process.
• Interact with the aircraft across multiple sub-systems throughout assembly.
• Responsible for testing of all systems and sub-systems on the aircraft.
• Responsible for developing new test equipment as testing requirements are updated, as well as documenting complex test procedures for use by non-technical co-workers when writing procedures.
• Support the MTE Project team with the project management of test equipment and support equipment.
• Must be available to work any shift and weekends as required.
What's In It For You
Our employees play an active role in strengthening the quality of life where we live and work by volunteering more than 850,000 hours annually. Here are some of the benefits you can enjoy:
• Medical
• Dental
• 401k
• Paid time off
• Work/life balance
• Career development
• Mentorship opportunities
• Rewards & recognition
This position is in Palmdale, CA ïƒ Discover Palmdale.
Basic Qualifications
•Bachelor's degree
•Functional test experience including creating/maintaining System Check-Out Procedures (SCOPs), providing technical test support, and overseeing vehicle functional test software development/maintenance.
•Hands-on manufacturing and vehicle operations expertise including developing manufacturing test plans, pre-power and power-on vehicle operations, vehicle software loading, ground operations, engine runs, and integrated vehicle operations.
•Technical leadership experience with both represented and non-represented teams,
•Active Secret clearance with investigation within the last 5 years.
Desired skills
•Product Lifecycle Manager (PLM) experience (e.g. 3DX, Teamcenter, PDM, etc.).
Lockheed Martin is an equal opportunity employer. Qualified candidates will be considered without regard to legally protected characteristics.
The application window will close in 90 days; applicants are encouraged to apply within 5 - 30 days of the requisition posting date in order to receive optimal consideration.
*
At Lockheed Martin, we use our passion for purposeful innovation to help keep people safe and solve the world's most complex challenges. Our people are some of the greatest minds in the industry and truly make Lockheed Martin a great place to work.
With our employees as our priority, we provide diverse career opportunities designed to propel, develop, and boost agility. Our flexible schedules, competitive pay, and comprehensive benefits enable our employees to live a healthy, fulfilling life at and outside of work. We place an emphasis on empowering our employees by fostering an inclusive environment built upon integrity and corporate responsibility.
If this sounds like a culture you connect with, you're invited to apply for this role. Or, if you are unsure whether your experience aligns with the requirements of this position, we encourage you to search on Lockheed Martin Jobs, and apply for roles that align with your qualifications.
Other Important Information
By applying to this job, you are expressing interest in this position and could be considered for other career opportunities where similar skills and requirements have been identified as a match. Should this match be identified you may be contacted for this and future openings.
Ability to work remotely
Part-time Remote Telework: The employee selected for this position will work part of their work schedule remotely and part of their work schedule at a designated Lockheed Martin facility. The specific weekly schedule will be discussed during the hiring process.
Work Schedule Information
Lockheed Martin supports a variety of alternate work schedules that provide additional flexibility to our employees. Schedules range from standard 40 hours over a five day work week while others may be condensed. These condensed schedules provide employees with additional time away from the office and are in addition to our Paid Time off benefits.
Security Clearance Information
This position requires a government security clearance, you must be a US Citizen for consideration.
Pay Rate: The annual base salary range for this position in California, Massachusetts, and New York (excluding most major metropolitan areas), Colorado, Hawaii, Illinois, Maryland, Minnesota, New Jersey, Vermont, Washington or Washington DC is $104,500 - $184,115. For states not referenced above, the salary range for this position will reflect the candidate's final work location. Please note that the salary information is a general guideline only. Lockheed Martin considers factors such as (but not limited to) scope and responsibilities of the position, candidate's work experience, education/ training, key skills as well as market and business considerations when extending an offer.
Benefits offered: Medical, Dental, Vision, Life Insurance, Short-Term Disability, Long-Term Disability, 401(k) match, Flexible Spending Accounts, EAP, Education Assistance, Parental Leave, Paid time off, and Holidays.
(Washington state applicants only) Non-represented full-time employees: accrue at least 10 hours per month of Paid Time Off (PTO) to be used for incidental absences and other reasons; receive at least 90 hours for holidays. Represented full time employees accrue 6.67 hours of Vacation per month; accrue up to 52 hours of sick leave annually; receive at least 96 hours for holidays. PTO, Vacation, sick leave, and holiday hours are prorated based on start date during the calendar year.
This position is incentive plan eligible.
Pay Rate: The annual base salary range for this position in most major metropolitan areas in California, Massachusetts, and New York is $120,100 - $208,150. For states not referenced above, the salary range for this position will reflect the candidate's final work location. Please note that the salary information is a general guideline only. Lockheed Martin considers factors such as (but not limited to) scope and responsibilities of the position, candidate's work experience, education/ training, key skills as well as market and business considerations when extending an offer.
Benefits offered: Medical, Dental, Vision, Life Insurance, Short-Term Disability, Long-Term Disability, 401(k) match, Flexible Spending Accounts, EAP, Education Assistance, Parental Leave, Paid time off, and Holidays.
This position is incentive plan eligible.
$120.1k-208.2k yearly 14d ago
Staff Skunkworks Manufacturing Test Engineer
Lockheed Martin Corporation 4.8
Palmdale, CA jobs
Description:Lockheed Martin Aeronautics. Be More Than You Can Imagine. At Lockheed Martin Aeronautics, we're taking innovation to the next level. From designing the most advanced air vehicle to designing aircraft that defies gravity, our engineers live on the cutting edge of technology. Never have the opportunities for a technical career been so limitless.
Who You Are
You are a multi-faceted teammate able to communicate and function effectively on an engineering team to create a collaborative environment that allows for the establishment of mission goals. Self-motivated and inspired, you thrive in an environment where you are empowered to work your craft, never settling for the bare minimum.
Selected candidate will support testing during the build process.
* Interact with the aircraft across multiple sub-systems throughout assembly.
* Responsible for testing of all systems and sub-systems on the aircraft.
* Responsible for developing new test equipment as testing requirements are updated, as well as documenting complex test procedures for use by non-technical co-workers when writing procedures.
* Support the MTE Project team with the project management of test equipment and support equipment.
* Must be available to work any shift and weekends as required.
What's In It For You
Our employees play an active role in strengthening the quality of life where we live and work by volunteering more than 850,000 hours annually. Here are some of the benefits you can enjoy:
* Medical
* Dental
* 401k
* Paid time off
* Work/life balance
* Career development
* Mentorship opportunities
* Rewards & recognition
This position is in Palmdale, CA Discover Palmdale.
Basic Qualifications:
* Bachelor's degree
* Functional test experience including creating/maintaining System Check-Out Procedures (SCOPs), providing technical test support, and overseeing vehicle functional test software development/maintenance.
* Hands-on manufacturing and vehicle operations expertise including developing manufacturing test plans, pre-power and power-on vehicle operations, vehicle software loading, ground operations, engine runs, and integrated vehicle operations.
* Technical leadership experience with both represented and non-represented teams,
* Active Secret clearance with investigation within the last 5 years.
Desired Skills:
* Product Lifecycle Manager (PLM) experience (e.g. 3DX, Teamcenter, PDM, etc.).
Security Clearance Statement: This position requires a government security clearance, you must be a US Citizen for consideration.
Clearance Level: Secret with Investigation or CV date within 5 years
Other Important Information You Should Know
Expression of Interest: By applying to this job, you are expressing interest in this position and could be considered for other career opportunities where similar skills and requirements have been identified as a match. Should this match be identified you may be contacted for this and future openings.
Ability to Work Remotely: Part-time Remote Telework: The employee selected for this position will work part of their work schedule remotely and part of their work schedule at a designated Lockheed Martin facility. The specific weekly schedule will be discussed during the hiring process.
Work Schedules: Lockheed Martin supports a variety of alternate work schedules that provide additional flexibility to our employees. Schedules range from standard 40 hours over a five day work week while others may be condensed. These condensed schedules provide employees with additional time away from the office and are in addition to our Paid Time off benefits.
Schedule for this Position: 4x10 hour day, 3 days off per week
Pay Rate: The annual base salary range for this position in California, Massachusetts, and New York (excluding most major metropolitan areas), Colorado, Hawaii, Illinois, Maryland, Minnesota, New Jersey, Vermont, Washington or Washington DC is $104,500 - $184,115. For states not referenced above, the salary range for this position will reflect the candidate's final work location. Please note that the salary information is a general guideline only. Lockheed Martin considers factors such as (but not limited to) scope and responsibilities of the position, candidate's work experience, education/ training, key skills as well as market and business considerations when extending an offer.
Benefits offered: Medical, Dental, Vision, Life Insurance, Short-Term Disability, Long-Term Disability, 401(k) match, Flexible Spending Accounts, EAP, Education Assistance, Parental Leave, Paid time off, and Holidays.
(Washington state applicants only) Non-represented full-time employees: accrue at least 10 hours per month of Paid Time Off (PTO) to be used for incidental absences and other reasons; receive at least 90 hours for holidays. Represented full time employees accrue 6.67 hours of Vacation per month; accrue up to 52 hours of sick leave annually; receive at least 96 hours for holidays. PTO, Vacation, sick leave, and holiday hours are prorated based on start date during the calendar year.
This position is incentive plan eligible.
Pay Rate: The annual base salary range for this position in most major metropolitan areas in California, Massachusetts, and New York is $120,100 - $208,150. For states not referenced above, the salary range for this position will reflect the candidate's final work location. Please note that the salary information is a general guideline only. Lockheed Martin considers factors such as (but not limited to) scope and responsibilities of the position, candidate's work experience, education/ training, key skills as well as market and business considerations when extending an offer.
Benefits offered: Medical, Dental, Vision, Life Insurance, Short-Term Disability, Long-Term Disability, 401(k) match, Flexible Spending Accounts, EAP, Education Assistance, Parental Leave, Paid time off, and Holidays.
This position is incentive plan eligible.
Lockheed Martin is an equal opportunity employer. Qualified candidates will be considered without regard to legally protected characteristics.
The application window will close in 90 days; applicants are encouraged to apply within 5 - 30 days of the requisition posting date in order to receive optimal consideration.
At Lockheed Martin, we use our passion for purposeful innovation to help keep people safe and solve the world's most complex challenges. Our people are some of the greatest minds in the industry and truly make Lockheed Martin a great place to work.
With our employees as our priority, we provide diverse career opportunities designed to propel, develop, and boost agility. Our flexible schedules, competitive pay, and comprehensive benefits enable our employees to live a healthy, fulfilling life at and outside of work. We place an emphasis on empowering our employees by fostering an inclusive environment built upon integrity and corporate responsibility.
If this sounds like a culture you connect with, you're invited to apply for this role. Or, if you are unsure whether your experience aligns with the requirements of this position, we encourage you to search on Lockheed Martin Jobs, and apply for roles that align with your qualifications.
Experience Level: Experienced Professional
Business Unit: AERONAUTICS COMPANY
Relocation Available: Yes
Career Area: Manufacturing
Type: Full-Time
Shift: First
$120.1k-208.2k yearly 16d ago
Packaging Engineer
Texas Instruments Incorporated 4.6
Santa Clara, CA jobs
Change the world. Love your job. As a member of our Packaging team, you'll have the chance to interact with many product groups and functions. You'll have high visibility on your projects, with strong opportunities for growth both within our team and across the SC Packaging organization.
Responsibilities may include:
* To define, design, develop and scale to volume production high voltage (200-3300V) packages and high-power modules for the Industrial, Automotive, Renewable and Telecom markets.
* The candidate must understand market trends & end equipment system requirements and build these into competitive forward-looking package and module roadmaps.
* The candidate must have the ability to define solutions across various HV technologies like GaN, SiC, IGBT and Isolation Technologies and validate these using CFD, thermomechanical and electrical parasitic extraction tools.
* The candidate will develop new process flows/technologies necessary to create 1st article prototype and also scale to high volume manufacturing.
* The candidate should outline the package reliability plans, complete testing, summarize failure modes and provide solutions to address issues.
* The candidate must have a broad knowledge of the material supplier landscape (mold compounds, die attach, substrates) for high voltage applications as well as process / equipment integration and must work with various suppliers to provide solutions to meet TI roadmaps.
* The candidate must be a proven leader, capable of working collaboratively across worldwide cross functional teams and capable of accelerating development cycles and ensuring rapid time-to market for new products.
Minimum Requirements:
* Master's degree in Mechanical Engineering, Materials Science, Electrical Engineering or related engineering degree
* 10 + years of experience and proven track record of innovation in High Voltage (200V-3300V must) and high power (5KW - 300KW) semiconductor packaging across GaN / SIC / IGBT, Super Junction MOSFET technologies
* Hands on high voltage package and power module design, materials, equipment, and assembly flow integration (molded packages like TOLT, TOLG, Q-DPAK DIP, SIP and case modules)
* Strong knowledge of Silicon / GaN / SiC-package interaction and hands on experience with stress, thermal and electrical modeling analysis and tools
Preferred Requirements:
* Excellent communication skills and ability to work with internal and external customers to define and develop roadmaps
* Prior experience scaling HV packages and modules from concept to high volume manufacturing
* Good understanding of clip attach, flip chip packaging and overview of wafer bumping processes
* Knowledge of magnetics and high power density enterprise power modules (6V - 48V) is a plus
* Strong knowledge of HV Bill of Materials (Mold compounds, Die Attach, DBC substrates, etc.)
* Good understanding of industry & subcon HV packaging capabilities & roadmaps
* Overview of high voltage discrete and power modules reliability and qualification requirements, proven ability to define and drive reliability and qualification strategies in alignment with these standards and problem solving
* Track record of presenting at international conferences or symposiums related to power electronics, semiconductor packaging, or high-voltage technologies
Minimum Requirements:
* Master's degree in Mechanical Engineering, Materials Science, Electrical Engineering or related engineering degree
* 10 + years of experience and proven track record of innovation in High Voltage (200V-3300V must) and high power (5KW - 300KW) semiconductor packaging across GaN / SIC / IGBT, Super Junction MOSFET technologies
* Hands on high voltage package and power module design, materials, equipment, and assembly flow integration (molded packages like TOLT, TOLG, Q-DPAK DIP, SIP and case modules)
* Strong knowledge of Silicon / GaN / SiC-package interaction and hands on experience with stress, thermal and electrical modeling analysis and tools
Preferred Requirements:
* Excellent communication skills and ability to work with internal and external customers to define and develop roadmaps
* Prior experience scaling HV packages and modules from concept to high volume manufacturing
* Good understanding of clip attach, flip chip packaging and overview of wafer bumping processes
* Knowledge of magnetics and high power density enterprise power modules (6V - 48V) is a plus
* Strong knowledge of HV Bill of Materials (Mold compounds, Die Attach, DBC substrates, etc.)
* Good understanding of industry & subcon HV packaging capabilities & roadmaps
* Overview of high voltage discrete and power modules reliability and qualification requirements, proven ability to define and drive reliability and qualification strategies in alignment with these standards and problem solving
* Track record of presenting at international conferences or symposiums related to power electronics, semiconductor packaging, or high-voltage technologies
$119k-156k yearly est. 60d+ ago
ASIC Engineer, Performance & Package Verification
Meta Platforms, Inc. 4.8
Sunnyvale, CA jobs
Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for data center applications. As a Design Verification Engineer, you will be part of an agile team working with the best in the industry, focused on developing innovative ASIC solutions for Facebook's data center applications. You will be responsible for the verification closure of a design module or sub-system from test-planning, UVM based test bench development to verification closure. Along with traditional simulation, you will use other approaches like Formal and Emulation to achieve a bug-free design. The role also provides ample opportunities to partner and collaborate with full stack software, hardware, ASIC Design, Emulation and Post-Silicon teams towards creating a first-pass silicon success.
Minimum Qualifications
* Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
* Track record of 'first-pass success' in ASIC development cycles
* 8+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification
* 8+ years experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies
* Experience in one or more of the following areas along with functional verification-SV Assertions, Formal, Emulation
* Experience in EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments
* Experience in architecting and implementing Design Verification infrastructure and executing the full verification cycle
Preferred Qualifications
* 2+ years of experience in performance verification for CPU, GPU, or AI accelerator architectures
* Hands-on experience with architecture-level performance test planning, execution, and closure
* Experience with compute and/or memory subsystem and/or collective performance verification
* Familiarity with host and system-level concepts for performance verification
* Experience with chiplet-based architectures and package-level integration verification
* Exposure to industry-standard performance benchmarks and workload characterization
* Prior experience with fullchip or package-level integration projects
Responsibilities
* Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification
* Develop functional tests based on verification test plan
* Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage
* Debug, root-cause and resolve functional failures in the design, partnering with the Design team
* Collaborate with cross-functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring the highest design quality
* Develop and drive continuous Design Verification improvements using the latest verification methodologies, tools and technologies from the industry
About Meta
Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today-beyond the constraints of screens, the limits of distance, and even the rules of physics.
Equal Employment Opportunity
Meta is proud to be an Equal Employment Opportunity employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other applicable legally protected characteristics. You may view our Equal Employment Opportunity notice here.
Meta is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans in our job application procedures. If you need assistance or an accommodation due to a disability, fill out the Accommodations request form.
$128k-173k yearly est. 22d ago
Packaging Engineer
Texas Instruments 4.6
San Jose, CA jobs
Change the world. Love your job.
As a member of our Packaging team, you'll have the chance to interact with many product groups and functions. You'll have high visibility on your projects, with strong opportunities for growth both within our team and across the SC Packaging organization.
Responsibilities may include:
To define, design, develop and scale to volume production high voltage (200-3300V) packages and high-power modules for the Industrial, Automotive, Renewable and Telecom markets.
The candidate must understand market trends & end equipment system requirements and build these into competitive forward-looking package and module roadmaps.
The candidate must have the ability to define solutions across various HV technologies like GaN, SiC, IGBT and Isolation Technologies and validate these using CFD, thermomechanical and electrical parasitic extraction tools.
The candidate will develop new process flows/technologies necessary to create 1
st
article prototype and also scale to high volume manufacturing.
The candidate should outline the package reliability plans, complete testing, summarize failure modes and provide solutions to address issues.
The candidate must have a broad knowledge of the material supplier landscape (mold compounds, die attach, substrates) for high voltage applications as well as process / equipment integration and must work with various suppliers to provide solutions to meet TI roadmaps.
The candidate must be a proven leader, capable of working collaboratively across worldwide cross functional teams and capable of accelerating development cycles and ensuring rapid time-to market for new products.
Qualifications
Minimum Requirements:
Master's degree in Mechanical Engineering, Materials Science, Electrical Engineering or related engineering degree
10 + years of experience and proven track record of innovation in High Voltage (200V-3300V must) and high power (5KW - 300KW) semiconductor packaging across GaN / SIC / IGBT, Super Junction MOSFET technologies
Hands on high voltage package and power module design, materials, equipment, and assembly flow integration (molded packages like TOLT, TOLG, Q-DPAK DIP, SIP and case modules)
Strong knowledge of Silicon / GaN / SiC-package interaction and hands on experience with stress, thermal and electrical modeling analysis and tools
Preferred Requirements:
Excellent communication skills and ability to work with internal and external customers to define and develop roadmaps
Prior experience scaling HV packages and modules from concept to high volume manufacturing
Good understanding of clip attach, flip chip packaging and overview of wafer bumping processes
Knowledge of magnetics and high power density enterprise power modules (6V - 48V) is a plus
Strong knowledge of HV Bill of Materials (Mold compounds, Die Attach, DBC substrates, etc.)
Good understanding of industry & subcon HV packaging capabilities & roadmaps
Overview of high voltage discrete and power modules reliability and qualification requirements, proven ability to define and drive reliability and qualification strategies in alignment with these standards and problem solving
Track record of presenting at international conferences or symposiums related to power electronics, semiconductor packaging, or high-voltage technologies
$119k-155k yearly est. Auto-Apply 60d+ ago
Materials Engineer
Meta Platforms, Inc. 4.8
Sunnyvale, CA jobs
Join Meta Reality Labs and help define the next generation of Wearables and Mixed Reality experiences. Our Display, Optics, Camera, Depth and Sensors team is pioneering advanced optical systems that seamlessly merge physical and digital worlds, bringing reality through cutting-edge wearable technology. In this team we work on developing breakthrough solutions for see-through and immersive systems, designing comprehensive test frameworks, characterization protocols, and metrology solutions that ensure our displays and optical components meet the highest performance standards. Our teams seamlessly transition between strategic system-level thinking and precision-focused implementation, maturing our architectures from early concepts to production-ready designs. As a core team member, you'll explore uncharted territories for next-generation wearable devices and you will collaborate closely with cross-functional teams spanning cameras, sensors, depth perception, optics, and displays, translating visions into tangible engineering solutions.
Minimum Qualifications
* Bachelor's degree in Optical Engineering, Electrical Engineering, Physics, or a related technical discipline
* 8+ years of industry experience with a proven track record of full product development cycle in consumer electronics or similar related field
* Experience and expertise in these areas or similar related technologies: optical design software, geometrical optics, wave optics, and polarization optics, optical materials, coatings, and manufacturing processes, Imaging optics design and manufacturing, display optics, optical sensing, optical system integration and testing
* Technical leadership, communication, and project management skills
* Problem-solving, analytical, and critical thinking skills
Preferred Qualifications
* PhD in Materials Science, Optical Engineering, Physics, Chemistry, or a related field
* Experience in thin film coatings and/or advanced optical materials development for high-volume manufacturing
* Experience with AR/VR display technologies, waveguides, or diffractive optics
* Demonstrated ability to develop and implement innovative characterization methods, including adapting or inventing new approaches when standard tools are insufficient
* Proven track record of leading root cause analysis and troubleshooting for field failures using advanced chemical and physical analysis techniques
* Familiarity with consumer electronics manufacturing processes, supplier engagement, and mass production ramp
* Experience in one or more optical design tools such as Zemax, Code V, LightTools, FRED, or ASAP
* Experience with machine learning algorithms and their application to optical coating design and optimization
* Experience in manufacturing design for cost, quality control and statistical analysis using JMP, Matlab, Python, or similar programs
Responsibilities
* Lead cross-functional teams in the design, development, and implementation of cutting-edge optical solutions for new optics architectures, utilizing novel materials and processes
* Identify, incubate, and productize optical technologies that have the potential to revolutionize the field of wearable optics
* Specify key performance metrics, test methods, and test requirements for optical components and systems
* Develop and maintain technical roadmaps
* Interface with stakeholders and leadership to influence product roadmaps
* Stay updated on industry trends, emerging technologies, and competitor activity
* Manage budgets, resources, and collaborations with global vendors
About Meta
Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today-beyond the constraints of screens, the limits of distance, and even the rules of physics.
Equal Employment Opportunity
Meta is proud to be an Equal Employment Opportunity employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other applicable legally protected characteristics. You may view our Equal Employment Opportunity notice here.
Meta is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans in our job application procedures. If you need assistance or an accommodation due to a disability, fill out the Accommodations request form.
$119k-157k yearly est. 22d ago
Image Processing Engineer
Meta 4.8
Sunnyvale, CA jobs
Reality Labs at Meta is building products that make it easier for people to connect with the ones they love most, enjoy top-notch, wire-free AR/MR, and push the future of computing platforms. We are a team dedicated to AR and MR research and products, committed to driving the state-of-the-art forward through demonstrated experience in innovation. The potential of AR and MR to change the world is immense-and we're just getting started. The Reality Labs Silicon team explores, develops, and delivers new cutting-edge technologies that serve as the foundation of current and future Reality Labs products. From mixed reality and human interaction to natural input and beyond, the silicon team focuses on taking new technologies from early concept to the product level while iterating, prototyping, and realizing the human value and new experiences they open up. The team's mission is to develop cutting-edge image processing, computer vision, and machine learning core technologies for on-device imaging in combination with cloud computing. We are combining ML and classic algorithms to achieve product requirements.
**Required Skills:**
Image Processing Engineer Responsibilities:
1. Build new tools and workflows for evaluating and improving the visual quality and computational efficiency of vision systems
2. Perform image and video quality evaluations using both objective and subjective methods
3. Collaborate with software teams to co-design image tuning firmware and algorithm for performance optimization
4. Collaborate with image architecture and hardware teams to co-design algorithms that leverage specialized accelerators or custom silicon for optimized performance
**Minimum Qualifications:**
Minimum Qualifications:
5. Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
6. 6+ years experience in developing image quality tuning and evaluation systems
7. Experience in Python and/or MATLAB, and C++ for image processing and automation tasks
**Preferred Qualifications:**
Preferred Qualifications:
8. Knowledge of image and video quality metrics and evaluation methodologies
9. Experience with software-hardware co-design and developing models that interact with low-level system components
10. Experience with designing image processing or computer vision algorithms optimized for specialized hardware such as GPUs, Digital Signal Processors (DSP), or custom Application-Specific Integrated Circuits (ASIC)
11. Familiarity with state-of-the-art techniques in computational imaging, computer vision, or Augmented Reality/Virtual Reality (AR/VR) applications
**Public Compensation:**
$142,000/year to $203,000/year + bonus + equity + benefits
**Industry:** Internet
**Equal Opportunity:**
Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.
Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@fb.com.
$142k-203k yearly 60d+ ago
Image Processing Engineer
Meta Platforms, Inc. 4.8
Sunnyvale, CA jobs
Reality Labs at Meta is building products that make it easier for people to connect with the ones they love most, enjoy top-notch, wire-free AR/MR, and push the future of computing platforms. We are a team dedicated to AR and MR research and products, committed to driving the state-of-the-art forward through demonstrated experience in innovation. The potential of AR and MR to change the world is immense-and we're just getting started. The Reality Labs Silicon team explores, develops, and delivers new cutting-edge technologies that serve as the foundation of current and future Reality Labs products. From mixed reality and human interaction to natural input and beyond, the silicon team focuses on taking new technologies from early concept to the product level while iterating, prototyping, and realizing the human value and new experiences they open up. The team's mission is to develop cutting-edge image processing, computer vision, and machine learning core technologies for on-device imaging in combination with cloud computing. We are combining ML and classic algorithms to achieve product requirements.
Minimum Qualifications
* Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
* 6+ years experience in developing image quality tuning and evaluation systems
* Experience in Python and/or MATLAB, and C++ for image processing and automation tasks
Preferred Qualifications
* Knowledge of image and video quality metrics and evaluation methodologies
* Experience with software-hardware co-design and developing models that interact with low-level system components
* Experience with designing image processing or computer vision algorithms optimized for specialized hardware such as GPUs, Digital Signal Processors (DSP), or custom Application-Specific Integrated Circuits (ASIC)
* Familiarity with state-of-the-art techniques in computational imaging, computer vision, or Augmented Reality/Virtual Reality (AR/VR) applications
Responsibilities
* Build new tools and workflows for evaluating and improving the visual quality and computational efficiency of vision systems
* Perform image and video quality evaluations using both objective and subjective methods
* Collaborate with software teams to co-design image tuning firmware and algorithm for performance optimization
* Collaborate with image architecture and hardware teams to co-design algorithms that leverage specialized accelerators or custom silicon for optimized performance
About Meta
Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today-beyond the constraints of screens, the limits of distance, and even the rules of physics.
Equal Employment Opportunity
Meta is proud to be an Equal Employment Opportunity employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other applicable legally protected characteristics. You may view our Equal Employment Opportunity notice here.
Meta is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans in our job application procedures. If you need assistance or an accommodation due to a disability, fill out the Accommodations request form.
$126k-167k yearly est. 25d ago
Manufacturing Test Engineer
Advanced Micro Devices, Inc. 4.9
Santa Clara, CA jobs
WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.
THE ROLE:
Drive the end-to-end manufacturing test strategy-from early design through high-volume production-to ensure reliable, scalable execution. Oversee NPI and sustaining activities, including test infrastructure, capacity planning, and yield optimization. Design and deploy test platforms, manage critical systems, and resolve production issues both remotely and onsite. Define equipment specifications, validate test solutions, and analyze data to improve performance and reduce failures across global manufacturing operations.
THE PERSON:
A clear communicator who builds trust across teams and overseas partners. They stay calm under pressure, adapt to time zones and cultural differences, and drive alignment without formal authority. Highly organized and data-driven, they balance priorities, troubleshoot quickly, and maintain a continuous-improvement mindset. Ownership, accountability, and collaboration define their approach, ensuring smooth execution from remote analysis to on-site leadership.
KEY RESPONSIBILITIES:
* Define and execute a comprehensive manufacturing test strategy in collaboration with DIAG, Hardware, ASIC, Software, and PLQ teams.
* Develop test plans, coverage evaluations, and mechanical test requirements for new and existing products.
* Design and deploy manufacturing test platforms, fixtures, jigs, and SOPs for Contract Manufacturers.
* Specify, validate, and release test equipment to production.
* Manage test infrastructure, including servers, performance monitoring, and log accessibility.
* Lead NPI bring-up and sustaining production through remote debug, onsite builds, and yield improvement initiatives.
* Analyze high-volume test data to identify root causes, improve yield, and reduce failures.
* Oversee ECR/ECO processes for test changes and ensure alignment across engineering and manufacturing.
* Model test capacity and throughput to support production forecasts and ramp schedules.
* Coordinate with overseas CMs for escalations, remote troubleshooting, and onsite support (10-20% travel).
PREFERRED EXPERIENCE:
* Proven experience in manufacturing test engineering or production engineering for complex electronic products.
* Ownership of NPI and sustaining production, including test system design and deployment.
* Background with DPU or similar high-performance computing/networking hardware.
* Expertise in developing test fixtures, hardware, and automated workflows.
* Strong collaboration with DIAG, HW, ASIC, and SW teams on test requirements and coverage.
* Hands-on support for overseas CMs, including remote debug, night calls, and onsite execution.
* Experience with thermal chambers and environmental stress testing (thermal cycling, burn-in, temperature characterization).
* Proficiency in command-line operations for log analysis, file management, and script automation.
* Ability to analyze high-volume yield data, isolate failure signatures, and correlate across HW/SW/Diag.
* Skilled in writing test plans, SOPs, sustaining guides, and managing ECR/ECO changes.
ACADEMIC CREDENTIALS:
* Bachelor's degree in electrical, Computer, Manufacturing Engineering, or related technical field.
LOCATION: Santa Clara, CA
#LI-BS1
#LI-Hybrid
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.
$124k-160k yearly est. 27d ago
Technical Staff Engineer - Architecture (SOC)
Microchip Technology Incorporated 4.0
Irvine, CA jobs
Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.
People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip's nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it's won us countless awards for diversity and workplace excellence.
Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.
Visit our careers page to see what exciting opportunities and company perks await!
Job Description:
Join our dynamic FPGA (Field Programmable Gate Array) Business Unit as a Technical Staff SOC Architecture Engineer. We are at the forefront of developing SOC FPGA compute platforms for a diverse range of low-power applications, including smart embedded vision, industrial IoT, access/gateways/aggregation networks, and compute platforms for aerospace and defense. As an SOC Architect, you will collaborate with a team of highly motivated architects and senior designers to define and deliver next-generation, power-optimized FPGA solutions.
Key Responsibilities:
* Lead technical diligence and perform trade-off analysis of product requirements during the Product Concept Phase, translating them into actionable Design Requirements for the Product Definition Phase.
* Collaborate with Embedded Software teams to define optimal Hardware Abstraction Layer (HAL) and driver interfaces, ensuring seamless integration and performance.
* Develop detailed microarchitectural specifications, ensuring accurate capture of design intent, identifying technical gaps, and proposing effective remedies.
* Drive RTL implementation and partner with Logic Verification and ASIC Implementation teams through synthesis and DFT insertion.
* Lead discussions with CPU and IP vendors to shape future features and requirements.
* Develop and utilize techniques and tools for SOC benchmarking and bandwidth analysis, delivering optimized system solutions.
* Work cross-functionally with Functional Verification, ASIC Implementation, and Embedded Software teams across multiple geographical locations.
* Oversee all facets of interconnect to FPGA fabric, associated peripherals, and IO resources, extending beyond the SOC boundary.
Requirements/Qualifications:
Minimum Qualifications:
* Master's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
* 10-15 years of industry experience in SOC architecture and design.
* Proven experience developing ARM M-Class or RISC-V Embedded SOC architectures.
* Expertise in SOC advanced interconnect, AMBA, SOC peripherals, and DDR memory.
* Proficiency in developing microarchitecture specifications, RTL design, and logic simulations.
* Hands-on experience with Verilog, Cadence/Synopsys/Siemens simulation environments, synthesis, and DFT insertion EDA tools.
* Strong scripting skills in CSH/BASH, PERL, or Python.
* Demonstrated adaptability and flexibility in a fast-paced, evolving environment.
* Excellent verbal and written communication skills, with the ability to convey complex technical concepts to cross-functional teams.
* Proactive problem-solving attitude and a willingness to take initiative in addressing technical challenges.
Preferred Qualifications:
* Experience in SOC architecture performance analysis, tools, and simulators at various abstraction levels (Cycle Accurate, TLM, and/or Functional).
* Familiarity with UVM and functional coverage methodology.
* Experience with vector processing micro-architectures is a major plus.
Travel Time:
0% - 25%
Physical Attributes:
Feeling, Hearing, Other, Seeing, Talking, Works Alone, Works Around Others
Physical Requirements:
80% Sitting, 10% Walking, 10% Standing, Usual Business Hours
Pay Range:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature. Find more information about all our benefits at the link below:
Benefits of working at Microchip
The annual base salary range for this position, which could be performed in California, is $88,000 - $232,000.*
* Range is dependent on numerous factors including job location, skills and experience.
Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.
For more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster.
To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.
$88k-232k yearly Auto-Apply 39d ago
Technical Staff Engineer - Applications
Microchip 4.0
San Jose, CA jobs
Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.
People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip's nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the
Aggregate System
and it's won us countless awards for diversity and workplace excellence.
Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.
Visit our careers page to see what exciting opportunities and company perks await!
Job Description:
The candidate will join the rapidly growing Data Center Solutions (DCS) business unit at Microchip. DCS has a broad portfolio of products being broadly deployed today by the industry's cutting edge server/storage OEMs and hyperscale datacenters. Customers deploy DCS solutions into applications ranging from Big Data capacity storage to artificial intelligence and machine learning that are helping to shape the next digital age. Our product portfolio includes SAS/PCIe/NVMe/CXL products that connect, manage and secure the world's information, including Flash Controllers, High Performance Switches, RAID Controllers and Memory Controllers. Join a team where you can expand your skill set and drive key elements of the industry's technology leadership.
Our Applications Engineering Team is responsible for working closely with the Product Development Teams, Product Validation Teams, Marketing Teams, and Sales Teams to enable our Tier 1 storage/data center customers to bring their solutions to market. We work with leading edge technology that gets deployed in data center, machine-learning/AI, and storage applications. We engage with customer engineering teams to assist in design wins, product ramp, and system production. We offer a challenging and dynamic working environment with opportunities to make substantial contributions toward the success of our business.
Responsibilities:
Lead and mentor 3-5 applications engineers: scope and schedule deliverables
Work closely with hyperscale and Tier 1 storage customers in North America and worldwide to define requirements, manage deliverables and support platforms from initial bring-up to full production
Support, manage, maintain collateral and hardware guides for processor based storage integrated circuits and reference designs
Understand architectures and HW/SW designs in order to characterize customer related problems, providing both timely technical support and engineering feedback
Develop customer level documentation and training material
Work independently, and in a cross-functional team environment
Travel within North America and internationally as needed to customer sites to debug systems for our market leading PCIe switch products
Requirements/Qualifications:
Bachelor's degree in EE, CS, or CE
10+ years of industry experience
Strong technical leadership, teamwork, communication, and presentation skills
Thorough knowledge of circuit theory and high speed signal fundamentals
Strong debugging skills and experience with bench top equipment such as protocol analyzers/exercisers, logic analyzers, and oscilloscopes.
Experience with board-level debug & bring-up
Customer-facing experience
Ability to effectively work with cross-functional teams and across multiple geographical locations
Familiarity with storage networking concepts and protocols (PCIe, SAS and SATA, SCSI, 10/100/1000 Ethernet, TCP/IP)
Desired Qualifications:
Expertise in PCIe, NVMe, CXL, SAS, SATA
Expertise in signal integrity, high speed SERDES architecture and support, spice or IBIS AMI simulation
Strong system design skills
Experience working with Marketing and Sales teams
Project management experience
Hardware, board level, and chip level development/debug skills
Experience with RISC based embedded processors (MIPS preferred)
Experience in the Storage Industry
Travel Time:
0% - 25%
Physical Attributes:
Feeling, Hearing, Other, Seeing, Talking, Works Alone, Works Around Others
Physical Requirements:
80% Sitting, 10% Walking, 10% Standing, Usual Business Hours
Pay Range:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature. Find more information about all our benefits at the link below:
Benefits of working at Microchip
The annual base salary range for this position, which could be performed in California, is $90,000- $232,000.*
*Range is dependent on numerous factors including job location, skills and experience.
Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.
For more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster.
To all recruitment agencies:
Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.
Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.
People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip's nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the
Aggregate System
and it's won us countless awards for diversity and workplace excellence.
Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.
Visit our careers page to see what exciting opportunities and company perks await!
Job Description:
Microchip Technology FPGA Business Unit is seeking a highly skilled and experienced System Power Architect to join our dynamic team. The successful candidate will be responsible for leading cross-functional teams to deliver high-performance IP integrations into our FPGA products, that meet market & customer requirements across a broad range of use cases & application spaces.
This position is in the Silicon Architecture team of Microchip's FPGA Business Unit. Microchip is a major supplier of low-power, highly-reliable and highly-secure field-programmable gate arrays (FPGAs). Our FPGAs are used in a wide variety of use cases & applications, including embedded vision; digital signal processing; machine learning; industrial and medical equipment; satellites; and diverse defense applications. Microchip is also a pioneer in embedding RISC-V processors in FPGAs.
The successful applicant will work as part of a core team to develop future FPGA device products and will collaborate with other engineering disciplines to model, develop, verify, and integrate power efficiency solutions to meet aggressive power, performance and area (PPA) goals.
Key Responsibilities:
Understand customer use cases and the role of power management architecture in overall system architecture.
Lead cross-functional teams to analyze customer use cases & architect solutions to deliver high-performance, low power FPGA products that extend Microchip's power efficiency leadership.
Develop pre-silicon power models and work with other architects to explore PPA trade-offs.
Develop PDN models and architecture at system, package and chip levels.
Collaborate with back-end implementation teams to define UPF/CPF (Unified Power Format / Common Power Format) specifications.
Create product power architecture specifications that meet the power efficiency goals.
Partner with CAD/EDA teams to integrate power analysis tools into the design flow.
Work with firmware/software teams to define power management firmware, drivers, and runtime policies.
Work with test, validation and characterization teams to define their respective plans.
Work cross-functionally with other architects, designers, and back-end implementation teams.
Requirements/Qualifications:
Strong understanding of CMOS power consumption (dynamic, static/leakage, short-circuit) and advanced process node challenges (FinFET, GAA).
Knowledge of state-of-the-art FPGA power features.
Expertise in low-power design techniques: power gating, clock gating, retention, multi-voltage design, DVFS.
Hands-on experience with UPF/CPF and EDA power analysis tools.
Ability to analyze workloads and build power models at different abstraction levels (system, microarchitecture, RTL).
Experience in technical leadership and people management will be an advantage.
Proven ability to work cross-functionally with other architects, designers, and back-end implementation teams (in hardware, firmware, software).
BS degree or higher in EE, CS, CE or other applicable disciplines.
10+ years of industrial experience.
Travel Time:
0% - 25%
Physical Attributes:
Feeling, Hearing, Other, Seeing, Talking, Works Alone, Works Around Others
Physical Requirements:
80% Sitting, 10% Walking, 10% Standing, Usual Business Hours
Pay Range:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature. Find more information about all our benefits at the link below:
Benefits of working at Microchip
The annual base salary range for this position, which could be performed in California, is $90,000 - $232,000.*
*Range is dependent on numerous factors including job location, skills and experience.
Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.
For more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster.
To all recruitment agencies:
Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.
**********************************************************************************************************************************************
**Please select Microchip Recruiter as your source**
Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology, Inc.
People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip's nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the
Aggregate System
and it's won us countless awards for diversity and workplace excellence.
Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.
Visit our careers page to see what exciting opportunities and company perks await!
Job Description
Microchip Technology FPGA Business group is seeking a highly skilled and experienced System Interconnect Architect to join our dynamic team. The successful candidate will be responsible for leading cross-functional teams to deliver high-performance IP integrations into our FPGA products, that meet market & customer requirements across a broad range of application spaces.
This position is in the Silicon Architecture team of Microchip's FPGA Division. Microchip is a major supplier of low-power and highly-reliable field-programmable gate arrays (FPGAs). Our FPGAs are used in a wide variety of applications, including embedded vision; digital signal processing; machine learning; industrial and medical equipment; and satellites. Microchip is also a pioneer in embedding RISC-V processors in FPGAs.
The successful applicant will work as part a core team to develop future FPGA device products and will collaborate with other engineering disciplines to model, develop, verify, and integrate System Interconnect components such as IO, hard IP blocks, hard & soft IP solutions, that interoperate with overall configuration and security features to deliver performant FPGA products.
Key Responsibilities:
Lead cross-functional teams to deliver high-performance IP integrations into Microchip FPGA products
Work on ASIC & FPGA IP development, integration, and deployment for System Interconnect such as PCIe, CXL, DDR, NOC, High Speed Serial Transceivers, High Performance Parallel IO interfaces
Understand customer use models and the role of IP in overall system architecture
Work cross-functionally with other architects, designers, and back-end implementation teams
Lead and manage other engineers in the team
Qualifications
MS or higher in EE, CS, CE or other applicable disciplines
12+ years of relevant experience
Proven experience in ASIC & FPGA IP development, integration, and deployment, including all stages of development from Synthesis, constraint management, place & route, floor planning, timing closure, CDC/RDC
Knowledge and experience with system-level performance modeling in TLM/SystemC/Other will be an advantage
Experience in technical leadership and people management will be an advantage
Proven ability to work cross-functionally with other architects, designers, and back-end implementation teams
Knowledge and experience with Synopsys & Cadence ASIC flows
Scripting for EDA in Perl, Python, Tcl will be an advantage
Additional Information
Travel Time:
0% - 25%
Physical Attributes:
Feeling, Handling, Hearing, Other, Seeing, Supervises Others, Talking, Works Alone, Works Around Others
Physical Requirements:
10% walking, 10% standing, 80% sitting; 100% in doors; Usual business hours
Pay Range:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature. Find more information about all our benefits at the link below:
Benefits of working at Microchip
The annual base salary range for this position, which could be performed in California, is $88,000 - $232,000.*
*Range is dependent on numerous factors including job location, skills and experience.
Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.
$88k-232k yearly 60d+ ago
Technical Staff Engineer - Architecture (SOC)
Microchip 4.0
San Jose, CA jobs
Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.
People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip's nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the
Aggregate System
and it's won us countless awards for diversity and workplace excellence.
Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.
Visit our careers page to see what exciting opportunities and company perks await!
Job Description:
Join our dynamic FPGA (Field Programmable Gate Array) Business Unit as a Technical Staff SOC Architecture Engineer. We are at the forefront of developing SOC FPGA compute platforms for a diverse range of low-power applications, including smart embedded vision, industrial IoT, access/gateways/aggregation networks, and compute platforms for aerospace and defense. As an SOC Architect, you will collaborate with a team of highly motivated architects and senior designers to define and deliver next-generation, power-optimized FPGA solutions.
Key Responsibilities:
Lead technical diligence and perform trade-off analysis of product requirements during the Product Concept Phase, translating them into actionable Design Requirements for the Product Definition Phase.
Collaborate with Embedded Software teams to define optimal Hardware Abstraction Layer (HAL) and driver interfaces, ensuring seamless integration and performance.
Develop detailed microarchitectural specifications, ensuring accurate capture of design intent, identifying technical gaps, and proposing effective remedies.
Drive RTL implementation and partner with Logic Verification and ASIC Implementation teams through synthesis and DFT insertion.
Lead discussions with CPU and IP vendors to shape future features and requirements.
Develop and utilize techniques and tools for SOC benchmarking and bandwidth analysis, delivering optimized system solutions.
Work cross-functionally with Functional Verification, ASIC Implementation, and Embedded Software teams across multiple geographical locations.
Oversee all facets of interconnect to FPGA fabric, associated peripherals, and IO resources, extending beyond the SOC boundary.
Requirements/Qualifications:
Minimum Qualifications:
Master's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
10-15 years of industry experience in SOC architecture and design.
Proven experience developing ARM M-Class or RISC-V Embedded SOC architectures.
Expertise in SOC advanced interconnect, AMBA, SOC peripherals, and DDR memory.
Proficiency in developing microarchitecture specifications, RTL design, and logic simulations.
Hands-on experience with Verilog, Cadence/Synopsys/Siemens simulation environments, synthesis, and DFT insertion EDA tools.
Strong scripting skills in CSH/BASH, PERL, or Python.
Demonstrated adaptability and flexibility in a fast-paced, evolving environment.
Excellent verbal and written communication skills, with the ability to convey complex technical concepts to cross-functional teams.
Proactive problem-solving attitude and a willingness to take initiative in addressing technical challenges.
Preferred Qualifications:
Experience in SOC architecture performance analysis, tools, and simulators at various abstraction levels (Cycle Accurate, TLM, and/or Functional).
Familiarity with UVM and functional coverage methodology.
Experience with vector processing micro-architectures is a major plus.
Travel Time:
0% - 25%
Physical Attributes:
Feeling, Hearing, Other, Seeing, Talking, Works Alone, Works Around Others
Physical Requirements:
80% Sitting, 10% Walking, 10% Standing, Usual Business Hours
Pay Range:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature. Find more information about all our benefits at the link below:
Benefits of working at Microchip
The annual base salary range for this position, which could be performed in California, is $88,000 - $232,000.*
*Range is dependent on numerous factors including job location, skills and experience.
Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.
For more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster.
To all recruitment agencies:
Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.
********************************************************************************************************************************************** **Please select Microchip Recruiter as your source** Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology, Inc.
People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip's nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the
Aggregate System
and it's won us countless awards for diversity and workplace excellence.
Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.
Visit our careers page to see what exciting opportunities and company perks await!
Job Description
Microchip Technology FPGA Business group is seeking a highly skilled and experienced System Interconnect Architect to join our dynamic team. The successful candidate will be responsible for leading cross-functional teams to deliver high-performance IP integrations into our FPGA products, that meet market & customer requirements across a broad range of application spaces.
This position is in the Silicon Architecture team of Microchip's FPGA Division. Microchip is a major supplier of low-power and highly-reliable field-programmable gate arrays (FPGAs). Our FPGAs are used in a wide variety of applications, including embedded vision; digital signal processing; machine learning; industrial and medical equipment; and satellites. Microchip is also a pioneer in embedding RISC-V processors in FPGAs.
The successful applicant will work as part a core team to develop future FPGA device products and will collaborate with other engineering disciplines to model, develop, verify, and integrate System Interconnect components such as IO, hard IP blocks, hard & soft IP solutions, that interoperate with overall configuration and security features to deliver performant FPGA products.
Key Responsibilities:
Lead cross-functional teams to deliver high-performance IP integrations into Microchip FPGA products
Work on ASIC & FPGA IP development, integration, and deployment for System Interconnect such as PCIe, CXL, DDR, NOC, High Speed Serial Transceivers, High Performance Parallel IO interfaces
Understand customer use models and the role of IP in overall system architecture
Work cross-functionally with other architects, designers, and back-end implementation teams
Lead and manage other engineers in the team
Qualifications
MS or higher in EE, CS, CE or other applicable disciplines
12+ years of relevant experience
Proven experience in ASIC & FPGA IP development, integration, and deployment, including all stages of development from Synthesis, constraint management, place & route, floor planning, timing closure, CDC/RDC
Knowledge and experience with system-level performance modeling in TLM/SystemC/Other will be an advantage
Experience in technical leadership and people management will be an advantage
Proven ability to work cross-functionally with other architects, designers, and back-end implementation teams
Knowledge and experience with Synopsys & Cadence ASIC flows
Scripting for EDA in Perl, Python, Tcl will be an advantage
Additional Information
Travel Time:
0% - 25%
Physical Attributes:
Feeling, Handling, Hearing, Other, Seeing, Supervises Others, Talking, Works Alone, Works Around Others
Physical Requirements:
10% walking, 10% standing, 80% sitting; 100% in doors; Usual business hours
Pay Range:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature. Find more information about all our benefits at the link below:
Benefits of working at Microchip
The annual base salary range for this position, which could be performed in California, is $88,000 - $232,000.*
*Range is dependent on numerous factors including job location, skills and experience.
Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.
$88k-232k yearly 17h ago
Security Product Planning Engineer
Advanced Micro Devices, Inc. 4.9
San Jose, CA jobs
WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.
SECURITY PRODUCT PLANNING ENGINEER
THE ROLE:
This is a specialized position responsible for Product Engineering program technical planning for next-generation AMD Embedded security, configuration, boot & debug features. This individual serves as a critical technical point of contact to the business, design, platform validation and product engineering teams. We have competitive benefit packages and an award-winning culture. Join us!
THE PERSON:
A successful candidate is one who can drive technical decisions independently, has accountability for accuracy, reliability and completeness of assignment results critical to the project's success. This role allows the opportunity to influence technical decisions that have a significant impact on multiple products or the product line.
KEY RESPONSIBILITIES:
* Drive security, boot, configuration and debug planning for custom ASIC & broad market products projects.
* Collaborate with architecture and design teams to address security/boot/config/debug requirements.
* Work closely with internal stakeholders to ensure alignment and timely execution.
* Contribute to security strategy and compliance for future projects requiring integration of HWRoT, FPGA, and BMC technologies.
PREFERRED EXPERIENCE:
* Experience in configuration, boot, debug, and security planning for ASICs, ASSPs or FPGA-based systems.
* Familiarity with custom ASIC development and security protocols.
* Strong collaboration skills to work across architecture, design, and product teams.
* Ability to obtain security clearance
* Knowledge of debug methodologies for complex SoCs and custom ASICs
* Exposure to security frameworks and compliance standards (e.g. ISO21434, IEC 62443 & CRA) in semiconductor development.
ACADEMIC CREDENTIALS:
* Bachelor's or Master's in Computer Engineering, Computer Science, or Electrical Engineering, or comparable disciplines.
LOCATION:
San Jose, CA
This role is not eligible for visa sponsorship.
#LI-GW1
#LI-HYBRID
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.