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Hardware Engineering Internship jobs at Keysight Technologies

- 29 jobs
  • Intern CAD Engineering

    Rambus 4.8company rating

    San Jose, CA jobs

    Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional CAD Engineering Intern to join our Central CAD Team. Selected candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer. As a CAD Engineering Intern, the candidate will be reporting to the Director of CAD. In this role the candidate will be working on CAD tool, flow and methodology development and support for a world-wide design team working on advanced process technology nodes. The CAD team is spread globally across the US and India and supports EDA (electronic design automation) software, EDA infrastructure, design flows/methodologies, and design automation for world-wide design teams working on cutting edge product chips designs for memory interface chips, interconnect chips and silicon IP designs. Rambus offers a flexible work environment, embracing a hybrid approach for the majority of our office-based roles. We encourage employees to spend an average of at least three days per week working onsite, allowing for two days of remote work Responsibilities * You will be part of a computer-aided design (CAD) team that develops and releases software tools and utilities that are crucial for Rambus's advanced chip design and verification. * Your role will include developing and supporting software utilities, using Python, Skill, Tcl, or similar languages, that are part of a design methodology that enables high productivity, fast time to market, and highly optimized chip designs. * During your internship, you will be assigned tasks and responsibilities related to automation of one of the chip design work flows, in the space of custom/analog circuit design, circuit simulation, or custom layout design. Qualifications * Undergraduate (completed 3 years) or graduate student in EE or CS. * Strong hands-on software development experience and scripting skills with Python (preferred), Perl, TCL, C-Shell, Python, Makefile, and/or C++. * Basic understanding of semiconductor or electronic design and analysis, and associated electronic design automation (EDA) software tools, through either academic course work or hands-on project work, is preferred. About Rambus Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads. Our world-class team is the foundation of our company, and our innovative spirit drives us to develop the cutting-edge products and technologies essential for tomorrow's systems. Rambus offers a competitive compensation package including base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program, and gym membership. The US hourly range for this full-time position is $29.79 to $55.32. Our hourly ranges are determined by role, level and location. The successful candidate's starting pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. Rambus is committed to cultivating a culture where we actively seek to understand, respect, and celebrate the complex and rich identities of ourselves and others. Our Diversity, Equity, and Inclusion initiatives are geared towards valuing the differences in backgrounds, experiences, and thoughts at Rambus to help enhance collaboration, teamwork, engagement, and innovation. At Rambus, we believe that we can be our best when every member of our organization feels respected, included, and heard. Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics. Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans during our job application procedures. If you require assistance or an accommodation due to a disability, please feel free to inform us in your application. Rambus does not accept unsolicited resumes from headhunters, recruitment agencies or fee-based recruitment services. For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/.
    $96k-132k yearly est. Auto-Apply 60d+ ago
  • Intern CAD Engineering

    Rambus 4.8company rating

    Agoura Hills, CA jobs

    Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional CAD Engineering Intern to join our Central CAD Team. Selected candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer. As a CAD Engineering Intern, the candidate will be reporting to the Director of CAD. In this role the candidate will be working on CAD tool, flow and methodology development and support for a world-wide design team working on advanced process technology nodes. The CAD team is spread globally across the US and India and supports EDA (electronic design automation) software, EDA infrastructure, design flows/methodologies, and design automation for world-wide design teams working on cutting edge product chips designs for memory interface chips, interconnect chips and silicon IP designs. Rambus offers a flexible work environment, embracing a hybrid approach for the majority of our office-based roles. We encourage employees to spend an average of at least three days per week working onsite, allowing for two days of remote work Responsibilities * You will be part of a computer-aided design (CAD) team that develops and releases software tools and utilities that are crucial for Rambus's advanced chip design and verification. * Your role will include developing and supporting software utilities, using Python, Skill, Tcl, or similar languages, that are part of a design methodology that enables high productivity, fast time to market, and highly optimized chip designs. * During your internship, you will be assigned tasks and responsibilities related to automation of one of the chip design work flows, in the space of custom/analog circuit design, circuit simulation, or custom layout design. Qualifications * Undergraduate (completed 3 years) or graduate student in EE or CS. * Strong hands-on software development experience and scripting skills with Python (preferred), Perl, TCL, C-Shell, Python, Makefile, and/or C++. * Basic understanding of semiconductor or electronic design and analysis, and associated electronic design automation (EDA) software tools, through either academic course work or hands-on project work, is preferred. About Rambus Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads. Our world-class team is the foundation of our company, and our innovative spirit drives us to develop the cutting-edge products and technologies essential for tomorrow's systems. Rambus offers a competitive compensation package including base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program, and gym membership. The US hourly range for this full-time position is $29.79 to $55.32. Our hourly ranges are determined by role, level and location. The successful candidate's starting pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. Rambus is committed to cultivating a culture where we actively seek to understand, respect, and celebrate the complex and rich identities of ourselves and others. Our Diversity, Equity, and Inclusion initiatives are geared towards valuing the differences in backgrounds, experiences, and thoughts at Rambus to help enhance collaboration, teamwork, engagement, and innovation. At Rambus, we believe that we can be our best when every member of our organization feels respected, included, and heard. Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics. Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans during our job application procedures. If you require assistance or an accommodation due to a disability, please feel free to inform us in your application. Rambus does not accept unsolicited resumes from headhunters, recruitment agencies or fee-based recruitment services. For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/.
    $95k-131k yearly est. Auto-Apply 60d+ ago
  • Design Verification Engineer Intern

    Rambus 4.8company rating

    San Jose, CA jobs

    Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional Design Verification Engineer Intern to join our Memory Interface Chip team in San Jose. In this role, you will be working with some of the brightest inventors and engineers in the world developing products that make data faster and safer. Rambus offers a flexible work environment, embracing a hybrid approach for most office-based roles. Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote work. Responsibilities * Understand the architecture of the chip and functional blocks. * Develop/maintain verification environments for chip level verification and enhance/use the automated regression infrastructures. * Create testplan and develop test cases/sequences in UVM. * Debug functional issues in the DUT based on the good understanding of the architectural specification. * Closely work with Design/Architecture/Circuit team to identify and align with the Milestones and Quality metrics of the project. Qualifications * Major in EE, CS or related. * Proficient in Verilog, systemverilog and UVM. * Familiar with Linux environment and the industry's prevailing EDA tools. * Have better understanding of Verification methodology and concepts. * Have good understanding of Pre-Silicon design process from Architecture, Design, Synthesis and Gate level Implementation till Tapeout release. * Have excellent communication skills (both written and oral) and cross-team/function collaboration capability. * Experienced in code coverage and functional coverage closure. * Strong problem-solving skills. About Rambus Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads. Our world-class team is the foundation of our company, and our innovative spirit drives us to develop the cutting-edge products and technologies essential for tomorrow's systems. The US salary range for this full-time position is $24.96 to $46.35. Our salary ranges are determined by role, level and location. The successful candidate's starting pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. At Rambus, we are committed to fostering a workplace where every individual is respected, supported, and empowered to succeed. We value a range of perspectives and experiences that contribute to innovation and collaboration. Our goal is to ensure that all team members have equitable access to opportunities, resources, and a sense of belonging. We believe that a culture of fairness and inclusion helps us all do our best work. Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics. Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans during our job application procedures. If you require assistance or an accommodation due to a disability, please feel free to inform us in your application. Rambus does not accept unsolicited resumes from headhunters, recruitment agencies or fee-based recruitment services. For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/. #LI-HYBRID #LI-LH1
    $25-46.4 hourly Auto-Apply 18d ago
  • Hardware Designer 2

    Lam Research 4.6company rating

    Fremont, CA jobs

    Mechanical Create detailed engineering drawings and CAD models for the design concepts and design changes of complex parts and assemblies. Implement design changes for parts and assemblies, including changes to address issues identified in supplier build or problem reports. Develop Piping and Instrumentation Diagram (P&ID), including system-level or customer-specific, for parts and assemblies to aid in the design process. Select OEM parts based on design requirements and best-known methods. Document and release engineering drawings, and bills of materials (BOM) using Engineering Change Management to support manufacturing. Create 3D electrical and pneumatical harness routing using CAD packages. Develop multi-CAD layouts for Lam products and manage larger scale 3D assemblies. Advise supplier during product development phase to translate detailed engineering requirements into specifications and collaborate cross-functionally to provide design verification. Bachelor's degree in Mechanical Engineering, Electrical Engineering, or related field with 2+ years of experience; or an advanced degree with no previous professional experience; or equivalent experience. Highly skilled in 3D CAD modeling tools such as CREO, Siemens NX, AutoCAD, SolidWorks, and others. Proficiency in concept design and development for mechanical components or sub-systems. Knowledge in creating drawings for sheet metal and machined parts. Experience with metal machining and sheet metal fabrication and casting processes. Fundamental understanding of mechanical engineering, engineering/design methods and processes, and engineering drawing. Solid knowledge on welding symbols, geometric dimensioning and tolerancing (GD&T) symbols, surface finish, and American Society of Mechanical Engineers (ASME) drafting standards. Experience with Cable Harness, Schematics and Interconnect using E3 Zuken, Ideas, or PCAD. Knowledge on selection of OEM Components and cable accessories. Understanding of design standards and compliance such as UL 508, IEC Standard, SEMI standard (Electrical), IPC 620, or similar. Knowledge on design for manufacturability in cable design. This is a graduate eligible role. Prior experience in the semiconductor equipment industry. Experience in global cross-functional teams within a matrix organization. Understanding of Product Lifecycle Management (PLM) concepts. Familiarity with Bills of Material (BOM) structure and configuration, and use of SAP and PLM system software. Knowledge on industrial control panel design. Excellent communication, both written and verbal, and technical presentation skills.
    $120k-153k yearly est. 18d ago
  • Test Engineering Intern

    Rambus 4.8company rating

    San Jose, CA jobs

    Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Test Engineeing Intern to join our Engineering team in San Jose, CA. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer. As a Test Engineering Intern, you will be reporting to the designated Engineering Manager or Sr Level Mentor and is a Full-Time position. The candidate will be joining a team to work on cutting edge memory and silicon IP technology shaping the future of data centers and high-performance systems. Rambus offers a flexible work environment, embracing a hybrid approach for the majority of our office-based roles. We encourage employees to spend an average of at least three days per week working onsite, allowing for two days of remote work. Responsibilities * Work with DFT and design team to define test plans for new products. * Develop test strategies with the design and validation engineering teams to ensure product performance during all product life cycle phases * Wafer-sort development * Bench test capability to correlate/debug the ATE TP. * Test plan documentation compiling the test instructions from DE and other teams. * Work with product engineering to attain target yield and test time * Have a complete test program ready in advance of first silicon * Bring-up and debug first silicon quickly in order to identify any potential design or yield issues * Optimize test programs for volume manufacturing so product cost is in-line with cost model * Identify areas of improvement in current production test programs * Generate user test methods for device characterization and production Qualifications * BS degree in Electrical/Electronics with some relevant experience * Knowledge with high-speed testing * Strong programming background (C, C++, PERL) * Knowledge of DFT (scan, IDDQ, JTAG) and analog test methodologies About Rambus Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads. Our world-class team is the foundation of our company, and our innovative spirit drives us to develop the cutting-edge products and technologies essential for tomorrow's systems. Rambus offers a competitive compensation package including base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program, and gym membership. The US salary range for this full-time position is $24.96 to $46.35. Our salary ranges are determined by role, level and location. The successful candidate's starting pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. Rambus is committed to cultivating a culture where we actively seek to understand, respect, and celebrate the complex and rich identities of ourselves and others. Our Diversity, Equity, and Inclusion initiatives are geared towards valuing the differences in backgrounds, experiences, and thoughts at Rambus to help enhance collaboration, teamwork, engagement, and innovation. At Rambus, we believe that we can be our best when every member of our organization feels respected, included, and heard. Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics. Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans during our job application procedures. If you require assistance or an accommodation due to a disability, please feel free to inform us in your application. Rambus does not accept unsolicited resumes from headhunters, recruitment agencies or fee-based recruitment services. For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/.
    $25-46.4 hourly Auto-Apply 10d ago
  • Firmware Engineer Intern

    Rambus 4.8company rating

    California jobs

    Rambus, a premier chip and silicon IP provider, is seeking a bright and motivated internship (co-op) student in either an Engineering or Computer Science program for a 4 month or 8 month work term within the Firmware Engineering team in the Memory Interface Chips Business Unit. The student will work alongside some of the brightest inventors and engineers in the world to develop firmware and software solutions that make data faster and safer. During the internship, the student will join a Firmware Engineering team to work on cutting edge memory and silicon technology shaping the future of data centers and high-performance systems. The student will develop, test, and debug software for memory diagnostic applications and embedded CPUs in System-On-Chips (SoCs). The student will gain experience with processor-memory interfaces, DDR5, BIOS, Redfish, OpenBMC, as well as other third-party SW stacks. The student should have a strong interest in embedded software development and electronics, and be a self-starter with strong organizational, communication, teamwork, and debugging skills. Rambus offers a flexible work environment, embracing a hybrid approach for the majority of our office-based roles. We encourage employees to spend an average of at least three days per week working onsite, allowing for two days of remote work. Responsibilities * Design, implement, test, and debug software for embedded devices and systems, from requirements to deployment. * Write unit tests and feature tests for test automation. * Setup, maintain, and debug systems used for DDR5 memory diagnostic development. * Follow coding convention and best practices of the team, and conduct code reviews. Qualifications * C/C++ programming skills. * Ability to follow technical guidance from senior team members. * Excellent written and verbal communication skills. Desired Skills: * Previous embedded software courses and / or projects. * One or more previous co-op terms, preferably with embedded development experience. * Python scripting skills About Rambus Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads. Our world-class team is the foundation of our company, and our innovative spirit drives us to develop the cutting-edge products and technologies essential for tomorrow's systems. Rambus offers a competitive compensation package, including base salary, bonus, equity and employee benefits. At Rambus, we are committed to fostering a workplace where every individual is respected, supported, and empowered to succeed. We value a range of perspectives and experiences that contribute to innovation and collaboration. Our goal is to ensure that all team members have equitable access to opportunities, resources, and a sense of belonging. We believe that a culture of fairness and inclusion helps us all do our best work. Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics. Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans during our job application procedures. If you require assistance or an accommodation due to a disability, please feel free to inform us in your application. Rambus does not accept unsolicited resumes from headhunters, recruitment agencies or fee-based recruitment services. For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/. #LI-HYBRID #LI-GL1
    $52k-74k yearly est. Auto-Apply 34d ago
  • Silicon IP - Field Application Engineer Intern

    Rambus 4.8company rating

    San Jose, CA jobs

    Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional Field Application Engineer Intern to join our FAE team. In this role, you will be working with some of the brightest inventors and engineers in the world developing products that make data faster and safer. We're seeking a motivated and curious student to join us for a 10-12 week summer internship. This is an opportunity to gain hands-on experience in the Silicon IP sales and support organization. You'll be exposed to leading edge technology and applications on the memory (HBM, LPDDR) as well as potentially PCIE as well as SOC level security concepts. Rambus offers a flexible work environment, embracing a hybrid approach for most office-based roles. Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote work. Responsibilities * Conduct Research on Market Verticals and competitive analysis * Hands on development of Security subsystem related SW development * Collaboration with industry experienced team members to work on internal IP performance characterization * Help prepare reports, presentations and documentation Qualifications * Currently enrolled in a BS or MS in Electrical Engineering or Computer Science * Strong communication and organization skills * Eagerness to learn and get hands on * Basic proficiency in RTL simulators What you'll Gain * Practical experience and exposure to real world ASIC designs from startups through hyperscalers * Mentorship on industry leaders and domain experts in Memory Controllers, PCIE controllers and Security IP * Exposure to the IP / licensing and sales side of the industry. About Rambus Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads. Our world-class team is the foundation of our company, and our innovative spirit drives us to develop the cutting-edge products and technologies essential for tomorrow's systems. Rambus offers a competitive compensation package including base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program, and gym membership. The US hourly range for this full-time position is $25/hr to $55/hr. Our ranges are determined by role, level and location. The successful candidate's starting pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. Rambus is committed to cultivating a culture where we actively seek to understand, respect, and celebrate the complex and rich identities of ourselves and others. Our Diversity, Equity, and Inclusion initiatives are geared towards valuing the differences in backgrounds, experiences, and thoughts at Rambus to help enhance collaboration, teamwork, engagement, and innovation. At Rambus, we believe that we can be our best when every member of our organization feels respected, included, and heard. Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics. Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans during our job application procedures. If you require assistance or an accommodation due to a disability, please feel free to inform us in your application. Rambus does not accept unsolicited resumes from headhunters, recruitment agencies or fee-based recruitment services. For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/. #LI-RF1
    $25 hourly Auto-Apply 60d+ ago
  • Design Verification Engineering Intern - MS/PhD - Santa Clara

    Texas Instruments 4.6company rating

    San Jose, CA jobs

    We can't predict what the future holds, but we know Texas Instruments will have a part in shaping it. As a Design Verification intern in this group, you will be responsible for: Developing detailed verification plans while working closely with the design and system team to ensure pre- silicon verification success Developing test benches, tests and simulations to DUT behavior Running coverage regressions to meet the defined coverage goals for SystemVerilog functional coverage models of mixed-signal circuits for voltages and currents, real numbers, integers, and traditional digital functional coverage. Tracking and communicating verification status, issues, and concerns Work with regression tools and develop scripts to submit cases for regression analysis Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital circuits. Constrained-random stimulus and auto-checking verification environments, especially constrained-random analog stimulus. Contribute to continuous improvements for quality and efficiency on DV strategy, tools, methods and flows Put your talent to work with us as a Design Engineer Intern - change the world, love your job! Qualifications Minimum requirements: Currently pursuing a graduate degree in Electrical Engineering, Computer Engineering or Electrical & Computer Engineering Cumulative 3.0/4.0 GPA or higher Preferred qualifications: Ability to establish strong relationships with key stakeholders critical to success, both internally and externally Strong verbal and written communication skills Ability to quickly ramp on new systems and processes Demonstrated strong interpersonal, analytical and problem-solving skills Ability to work in teams and collaborate effectively with people in different functions Ability to take the initiative and drive for results Strong time management skills that enable on-time project delivery
    $82k-118k yearly est. Auto-Apply 60d+ ago
  • Analog IC Design Engineering Intern - MS/PhD - Santa Clara

    Texas Instruments 4.6company rating

    San Jose, CA jobs

    Change the world. Love your job. As a analog IC design engineering intern, you'll architect new TI products and make our customers' visions a reality. You'll define, design, model, implement and document analog, digital, and RF integrated circuits (ICs). And, you'll have the opportunity to work in exciting areas like audio, imaging, high-speed, interface, clocking, medical, high volume linear, automotive, storage, power supply, battery management, linear power and many more. Some of your responsibilities will include, but will not be limited to: Partnering with business teams and system engineering to develop mutually agreeable design specifications Providing high-level analysis on chip architecture trade-offs to ensure spec compliance and superior performance at a competitive cost Participating in design reviews and creating the necessary design and product documentation Supervising IC layouts to ensure a high-performance standard Characterizing prototypes, developing test specifications and coordinating with test/product engineering to drive product releases Driving behavioral models Put your talent to work with us as a Design Engineer Intern! Qualifications Minimum requirements: Currently pursuing a graduate degree in Electrical Engineering, Computer Engineering or Electrical & Computer Engineering Cumulative 3.0/4.0 GPA or higher Preferred qualifications: Ability to establish strong relationships with key stakeholders critical to success, both internally and externally Strong verbal and written communication skills Ability to quickly ramp on new systems and processes Demonstrated strong interpersonal, analytical and problem-solving skills Ability to work in teams and collaborate effectively with people in different functions Ability to take the initiative and drive for results Strong time management skills that enable on-time project delivery
    $82k-118k yearly est. Auto-Apply 60d+ ago
  • Design Verification Engineering Intern - Bachelors - Santa Clara

    Texas Instruments 4.6company rating

    San Jose, CA jobs

    We can't predict what the future holds, but we know Texas Instruments will have a part in shaping it. As a Design Verification intern in this group, you will be responsible for: Developing detailed verification plans while working closely with the design and system team to ensure pre- silicon verification success Developing test benches, tests and simulations to DUT behavior Running coverage regressions to meet the defined coverage goals for SystemVerilog functional coverage models of mixed-signal circuits for voltages and currents, real numbers, integers, and traditional digital functional coverage. Tracking and communicating verification status, issues, and concerns Work with regression tools and develop scripts to submit cases for regression analysis Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital circuits. Constrained-random stimulus and auto-checking verification environments, especially constrained-random analog stimulus. Contribute to continuous improvements for quality and efficiency on DV strategy, tools, methods and flows Put your talent to work with us as a Design Engineer Intern - change the world, love your job! Texas Instruments will not sponsor job applicants for visas or work authorization for this position. Qualifications Minimum requirements: Currently pursuing an undergraduate or graduate degree in Electrical Engineering, Computer Engineering or Electrical & Computer Engineering Cumulative 3.0/4.0 GPA or higher Preferred qualifications: Ability to establish strong relationships with key stakeholders critical to success, both internally and externally Strong verbal and written communication skills Ability to quickly ramp on new systems and processes Demonstrated strong interpersonal, analytical and problem-solving skills Ability to work in teams and collaborate effectively with people in different functions Ability to take the initiative and drive for results Strong time management skills that enable on-time project delivery
    $82k-118k yearly est. Auto-Apply 60d+ ago
  • Analog IC Design Engineering Intern - Bachelors - Santa Clara

    Texas Instruments 4.6company rating

    San Jose, CA jobs

    Change the world. Love your job. As a analog IC design engineering intern, you'll architect new TI products and make our customers' visions a reality. You'll define, design, model, implement and document analog, digital, and RF integrated circuits (ICs). And, you'll have the opportunity to work in exciting areas like audio, imaging, high-speed, interface, clocking, medical, high volume linear, automotive, storage, power supply, battery management, linear power and many more. Some of your responsibilities will include, but will not be limited to: Partnering with business teams and system engineering to develop mutually agreeable design specifications Providing high-level analysis on chip architecture trade-offs to ensure spec compliance and superior performance at a competitive cost Participating in design reviews and creating the necessary design and product documentation Supervising IC layouts to ensure a high-performance standard Characterizing prototypes, developing test specifications and coordinating with test/product engineering to drive product releases Driving behavioral models Put your talent to work with us as a Design Engineer Intern ! Texas Instruments will not sponsor job applicants for visas or work authorization for this position. Qualifications Minimum requirements: Currently pursuing an undergraduate degree in Electrical Engineering, Computer Engineering or Electrical & Computer Engineering Cumulative 3.0/4.0 GPA or higher Preferred qualifications: Ability to establish strong relationships with key stakeholders critical to success, both internally and externally Strong verbal and written communication skills Ability to quickly ramp on new systems and processes Demonstrated strong interpersonal, analytical and problem-solving skills Ability to work in teams and collaborate effectively with people in different functions Ability to take the initiative and drive for results Strong time management skills that enable on-time project delivery
    $82k-118k yearly est. Auto-Apply 60d+ ago
  • Packaging Engineering Intern - MS/PhD - Santa Clara

    Texas Instruments 4.6company rating

    Santa Clara, CA jobs

    **Change the world. Love your job.** Interface across various work areas and organizations to help with the design, development, and analysis of different semiconductor packaging technologies to enable differentiation for TI's analog and embedded processing products. Assignments may include participation in cross-functional teams to develop internal and external solutions for semiconductor packaging technologies, including Wirebond, Flip Chip, Modules, SIPs and other advanced packages at different stages of readiness. Cultivate packaging advancements with work in material, mechanical, thermal, and electrical characterization. TI's innovative packaging technologies are designed to solve customers' problems by delivering advances in miniaturization, integration, high reliability, high performance, and low power. Put your talent to work with us as a Packaging Engineering Intern ! **Why TI?** + Engineer your future. We empower our employees to truly own their career and development. Come collaborate with some of the smartest people in the world to shape the future of electronics. + We're different by design. Diverse backgrounds and perspectives are what push innovation forward and what make TI stronger. We value each and every voice, and look forward to hearing yours. Meet the people of TI (*************************************** UI/CandidateExperience/en/sites/CX/pages/4012) + Benefits that benefit you. We offer competitive pay and benefits designed to help you and your family live your best life. Your well-being is important to us. **About Texas Instruments** Texas Instruments Incorporated (Nasdaq: TXN) is a global semiconductor company that designs, manufactures and sells analog and embedded processing chips for markets such as industrial, automotive, personal electronics, communications equipment and enterprise systems. At our core, we have a passion to create a better world by making electronics more affordable through semiconductors. This passion is alive today as each generation of innovation builds upon the last to make our technology more reliable, more affordable and lower power, making it possible for semiconductors to go into electronics everywhere. Learn more at TI.com . Texas Instruments is an equal opportunity employer and supports a diverse, inclusive work environment. All qualified applicants will receive consideration for employment without regard to race, color, religion, creed, disability, genetic information, national origin, gender, gender identity and expression, age, sexual orientation, marital status, veteran status, or any other characteristic protected by federal, state, or local laws. If you are interested in this position, please apply to this requisition. **Minimum Requirements:** + Currently pursuing an Masters degree in Mechanical Engineering, Materials Science, Chemical Engineering, Physics or Electrical Engineering. + Cumulative 3.0/4.0 GPA or higher **Preferred Qualifications:** + Semiconductor packaging knowledge is preferred (processes, assembly, reliability, materials, characterization, FA) + Demonstrated analytical and problem solving skills + Strong written and verbal communication skills + Ability to work in teams and collaborate effectively with people in different functions + Strong time management skills that enable on-time project delivery + Ability to build strong, influential relationships + Ability to work effectively in a fast-paced and rapidly changing environment + Ability to take the initiative and drive for results **Base Range Info:** Base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. Your base pay will depend on your skills, qualifications, experience, and location. The base pay range for this role is shown below. **Base Range:** $45.75 - $57.00 per hour **ECL/GTC Required:** Yes
    $45.8-57 hourly 60d+ ago
  • Packaging Engineering Intern - MS/PhD - Santa Clara

    Texas Instruments 4.6company rating

    San Jose, CA jobs

    Change the world. Love your job. Interface across various work areas and organizations to help with the design, development, and analysis of different semiconductor packaging technologies to enable differentiation for TI's analog and embedded processing products. Assignments may include participation in cross-functional teams to develop internal and external solutions for semiconductor packaging technologies, including Wirebond, Flip Chip, Modules, SIPs and other advanced packages at different stages of readiness. Cultivate packaging advancements with work in material, mechanical, thermal, and electrical characterization. TI's innovative packaging technologies are designed to solve customers' problems by delivering advances in miniaturization, integration, high reliability, high performance, and low power. Put your talent to work with us as a Packaging Engineering Intern ! Qualifications Minimum Requirements: Currently pursuing an Masters degree in Mechanical Engineering, Materials Science, Chemical Engineering, Physics or Electrical Engineering. Cumulative 3.0/4.0 GPA or higher Preferred Qualifications: Semiconductor packaging knowledge is preferred (processes, assembly, reliability, materials, characterization, FA) Demonstrated analytical and problem solving skills Strong written and verbal communication skills Ability to work in teams and collaborate effectively with people in different functions Strong time management skills that enable on-time project delivery Ability to build strong, influential relationships Ability to work effectively in a fast-paced and rapidly changing environment Ability to take the initiative and drive for results
    $54k-83k yearly est. Auto-Apply 60d+ ago
  • Field Applications Engineering Intern (Santa Clara, CA)

    Texas Instruments 4.6company rating

    San Jose, CA jobs

    Change the world. Love your job. Do you strive to understand how electronics work, and enjoy debugging, coding and/or solving technical problems? If so, a Field Applications Engineer internship may be the role for you. This internship is designed to establish you as a broad technical TI expert with customer engineers and internal teams, and to teach you how functional product characteristics correlate to system-level requirements. Demonstrate your technical competency on product selection, systems, implementation and debug, as you prepare for a career as a Field Applications Engineer. Field Applications Engineer (FAE) Intern responsibilities include: Using various sales tools and relationships with design engineering to identify all potential projects Providing customers with proactive proposals for complete, system-level solutions that maximize TI content Using broad technical expertise to influence customers' part selection process while favorably positioning TI versus competition Texas Instruments will not sponsor job applicants for visas or work authorization for this position. Qualifications Minimum Requirements: Pursuing a Bachelors degree in Electrical Engineering, Electronics Technology, Electrical Engineering Technology, Electrical and Computer Engineering or related field Cumulative 3.0/4.0 GPA or higher Basic understanding of schematics, layouts and digital components Knowledge and understanding of analog circuitry (examples include: op-amps, DC/DC power, data converters, sensing, etc.) Preferred Qualifications: Experience with lab equipment such as oscilloscopes, along with soldering and debugging skills Programming skills in C/C++ (LabView recommended) Demonstrated strong analytical and problem solving skills Excellent communication and presentation skills Ability to work in teams and collaborate effectively with people in different functions Strong time management skills that enable on-time project delivery Ability to build lasting, influential relationships, both inside and outside the organization Ability to work effectively in a fast-paced and ever-changing environment Ability to take initiative and drive for results Ability to influence decisions through a sense of urgency and competitive drive
    $54k-83k yearly est. Auto-Apply 60d+ ago
  • Applications Engineering Intern - Santa Clara

    Texas Instruments 4.6company rating

    San Jose, CA jobs

    Change the world. Love your job. Do you strive to understand how electronics work, and enjoy debugging, coding and/or solving technical problems? Here's your chance to innovate for the future! Applications Engineer Interns at Texas Instruments (TI) are technical experts who are focused on leading-edge digital, mixed signal and analog products. We have a strong customer commitment and a great team spirit. If you are looking for an interesting and challenging position with a wide range of exciting responsibilities, you've come to the right place. In this position, you'll work directly with TI customers to determine their major design challenges and partner with them on creating solutions that focus on ease-of-use and add value to their solution. You may also spend hands-on time in a TI lab tackling problems and delivering innovative development solutions that support our products and drive revenue. Some of your responsibilities will include, but are not limited to: Working with design, marketing, sales, and product definition teams to successfully launch new products into the market Promoting TI products and providing appropriate technical solutions to customers to solve their design challenges Providing technical support to customers by reviewing designs, debugging problems, and answering questions Supporting the customer's technical seminars and distributor training sessions Put your talent to work with us as an Applications Engineer Intern ! Texas Instruments will not sponsor job applicants for visas or work authorization for this position. Qualifications Minimum Requirements: Pursuing a Bachelors degree in Electrical Engineering, Electronics Technology, Bio-Medical Engineering, Electrical Engineering Technology, Electrical and Computer Engineering or related field Cumulative 3.0/4.0 GPA or higher Basic understanding of schematics, layouts and digital components Knowledge and understanding of analog circuitry (examples include: op-amps, DC/DC power, data converters, sensing, etc.) Preferred Qualifications: Experience with lab equipment such as oscilloscopes, along with soldering and debugging skills Programming skills in C/C++ (LabView recommended) Demonstrated strong analytical and problem solving skills Excellent communication and presentation skills Ability to work in teams and collaborate effectively with people in different functions Strong time management skills that enable on-time project delivery Ability to build lasting, influential relationships, both inside and outside the organization Ability to work effectively in a fast-paced and ever-changing environment Ability to take initiative and drive for results Ability to influence decisions through a sense of urgency and competitive drive
    $54k-83k yearly est. Auto-Apply 60d+ ago
  • Design Engineer Intern (Summer 2026)

    Cadence 4.7company rating

    San Jose, CA jobs

    At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Design Engineering Intern The Cadence Tensilica CPU Processor Team is seeing rapid adoption of our industry leading processor cores and DSP's. Our configurable and extensible processor cores are poised to meet the demands of intelligent IoT Devices at the edge of ML/AI Applications. We are already empowering many of the top chip and system companies with our Audio, Speech, AR/VR, ADAS, Vision and Imaging applications being driven with our processor cores. Today Cadence is shipping an astounding 8 Billion processor cores annually and expanding into intelligent system design and development. Cadence Tensilica CPU Processor Team is hiring students to join our R&D teams in San Jose and Austin. This is an amazing opportunity to work as a an engineering intern at a world leader in computational software, semiconductor design IP, and system verification hardware. Our customers are the world's most innovative companies, delivering extraordinary electronic products from chips to boards to complete systems for the most dynamic market applications including hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial, and healthcare. Come be part of this great Processor team where you can make an impact that is visible. Perform as a member of the Logic Design Team for Xtensa processors. Responsible for the RTL implementation of microprocessor cores, multiprocessor sub-systems and their peripherals. Implement the micro-architecture in Verilog RTL, simulate and debug its functions and run synthesis, place & route and other Electronic Design Automation scripts to meet timing, area, and power goals. Assist with developing test plans; writing functional diagnostics; debugging failures; and analyzing coverage information. Work closely with various Design Verification and Electronic Design Automation teams. Position Requirements: * Currently enrolled in MS/BS major as Electrical Engineering, Computer Engineering, or equivalent. * Deep understanding of Digital Design and/or Design Verification Fundamentals * Excellent automation skills using Tcl, Perl, shell scripting * Excellent oral and written communications skills * Exposure to design automation tools is a plus We're doing work that matters. Help us solve what others can't.
    $83k-134k yearly est. Auto-Apply 1d ago
  • Design Engineer Intern (Summer 2026)

    Cadence Design Systems, Inc. 4.7company rating

    San Jose, CA jobs

    At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Design Engineering InternThe Cadence Tensilica CPU Processor Team is seeing rapid adoption of our industry leading processor cores and DSP's. Our configurable and extensible processor cores are poised to meet the demands of intelligent IoT Devices at the edge of ML/AI Applications. We are already empowering many of the top chip and system companies with our Audio, Speech, AR/VR, ADAS, Vision and Imaging applications being driven with our processor cores. Today Cadence is shipping an astounding 8 Billion processor cores annually and expanding into intelligent system design and development.Cadence Tensilica CPU Processor Team is hiring students to join our R&D teams in San Jose and Austin. This is an amazing opportunity to work as a an engineering intern at a world leader in computational software, semiconductor design IP, and system verification hardware. Our customers are the world's most innovative companies, delivering extraordinary electronic products from chips to boards to complete systems for the most dynamic market applications including hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial, and healthcare.Come be part of this great Processor team where you can make an impact that is visible. Perform as a member of the Logic Design Team for Xtensa processors. Responsible for the RTL implementation of microprocessor cores, multiprocessor sub-systems and their peripherals. Implement the micro-architecture in Verilog RTL, simulate and debug its functions and run synthesis, place & route and other Electronic Design Automation scripts to meet timing, area, and power goals. Assist with developing test plans; writing functional diagnostics; debugging failures; and analyzing coverage information. Work closely with various Design Verification and Electronic Design Automation teams.Position Requirements:- Currently enrolled in MS/BS major as Electrical Engineering, Computer Engineering, or equivalent.- Deep understanding of Digital Design and/or Design Verification Fundamentals- Excellent automation skills using Tcl, Perl, shell scripting- Excellent oral and written communications skills- Exposure to design automation tools is a plus We're doing work that matters. Help us solve what others can't. Additional Jobs (************************************************* Equal Employment Opportunity Policy: Cadence is committed to equal employment opportunity throughout all levels of the organization. + Read the policy(opens in a new tab) (******************************************************************************************************************************** We welcome your interest in the company and want to make sure our job site is accessible to all. If you experience difficulty using this site or to request a reasonable accommodation, please contact ********************. Privacy Policy: Job Applicant If you are a job seeker creating a profile using our careers website, please see the privacy policy(opens in a new tab) (**************************************************************** . E-Verify Cadence participates in the E-Verify program in certain U.S. locations as required by law. Download More Information on E-Verify (64K) (************************************************************************************************************************** Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world's toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence. Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class. Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.
    $83k-134k yearly est. 2d ago
  • Intern - Design Engineer

    Micron Technology, Inc. 4.3company rating

    San Jose, CA jobs

    Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Department Intro Micron's Design Engineering team develops innovative silicon-to-systems solutions, from advanced memory designs to product development and validation. We deliver elite memory solutions by integrating technology development, design, and system-level optimization. Position Overview As a Design Engineer, you will develop and analyze digital and analog circuits for memory products. This role involves collaboration with global design and verification teams and multi-functional groups to ensure manufacturability, cost efficiency, quality, and time-to-market. Responsibilities * Design, layout, and optimize Memory/Logic/Analog circuits for new product opportunities. * Perform parasitic modeling, design validation, reticle experiments, and tape-out revisions. * Manage layout processes including floor-planning, placement, and routing. * Conduct verification using modeling and simulation tools. * Collaborate with multi-functional teams (Marketing, Probe, Assembly, Test, Process Integration, Product Engineering) to ensure manufacturability. * Drive innovation for future memory generations in a dynamic environment. Minimum Qualifications * Bachelor's degree or equivalent experience in Electrical Engineering or related field. * Proficiency in circuit creation, arrangement, and verification using industry-standard simulators. * Experience with parasitic modeling and reticle tape-out processes. * Strong collaboration and communication skills across global teams. Preferred Qualifications * Master's degree or equivalent experience in Electrical Engineering or related technical field. * Experience with advanced memory design and optimization techniques. * Familiarity with CAD tools, standards, and modeling methodologies. * Proven ability to innovate and contribute to next-generation memory technologies. * Excellent organizational and problem-solving skills. The US base salary range that Micron Technology estimates it could pay for this full-time position is: $40.62 - $40.62 Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target for new hire salaries of the position across all US locations. Within the range, individual pay is determined by work location and additional job-related factors, including knowledge, skills, experience, tenure and relevant education or training. The pay scale is subject to change depending on business needs. Your recruiter can share more about the specific salary range for your preferred location during the hiring process. Additional compensation may include benefits, discretionary bonuses and equity. As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits. Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws. To learn about your right to work click here. To learn more about Micron, please visit micron.com/careers US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron's People Organization at hrsupport_************* or ************** (select option #3) Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron. AI alert: Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification. Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.
    $70k-95k yearly est. 20d ago
  • Senior Principal Power/Hardware Design Engineer - Emulation Acceleration Technologies

    Cadence Design Systems, Inc. 4.7company rating

    San Jose, CA jobs

    At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence is the leader in hardware emulation-acceleration technologies and products. Looking for a hands-on Sr Principal Power/HW Design Engineer who wants to expand their scope, and grow their career. This position is located in our San Jose headquarter office, reports to the Engineering Group Director of R&D, and works in a growing talented organization. Our emulation-acceleration system platform is the most advanced industry-leading configurable scalable system, generation after generation, used in labs and datacenters. This position requires to do power system design, schematic entry, work with layout engineers to do PCB layout, bring-up and sustain the current hardware system platform. Key responsibilities + Responsible for the power design, bring-up and sustain of hardware system platform. + This person is required to work with mechanical team on design of power delivery within rack. + A power design engineer to write specifications for PDU, and PSU and work with outside vendors to design PDU, and PSU + A power design engineer with extensive experience on designing, testing, and verifying power solutions (LDOs, Switchers, buck convertors, ...) for boards. + A power design engineer with extensive experience on designing, testing, and verifying power solutions for rack power. + Continuously develop and apply technical domain expertise in Hardware Engineering. Maintain a strong, high level of competence in Electrical engineering to promote the incorporation of relevant technology into products and/or processes; and provide leadership and guidance to junior technical staff members. + Strong technical domain expertise in Electrical Engineering principles, concepts, and methods, and global standards compliance in order to work through technical issues of design integrity, manufacturability, and quality issues mitigation. Qualifications + BS with a minimum of 10 years of experience OR MS with a minimum of 7 years of experience OR PhD with a minimum of 5 years of experience + Demonstrated leader in guiding junior HW engineers. + Proven success in taking at least one system product from concept to production. + Experience with schematic capture software + Good communication especially in creation of plans and reports. + Familiarity with volume manufacturing methods and processes is a plus. + Ability to lead and contribute to cross-functional teams, demonstrate good interpersonal skills, be able to operate independently and multiplex your time between many diverse tasks. The annual salary range for California is $154,000 to $286,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more. We're doing work that matters. Help us solve what others can't. Additional Jobs (************************************************* Equal Employment Opportunity Policy: Cadence is committed to equal employment opportunity throughout all levels of the organization. + Read the policy(opens in a new tab) (******************************************************************************************************************************** We welcome your interest in the company and want to make sure our job site is accessible to all. If you experience difficulty using this site or to request a reasonable accommodation, please contact ********************. Privacy Policy: Job Applicant If you are a job seeker creating a profile using our careers website, please see the privacy policy(opens in a new tab) (**************************************************************** . E-Verify Cadence participates in the E-Verify program in certain U.S. locations as required by law. Download More Information on E-Verify (64K) (************************************************************************************************************************** Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world's toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence. Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class. Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.
    $154k-286k yearly 60d+ ago
  • Engineering Technician Intern

    Texas Instruments 4.6company rating

    San Jose, CA jobs

    Change the world. Love your job. Texas Instruments is seeking a skilled Engineering Technician intern to join our team. In this role, you will be responsible for technical functions in support of product development lab engineering activities such as design, test, modification, fabrication, assembly, characterization, functional validation, and electrical analysis of prototype electro-mechanical systems, experimental design circuitry, specialized test equipment, and/or IC devices. You will use test and diagnostic equipment, schematics, diagrams, written and verbal descriptions, layouts and/or defined plans to perform operational testing, checkout, and fault isolation on systems and equipment. Engineering Technicians will also conducts engineering tests and detailed experimental testing to collect design data or assist in research work as well as maintains lab processes and documentation in accordance with IATF 16949. Qualifications Minimum requirements: High School diploma/GED 18 years of age or older Currently enrolled in a Technical Certificate or Associates Degree Program in Electrical/Electronic Technology, Electromechanical Technology, Instrumentation Technology, Automated Industrial Technology, Robotics and Controls Technology, Nanoengineering and Nanotechnology, Electron Microscopy or related electronics field Preferred qualifications: Self-driven with ability to coordinate and manage multiple tasks with minimal supervision Capable of multitasking, prioritizing, and working under various distractions and constraints Ability to learn and understand electro-mechanical systems Outstanding troubleshooting skills on electrical/mechanical systems Exceptional attention to detail - Experience with bench and automated test equipment Experience with soldering - Proficient with MS Office, Word, Excel, and PowerPoint Excellent verbal and written communication skills Ability to work in teams and collaborate effectively with people in different functions Strong time management skills that enable on-time project delivery Good listener and excellent verbal and written communication skills
    $45k-57k yearly est. Auto-Apply 60d+ ago

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