Architect jobs at Lam Research - 52 jobs

KLA is a global leader in diversified electronics for the semiconductor manufacturing ecosystem. Virtually every electronic device in the world is produced using our technologies. No laptop, smartphone, wearable device, voice-controlled gadget, flexible screen, VR device or smart car would have made it into your hands without us. KLA invents systems and solutions for the manufacturing of wafers and reticles, integrated circuits, packaging, printed circuit boards and flat panel displays. The innovative ideas and devices that are advancing humanity all begin with inspiration, research and development. KLA focuses more than average on innovation and we invest 15% of sales back into R&D. Our expert teams of physicists, engineers, data scientists and problem-solvers work together with the world's leading technology providers to accelerate the delivery of tomorrow's electronic devices. Life here is exciting and our teams thrive on tackling really hard problems. There is never a dull moment with us. Job Description/Preferred Qualifications Principal Electron Optics Design and Architect are core to KLA's technology, while we do not currently have an opening, we are always building our Principal Electron Optics Design and Architect talent community, we are interested in learning about your background. Apply to this posting for Future Opportunities with KLA. Our dynamic e-beam technology team is seeking a leading expert in electron optics design and architecture to refine current technologies and orchestrate the development of next-generation solutions. In this role, you will dive into the design, simulation, and optimization for innovative electron optics systems. You will be at the forefront of technological advancements, driving impactful projects that shape the future of our industry. If you're passionate about making a difference and leading the charge, we want to hear from you! Responsibilities * Design and architect scanning electron microscope systems. * Develop and/or provide significant input to top-level systems specifications, sub-system error budget, interfaces, working parameters, and test plans for optimum hardware solution. * Stay up to date on related external research and development. * Collaborate to implement designs and develop new suppliers when appropriate. * Present and report findings to internal customers. * Occasional travel for vendor or customer engagement. Qualifications * Doctorate (Academic) Degree in Physics, Mathematics, Electrical/Computer Engineering or similar field with at least 10+ years related work experience. * Deep expertise in electron optics including electron sources, column design, deflectors, lenses, and the tolerancing of complex optical systems. * Extensive knowledge of high-voltage electronics, ultra-high vacuum systems, and surface science relating to electron-surface interactions. * Must have a strong background (10+ years) in designing high-resolution scanning electron microscopes with a proven track record of several successful product releases. * Proficiency with electron optics simulation tools (e.g. charged particle tracking code, Munro's Electron Beam Software (MEBS), finite element software packages such as OPERA, ANSYS or COMSOL). * Proficiency with a scripting language (e.g. Matlab, Python, or C++). * Self-starter with good interpersonal skills * Excellent communication and presentation skills. Minimum Qualifications Doctorate (Academic) Degree and related work experience of 8 years; Master's Level Degree and related work experience of 12 years; Bachelor's Level Degree and related work experience of 15 years Base Pay Range: $174,500.00 - $305,400.00 Primary Location: USA-CA-Milpitas-KLA KLA's total rewards package for employees may also include participation in performance incentive programs and eligibility for additional benefits including but not limited to: medical, dental, vision, life, and other voluntary benefits, 401(K) including company matching, employee stock purchase program (ESPP), student debt assistance, tuition reimbursement program, development and career growth opportunities and programs, financial planning benefits, wellness benefits including an employee assistance program (EAP), paid time off and paid company holidays, and family care and bonding leave. Interns are eligible for some of the benefits listed. Our pay ranges are determined by role, level, and location. The range displayed reflects the pay for this position in the primary location identified in this posting. Actual pay depends on several factors, including state minimum pay wage rates, location, job-related skills, experience, and relevant education level or training. We are committed to complying with all applicable federal and state minimum wage requirements where applicable. If applicable, your recruiter can share more about the specific pay range for your preferred location during the hiring process. KLA is proud to be an Equal Opportunity Employer. We will ensure that qualified individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us at ************************** or at *************** to request accommodation. Be aware of potentially fraudulent job postings or suspicious recruiting activity by persons that are currently posing as KLA employees. KLA never asks for any financial compensation to be considered for an interview, to become an employee, or for equipment. Further, KLA does not work with any recruiters or third parties who charge such fees either directly or on behalf of KLA. Please ensure that you have searched KLA's Careers website for legitimate job postings. KLA follows a recruiting process that involves multiple interviews in person or on video conferencing with our hiring managers. If you are concerned that a communication, an interview, an offer of employment, or that an employee is not legitimate, please send an email to ************************** to confirm the person you are communicating with is an employee. We take your privacy very seriously and confidentially handle your information.

We are seeking a Photomask Design Architect to join our innovative Mask Design team in San Jose, CA. In this critical role, you will be responsible for designing and optimizing photomasks for Wafer Development and Manufacturing based on electrical/ optical/ magnetic design specifications and process requirements, including post-wafer processing. * Design photomasks for magnetic HDD head wafers to enable technology leadership and on-time new product launch * Engage with wafer process integration & photo-lithography teams to define mask sequences (wafer alignment tree) and metrology requirements for new processes, new designs, and assure the electrical integrity of the head build * Define new wafer formats and wafer technology platforms. Interlock with wafer, slider, HGA, and staging teams to define electrical configuration, pad orientation/ assignments * Work with post-wafer teams to design ELG's, alignment marks for new product requirements to enable strategic roadmaps * Collaborate with cross-functional teams to optimize mask designs for manufacturability, high yields, and process robustness; engage in F/A activities * Maintain design rule decks for various wafer formats, head design, test structure and other wafer features * Interface with mask vendors to assure mask quality and delivery time reduction; enable multiple suppliers when possible * Provide technical guidance and mentorship to junior team members * Contribute to the development of new photomask design methodologies, best practices and automation Qualifications * Master's degree in Physics/ Chemistry/ Engineering. * 10+ years of experience in wafer process integration, photolithography and/or mask design * Experience with HDD head wafer products is needed * Prior work history within WD is preferred * Strong analytical skills for interpreting electrical, optical, and magnetic design requirements, data analysis * Exceptional attention to detail and precision in design work * Excellent project management and problem-solving abilities in a complex technical and fast-paced environment * Effective communication and collaboration skills; team player Additional Information Western Digital is committed to providing equal opportunities to all applicants and employees and will not discriminate based on their race, color, ancestry, religion (including religious dress and grooming standards), sex (including pregnancy, childbirth or related medical conditions, breastfeeding or related medical conditions), gender (including a person's gender identity, gender expression, and gender-related appearance and behavior, whether or not stereotypically associated with the person's assigned sex at birth), age, national origin, sexual orientation, medical condition, marital status (including domestic partnership status), physical disability, mental disability, medical condition, genetic information, protected medical and family care leave, Civil Air Patrol status, military and veteran status, or other legally protected characteristics. We also prohibit harassment of any individual on any of the characteristics listed above. Our non-discrimination policy applies to all aspects of employment. We comply with the laws and regulations set forth in the Equal Employment Opportunity is the Law poster. Western Digital thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. Western Digital is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at *********************** to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying. #L1-RR1 Compensation & Benefits Details * An employee's pay position within the salary range may be based on several factors including but not limited to (1) relevant education; qualifications; certifications; and experience; (2) skills, ability, knowledge of the job; (3) performance, contribution and results; (4) geographic location; (5) shift; (6) internal and external equity; and (7) business and organizational needs. * The salary range is what we believe to be the range of possible compensation for this role at the time of this posting. We may ultimately pay more or less than the posted range and this range is only applicable for jobs to be performed in California, Colorado, New York or remote jobs that can be performed in California, Colorado and New York. This range may be modified in the future. * If your position is non-exempt, you are eligible for overtime pay pursuant to company policy and applicable laws. You may also be eligible for shift differential pay, depending on the shift to which you are assigned. * You will be eligible to be considered for bonuses under either Western Digital's Short Term Incentive Plan ("STI Plan") or the Sales Incentive Plan ("SIP") which provides incentive awards based on Company and individual performance, depending on your role and your performance. You may be eligible to participate in our annual Long-Term Incentive (LTI) program, which consists of restricted stock units (RSUs) or cash equivalents, pursuant to the terms of the LTI plan. Please note that not all roles are eligible to participate in the LTI program, and not all roles are eligible for equity under the LTI plan. RSU awards are also available to eligible new hires, subject to Western Digital's Standard Terms and Conditions for Restricted Stock Unit Awards. * We offer a comprehensive package of benefits including paid vacation time; paid sick leave; medical/dental/vision insurance; life, accident and disability insurance; tax-advantaged flexible spending and health savings accounts; employee assistance program; other voluntary benefit programs such as supplemental life and AD&D, legal plan, pet insurance, critical illness, accident and hospital indemnity; tuition reimbursement; transit; the Applause Program; employee stock purchase plan; and the Western Digital Savings 401(k) Plan. * Note: No amount of pay is considered to be wages or compensation until such amount is earned, vested, and determinable. The amount and availability of any bonus, commission, benefits, or any other form of compensation and benefits that are allocable to a particular employee remains in the Company's sole discretion unless and until paid and may be modified at the Company's sole discretion, consistent with the law. Notice To Candidates: Please be aware that Western Digital and its subsidiaries will never request payment as a condition for applying for a position or receiving an offer of employment. Should you encounter any such requests, please report it immediately to Western Digital Ethics Helpline or email ******************.

At Western Digital, our vision is to power global innovation and push the boundaries of technology to make what you thought was once impossible, possible. At our core, Western Digital is a company of problem solvers. People achieve extraordinary things given the right technology. For decades, we've been doing just that. Our technology helped people put a man on the moon. We are a key partner to some of the largest and highest growth organizations in the world. From energizing the most competitive gaming platforms, to enabling systems to make cities safer and cars smarter and more connected, to powering the data centers behind many of the world's biggest companies and public cloud, Western Digital is fueling a brighter, smarter future. Binge-watch any shows, use social media or shop online lately? You'll find Western Digital supporting the storage infrastructure behind many of these platforms. And, that flash memory card that captures and preserves your most precious moments? That's us, too. We offer an expansive portfolio of technologies, storage devices and platforms for business and consumers alike. Our data-centric solutions are comprised of the Western Digital , G-Technology™, SanDisk and WD brands. Today's exceptional challenges require your unique skills. It's You & Western Digital. Together, we're the next BIG thing in data. Job Description We are seeking a Photomask Design Architect to join our innovative Mask Design team in San Jose, CA. In this critical role, you will be responsible for designing and optimizing photomasks for Wafer Development and Manufacturing based on electrical/ optical/ magnetic design specifications and process requirements, including post-wafer processing. Design photomasks for magnetic HDD head wafers to enable technology leadership and on-time new product launch Engage with wafer process integration & photo-lithography teams to define mask sequences (wafer alignment tree) and metrology requirements for new processes, new designs, and assure the electrical integrity of the head build Define new wafer formats and wafer technology platforms. Interlock with wafer, slider, HGA, and staging teams to define electrical configuration, pad orientation/ assignments Work with post-wafer teams to design ELG's, alignment marks for new product requirements to enable strategic roadmaps Collaborate with cross-functional teams to optimize mask designs for manufacturability, high yields, and process robustness; engage in F/A activities Maintain design rule decks for various wafer formats, head design, test structure and other wafer features Interface with mask vendors to assure mask quality and delivery time reduction; enable multiple suppliers when possible Provide technical guidance and mentorship to junior team members Contribute to the development of new photomask design methodologies, best practices and automation Qualifications Master's degree in Physics/ Chemistry/ Engineering. 10+ years of experience in wafer process integration, photolithography and/or mask design Experience with HDD head wafer products is needed Prior work history within WD is preferred Strong analytical skills for interpreting electrical, optical, and magnetic design requirements, data analysis Exceptional attention to detail and precision in design work Excellent project management and problem-solving abilities in a complex technical and fast-paced environment Effective communication and collaboration skills; team player Additional Information Western Digital is committed to providing equal opportunities to all applicants and employees and will not discriminate based on their race, color, ancestry, religion (including religious dress and grooming standards), sex (including pregnancy, childbirth or related medical conditions, breastfeeding or related medical conditions), gender (including a person's gender identity, gender expression, and gender-related appearance and behavior, whether or not stereotypically associated with the person's assigned sex at birth), age, national origin, sexual orientation, medical condition, marital status (including domestic partnership status), physical disability, mental disability, medical condition, genetic information, protected medical and family care leave, Civil Air Patrol status, military and veteran status, or other legally protected characteristics. We also prohibit harassment of any individual on any of the characteristics listed above. Our non-discrimination policy applies to all aspects of employment. We comply with the laws and regulations set forth in the Equal Employment Opportunity is the Law poster. Western Digital thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. Western Digital is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at [email protected] to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying. #L1-RR1 Compensation & Benefits Details An employee's pay position within the salary range may be based on several factors including but not limited to (1) relevant education; qualifications; certifications; and experience; (2) skills, ability, knowledge of the job; (3) performance, contribution and results; (4) geographic location; (5) shift; (6) internal and external equity; and (7) business and organizational needs. The salary range is what we believe to be the range of possible compensation for this role at the time of this posting. We may ultimately pay more or less than the posted range and this range is only applicable for jobs to be performed in California, Colorado, New York or remote jobs that can be performed in California, Colorado and New York. This range may be modified in the future. If your position is non-exempt, you are eligible for overtime pay pursuant to company policy and applicable laws. You may also be eligible for shift differential pay, depending on the shift to which you are assigned. You will be eligible to be considered for bonuses under either Western Digital's Short Term Incentive Plan (“STI Plan”) or the Sales Incentive Plan (“SIP”) which provides incentive awards based on Company and individual performance, depending on your role and your performance. You may be eligible to participate in our annual Long-Term Incentive (LTI) program, which consists of restricted stock units (RSUs) or cash equivalents, pursuant to the terms of the LTI plan. Please note that not all roles are eligible to participate in the LTI program, and not all roles are eligible for equity under the LTI plan. RSU awards are also available to eligible new hires, subject to Western Digital's Standard Terms and Conditions for Restricted Stock Unit Awards. We offer a comprehensive package of benefits including paid vacation time; paid sick leave; medical/dental/vision insurance; life, accident and disability insurance; tax-advantaged flexible spending and health savings accounts; employee assistance program; other voluntary benefit programs such as supplemental life and AD&D, legal plan, pet insurance, critical illness, accident and hospital indemnity; tuition reimbursement; transit; the Applause Program; employee stock purchase plan; and the Western Digital Savings 401(k) Plan. Note: No amount of pay is considered to be wages or compensation until such amount is earned, vested, and determinable. The amount and availability of any bonus, commission, benefits, or any other form of compensation and benefits that are allocable to a particular employee remains in the Company's sole discretion unless and until paid and may be modified at the Company's sole discretion, consistent with the law. Notice To Candidates: Please be aware that Western Digital and its subsidiaries will never request payment as a condition for applying for a position or receiving an offer of employment. Should you encounter any such requests, please report it immediately to Western Digital Ethics Helpline or email [email protected].

KLA is a global leader in diversified electronics for the semiconductor manufacturing ecosystem. Virtually every electronic device in the world is produced using our technologies. No laptop, smartphone, wearable device, voice-controlled gadget, flexible screen, VR device or smart car would have made it into your hands without us. KLA invents systems and solutions for the manufacturing of wafers and reticles, integrated circuits, packaging, printed circuit boards and flat panel displays. The innovative ideas and devices that are advancing humanity all begin with inspiration, research and development. KLA focuses more than average on innovation and we invest 15% of sales back into R&D. Our expert teams of physicists, engineers, data scientists and problem-solvers work together with the world's leading technology providers to accelerate the delivery of tomorrow's electronic devices. Life here is exciting and our teams thrive on tackling really hard problems. There is never a dull moment with us. Group/Division With over 40 years of semiconductor process control experience, chipmakers around the globe rely on KLA to ensure that their fabs ramp next-generation devices to volume production quickly and cost-effectively. Enabling the movement towards advanced chip design, KLA's Global Products Group (GPG), which is responsible for creating all of KLA's metrology and inspection products, is looking for the best and the brightest research scientist, software engineers, application development engineers, and senior product technology process engineers. The Film and Scatterometry Technology (FaST) Division provides industry leading metrology solutions for worldwide semiconductor IC manufacturers. The FaST Division portfolio of metrology products includes hardware and software solutions for optical film thickness, optical critical dimension (CD), composition, and resistivity measurement systems. These products are essential for the IC manufacturers as they provide critical metrology capabilities for the development and implementation of their advanced IC processes. The FaST division is committed to support our customers to achieve performance entitlement of our solution and we effectively partner with our customers from their early research and development phase to the high volume in-line manufacturing implementation specific for their process needs. The division consists of a global team located in US, Israel, China, and India. Job Description/Preferred Qualifications Overview We are seeking a Senior Algorithm Software Architect to lead design and delivery of GPU‑accelerated, high‑performance computing software. You will set architectural direction, coach engineers, and partner with product and domain experts to deliver scalable, reliable systems for large‑scale compute and data workflows. Responsibilities * Own the end‑to‑end software architecture for HPC/GPU platforms (services, libraries, data pipelines, deployment) * Lead technical strategy, decision records, define candidate architectures, lead design reviews and drive decisions; drive clear trade‑offs for performance, reliability, and maintainability * Design and implement GPU kernels and frameworks (e.g., CUDA, OpenCL, NCCL), optimizing for throughput, latency, and memory use * Guide parallel and distributed computing patterns (MPI, multi‑GPU scaling, heterogeneous compute) * Establish performance engineering practices: profiling, benchmarking, regression performance gates (Nsight Systems/Compute, nvprof) * Collaborate across functions; convert requirements into clear technical plans, roadmaps, and measurable outcomes * Uphold engineering excellence: coding standards, code reviews, test strategies, observability, security considerations * Mentor engineers; provide technical leadership on design, delivery, and career growth. * Communicate architecture, risks, and status to executives and stakeholders with clarity and candor. Qualifications * 10+ years in software engineering; 5+ years in software architecture for HPC or large‑scale systems * Expert in C++ (17/20) and one scripting language (Python preferred) * GPU programming expertise (CUDA, OpenCL); strong knowledge of GPU memory hierarchies, streams, occupancy * Hands‑on with parallel/distributed stacks (MPI, NCCL, gRPC) and Linux performance tooling * Experience with cluster orchestration (Slurm, Kubernetes), CI/CD, and containerization (Docker) * Track record of technical leadership and exceptional communication with cross‑functional teams. Preferred / Nice‑to‑Have * Multi‑node, multi‑GPU scaling; mixed precision; numerical methods and algorithms. * Experience with H200/H100/A100/L40S‑class accelerators and modern profiling workflows. Minimum Qualifications Doctorate (Academic) Degree and related work experience of 3 years; Master's Level Degree and related work experience of 6 years; Bachelor's Level Degree and related work experience of 8 years Base Pay Range: $159,500.00 - $271,200.00 Annually Primary Location: USA-CA-Milpitas-KLA KLA's total rewards package for employees may also include participation in performance incentive programs and eligibility for additional benefits including but not limited to: medical, dental, vision, life, and other voluntary benefits, 401(K) including company matching, employee stock purchase program (ESPP), student debt assistance, tuition reimbursement program, development and career growth opportunities and programs, financial planning benefits, wellness benefits including an employee assistance program (EAP), paid time off and paid company holidays, and family care and bonding leave. Interns are eligible for some of the benefits listed. Our pay ranges are determined by role, level, and location. The range displayed reflects the pay for this position in the primary location identified in this posting. Actual pay depends on several factors, including state minimum pay wage rates, location, job-related skills, experience, and relevant education level or training. We are committed to complying with all applicable federal and state minimum wage requirements where applicable. If applicable, your recruiter can share more about the specific pay range for your preferred location during the hiring process. KLA is proud to be an Equal Opportunity Employer. We will ensure that qualified individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us at ************************** or at *************** to request accommodation. Be aware of potentially fraudulent job postings or suspicious recruiting activity by persons that are currently posing as KLA employees. KLA never asks for any financial compensation to be considered for an interview, to become an employee, or for equipment. Further, KLA does not work with any recruiters or third parties who charge such fees either directly or on behalf of KLA. Please ensure that you have searched KLA's Careers website for legitimate job postings. KLA follows a recruiting process that involves multiple interviews in person or on video conferencing with our hiring managers. If you are concerned that a communication, an interview, an offer of employment, or that an employee is not legitimate, please send an email to ************************** to confirm the person you are communicating with is an employee. We take your privacy very seriously and confidentially handle your information.

KLA is a global leader in diversified electronics for the semiconductor manufacturing ecosystem. Virtually every electronic device in the world is produced using our technologies. No laptop, smartphone, wearable device, voice-controlled gadget, flexible screen, VR device or smart car would have made it into your hands without us. KLA invents systems and solutions for the manufacturing of wafers and reticles, integrated circuits, packaging, printed circuit boards and flat panel displays. The innovative ideas and devices that are advancing humanity all begin with inspiration, research and development. KLA focuses more than average on innovation and we invest 15% of sales back into R&D. Our expert teams of physicists, engineers, data scientists and problem-solvers work together with the world's leading technology providers to accelerate the delivery of tomorrow's electronic devices. Life here is exciting and our teams thrive on tackling really hard problems. There is never a dull moment with us. Group/Division With over 40 years of semiconductor process control experience, chipmakers around the globe rely on KLA to ensure that their fabs ramp next-generation devices to volume production quickly and cost-effectively. Enabling the movement towards advanced chip design, KLA's Global Products Group (GPG), which is responsible for creating all of KLA's metrology and inspection products, is looking for the best and the brightest research scientist, software engineers, application development engineers, and senior product technology process engineers. The Film and Scatterometry Technology (FaST) Division provides industry leading metrology solutions for worldwide semiconductor IC manufacturers. The FaST Division portfolio of metrology products includes hardware and software solutions for optical film thickness, optical critical dimension (CD), composition, and resistivity measurement systems. These products are essential for the IC manufacturers as they provide critical metrology capabilities for the development and implementation of their advanced IC processes. The FaST division is committed to support our customers to achieve performance entitlement of our solution and we effectively partner with our customers from their early research and development phase to the high volume in-line manufacturing implementation specific for their process needs. The division consists of a global team located in US, Israel, China, and India. Job Description/Preferred Qualifications Overview We are seeking a Senior Algorithm Software Architect to lead design and delivery of GPU‑accelerated, high‑performance computing software. You will set architectural direction, coach engineers, and partner with product and domain experts to deliver scalable, reliable systems for large‑scale compute and data workflows. Responsibilities Own the end‑to‑end software architecture for HPC/GPU platforms (services, libraries, data pipelines, deployment) Lead technical strategy, decision records, define candidate architectures, lead design reviews and drive decisions; drive clear trade‑offs for performance, reliability, and maintainability Design and implement GPU kernels and frameworks (e.g., CUDA, OpenCL, NCCL), optimizing for throughput, latency, and memory use Guide parallel and distributed computing patterns (MPI, multi‑GPU scaling, heterogeneous compute) Establish performance engineering practices: profiling, benchmarking, regression performance gates (Nsight Systems/Compute, nvprof) Collaborate across functions; convert requirements into clear technical plans, roadmaps, and measurable outcomes Uphold engineering excellence: coding standards, code reviews, test strategies, observability, security considerations Mentor engineers; provide technical leadership on design, delivery, and career growth. Communicate architecture, risks, and status to executives and stakeholders with clarity and candor. Qualifications 10+ years in software engineering; 5+ years in software architecture for HPC or large‑scale systems Expert in C++ (17/20) and one scripting language (Python preferred) GPU programming expertise (CUDA, OpenCL); strong knowledge of GPU memory hierarchies, streams, occupancy Hands‑on with parallel/distributed stacks (MPI, NCCL, gRPC) and Linux performance tooling Experience with cluster orchestration (Slurm, Kubernetes), CI/CD, and containerization (Docker) Track record of technical leadership and exceptional communication with cross‑functional teams. Preferred / Nice‑to‑Have Multi‑node, multi‑GPU scaling; mixed precision; numerical methods and algorithms. Experience with H200/H100/A100/L40S‑class accelerators and modern profiling workflows. Minimum Qualifications Doctorate (Academic) Degree and related work experience of 3 years; Master's Level Degree and related work experience of 6 years; Bachelor's Level Degree and related work experience of 8 years Base Pay Range: $159,500.00 - $271,200.00 AnnuallyPrimary Location: USA-CA-Milpitas-KLAKLA's total rewards package for employees may also include participation in performance incentive programs and eligibility for additional benefits including but not limited to: medical, dental, vision, life, and other voluntary benefits, 401(K) including company matching, employee stock purchase program (ESPP), student debt assistance, tuition reimbursement program, development and career growth opportunities and programs, financial planning benefits, wellness benefits including an employee assistance program (EAP), paid time off and paid company holidays, and family care and bonding leave. Interns are eligible for some of the benefits listed. Our pay ranges are determined by role, level, and location. The range displayed reflects the pay for this position in the primary location identified in this posting. Actual pay depends on several factors, including state minimum pay wage rates, location, job-related skills, experience, and relevant education level or training. We are committed to complying with all applicable federal and state minimum wage requirements where applicable. If applicable, your recruiter can share more about the specific pay range for your preferred location during the hiring process. KLA is proud to be an Equal Opportunity Employer. We will ensure that qualified individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us at ************************** or at *************** to request accommodation. Be aware of potentially fraudulent job postings or suspicious recruiting activity by persons that are currently posing as KLA employees. KLA never asks for any financial compensation to be considered for an interview, to become an employee, or for equipment. Further, KLA does not work with any recruiters or third parties who charge such fees either directly or on behalf of KLA. Please ensure that you have searched KLA's Careers website for legitimate job postings. KLA follows a recruiting process that involves multiple interviews in person or on video conferencing with our hiring managers. If you are concerned that a communication, an interview, an offer of employment, or that an employee is not legitimate, please send an email to ************************** to confirm the person you are communicating with is an employee. We take your privacy very seriously and confidentially handle your information.

KLA is a global leader in diversified electronics for the semiconductor manufacturing ecosystem. Virtually every electronic device in the world is produced using our technologies. No laptop, smartphone, wearable device, voice-controlled gadget, flexible screen, VR device or smart car would have made it into your hands without us. KLA invents systems and solutions for the manufacturing of wafers and reticles, integrated circuits, packaging, printed circuit boards and flat panel displays. The innovative ideas and devices that are advancing humanity all begin with inspiration, research and development. KLA focuses more than average on innovation and we invest 15% of sales back into R&D. Our expert teams of physicists, engineers, data scientists and problem-solvers work together with the world's leading technology providers to accelerate the delivery of tomorrow's electronic devices. Life here is exciting and our teams thrive on tackling really hard problems. There is never a dull moment with us. Group/Division With over 40 years of semiconductor process control experience, chipmakers around the globe rely on KLA to ensure that their fabs ramp next-generation devices to volume production quickly and cost-effectively. Enabling the movement towards advanced chip design, KLA's Global Products Group (GPG), which is responsible for creating all of KLA's metrology and inspection products, is looking for the best and the brightest research scientist, software engineers, application development engineers, and senior product technology process engineers. The Film and Scatterometry Technology (FaST) Division provides industry leading metrology solutions for worldwide semiconductor IC manufacturers. The FaST Division portfolio of metrology products includes hardware and software solutions for optical film thickness, optical critical dimension (CD), composition, and resistivity measurement systems. These products are essential for the IC manufacturers as they provide critical metrology capabilities for the development and implementation of their advanced IC processes. The FaST division is committed to support our customers to achieve performance entitlement of our solution and we effectively partner with our customers from their early research and development phase to the high volume in-line manufacturing implementation specific for their process needs. The division consists of a global team located in US, Israel, China, and India. Job Description/Preferred Qualifications Customer Engagement & Technology Assessment Partner with semiconductor manufacturers to assess their technology roadmaps and process integration challenges. Identify evolving metrology requirements based on industry trends, customer needs, and device scaling roadmaps. Collaborate with customers to define technical specifications and success criteria for new metrology solutions. Solution Definition & Feasibility Analysis Translate customer requirements into clear problem statements and develop conceptual solutions. Lead cross-functional teams to assess the feasibility of different technical approaches, considering performance, cost, and manufacturability. Identify gaps in existing metrology capabilities and define development priorities for next-generation solutions. Development Leadership & Technical Validation Guide R&D, engineering, and applications teams to implement proposed solutions, ensuring alignment with customer needs. Define and oversee validation methodologies for new metrology solutions, including offline and in-fab evaluations. Drive risk assessment and mitigation strategies to ensure robust solution deployment. Customer Site Validation & Deployment Oversee the execution of beta testing and customer site validation to ensure product reliability and performance. Work closely with field teams to troubleshoot and refine solutions based on real-world application feedback. Provide technical guidance and training to customer teams to facilitate adoption of new metrology capabilities. Preferred Qualifications Deep understanding of semiconductor fabrication processes and metrology techniques (e.g., optical, e-beam, AFM, X-ray, etc.). Experience with AI/ML-driven metrology applications. Knowledge of semiconductor process control and fab automation. Familiarity with software-driven metrology solutions and data analytics. Experience developing hardware for semiconductor capital equipment industry. Minimum Qualifications Doctorate (Academic) Degree and related work experience of 5 years; Master's Level Degree and related work experience of 8 years; Bachelor's Level Degree and related work experience of 12 years Base Pay Range: $180,000.00 - $306,000.00 AnnuallyPrimary Location: USA-CA-Milpitas-KLAKLA's total rewards package for employees may also include participation in performance incentive programs and eligibility for additional benefits including but not limited to: medical, dental, vision, life, and other voluntary benefits, 401(K) including company matching, employee stock purchase program (ESPP), student debt assistance, tuition reimbursement program, development and career growth opportunities and programs, financial planning benefits, wellness benefits including an employee assistance program (EAP), paid time off and paid company holidays, and family care and bonding leave. Interns are eligible for some of the benefits listed. Our pay ranges are determined by role, level, and location. The range displayed reflects the pay for this position in the primary location identified in this posting. Actual pay depends on several factors, including state minimum pay wage rates, location, job-related skills, experience, and relevant education level or training. We are committed to complying with all applicable federal and state minimum wage requirements where applicable. If applicable, your recruiter can share more about the specific pay range for your preferred location during the hiring process. KLA is proud to be an Equal Opportunity Employer. We will ensure that qualified individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us at ************************** or at *************** to request accommodation. Be aware of potentially fraudulent job postings or suspicious recruiting activity by persons that are currently posing as KLA employees. KLA never asks for any financial compensation to be considered for an interview, to become an employee, or for equipment. Further, KLA does not work with any recruiters or third parties who charge such fees either directly or on behalf of KLA. Please ensure that you have searched KLA's Careers website for legitimate job postings. KLA follows a recruiting process that involves multiple interviews in person or on video conferencing with our hiring managers. If you are concerned that a communication, an interview, an offer of employment, or that an employee is not legitimate, please send an email to ************************** to confirm the person you are communicating with is an employee. We take your privacy very seriously and confidentially handle your information.

Job Details:Job Description: The Intel NPU IP Architecture team is looking for an AI Frameworks Architect to lead VPU architecture performance modeling and analysis activities. In this position, you will function as a senior technical member in the NPU architecture performance COE (center-of-excellence) team. The primary responsibility of the team includes developing the next generation NPU architecture performance model and conducting performance analysis using models from various benchmarking suites or customer end-to-end use cases. The role's responsibilities include but are not limited to: Define performance model architecture and modeling flow to best reflect the interworking of NPU SW/HW. Implementing and testing performance models with systematic SW development practice. Conduct performance-and-power analysis of various neural network workloads. Utilize the performance data-driven flow to drive the NPU architecture definition. Collaborates with management, product owners, and project managers to evaluate feasibility of requirements and determine priorities for development. Performs pathfinding, surveys technologies, participates in standards committees, and presents at external and internal events. May interact with multiple technologists in the company to influence architectures and optimize/customize software offerings. Qualifications: You must possess the minimum education requirements and minimum required qualifications to be initially considered for this position. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Qualifications could be obtained through a combination of schoolwork, classes, research, and/or relevant previous job and/or internship experiences. Minimum Qualifications Bachelor's Degree in Electrical Engineering, Computer Engineering, or Computer Science or related engineering field with 6+ years of relevant experience - OR - Master's Degree in Electrical Engineering, Computer Engineering, or Computer Science or related engineering field with 4+ years of relevant experience - OR - PhD in Electrical Engineering, Computer Engineering/Computer Science with 2+ years of relevant experience, or related engineering field 6+ years of experience in two or more of the following: Knowledge of computer architecture concepts such as pipelining, caching, parallel computing with SIMD/VLIW, multi-core/multi-threading, data precision, memory hierarchy Understanding HW modeling concepts such as event-driven, concurrency, etc. Knowledge of AI framework, AI models and basic neural computing operations. Knowledge of data precision, floating point vs fixed point computing trade-offs. Preferred Qualifications Experiences for object-oriented programming in C/C++ or Python. Capable of design class objects, data structure and API methods are required. Prior usage of event-driven modeling language (SC/C++/Python) and platforms Prior experience in architecture definition and/or mentoring junior engineers is highly desirable. Job Type:Experienced HireShift:Shift 1 (United States of America) Primary Location: US, California, Santa ClaraAdditional Locations:US, Arizona, Phoenix, US, California, Folsom, US, Oregon, Hillsboro, US, Oregon, PortlandBusiness group:The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel's leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $170,500.00-315,490.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. Work Model for this Role This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

KLA is a global leader in diversified electronics for the semiconductor manufacturing ecosystem. Virtually every electronic device in the world is produced using our technologies. No laptop, smartphone, wearable device, voice-controlled gadget, flexible screen, VR device or smart car would have made it into your hands without us. KLA invents systems and solutions for the manufacturing of wafers and reticles, integrated circuits, packaging, printed circuit boards and flat panel displays. The innovative ideas and devices that are advancing humanity all begin with inspiration, research and development. KLA focuses more than average on innovation and we invest 15% of sales back into R&D. Our expert teams of physicists, engineers, data scientists and problem-solvers work together with the world's leading technology providers to accelerate the delivery of tomorrow's electronic devices. Life here is exciting and our teams thrive on tackling really hard problems. There is never a dull moment with us. Group/Division KLA has always had a close relationship with physics and data. Our optical and electron beam inspection and measurement tools use cutting edge physics models, both for hardware design and as part of their algorithms. AI, including several traditional machine learning techniques and deep learning are routinely used to process this data to meet application requirements. The AI & Modeling Center of Excellence was setup with the mission of advancing KLA's traditional strengths in physics and data and providing implementation solutions for multiple KLA Inspection and Metrology products targeted at the semiconductor manufacturing industry. The AI & Modeling Center of Excellence is part of the company's Central Engineering organization providing product development expertise in a critical area for a wide variety KLA products. As a part of this group, you will be part of a world class team of physicists, HPC system designers, machine learning and application engineers who build cutting edge solutions for modeling complex imaging techniques and semiconductor processes. You will also work with a data scientists and AI infrastructure engineers whose mission is to build and scale machine learning based solutions for our semiconductor customers. We are looking for engineers in a few different fields. If you are passionate about Physics Modeling, High Performance Computing - HPC (including GPU), Machine Learning, Deep Learning, Data Sciences, or cutting-edge Cloud technologies - this is the place for you! Job Description/Preferred Qualifications Are you passionate about building the backbone of AI innovation? Join our team as a Sr. AI Infrastructure Software Engineer and help craft the next-generation software infrastructure that powers groundbreaking AI frameworks like CUDA, TensorFlow, PyTorch, and JAX! This role is ideal for engineers who excel in system-level development and are eager to expand their impact in high-performance computing-driving innovation where complexity meets scale! Key Responsibilities: Architect and implement robust software infrastructure to support AI/ML workloads across multiple frameworks and hardware platforms. Design and optimize system-level components using C, C++, and Python, ensuring high performance, scalability, and maintainability. Collaborate with multi-functional and cross-divisional teams to integrate AI frameworks (e.g., TensorFlow, PyTorch, JAX, ONNX) into a unified development environment. Lead the development of build systems and toolchains using Makefiles, CMake, Clang, and GCC. Stay ahead of modern software and AI trends, and guide the team in adopting standard processes and new technologies. Provide technical leadership and mentorship to junior engineers and chip in to long-term architectural decisions. Required Qualifications: Education & Experience: Advanced degree in Computer Science, Electrical Engineering, or a related field, with a strong background in system-level software development. Programming & Tools: Proficient in C, modern C++, Python, and experienced with Linux development environments. Familiar with build tools (Makefile, CMake), compilers (Clang, GCC), and container technologies (e.g., Kubernetes). Technical Expertise: Deep understanding of software architecture, compiler toolchains, and runtime systems. Experience building infrastructure for AI/ML frameworks or high-performance computing environments. Specialized Skills: Hands-on experience with CUDA, GPU programming, and familiarity with TensorFlow and deep learning model interoperability is a strong plus. multi-functional Impact: Proven track record to develop scalable software infrastructure across multiple divisions or organizations. AI & HPC Knowledge: Strong grasp of modern AI trends, including model optimization, distributed training, and inference acceleration. Communication: Excellent written and verbal communication skills. Preferred Qualifications Experience working with AI accelerators or heterogeneous computing environments. Contributions to open-source AI or systems software projects. Strong collaboration skills, with the ability to influence and align partners across teams and geographies. Minimum Qualifications Doctorate (Academic) Degree and related work experience of 5 years; Master's Level Degree and related work experience of 8 years; Bachelor's Level Degree and related work experience of 12 years Base Pay Range: $180,000.00 - $306,000.00 AnnuallyPrimary Location: USA-CA-Milpitas-KLAKLA's total rewards package for employees may also include participation in performance incentive programs and eligibility for additional benefits including but not limited to: medical, dental, vision, life, and other voluntary benefits, 401(K) including company matching, employee stock purchase program (ESPP), student debt assistance, tuition reimbursement program, development and career growth opportunities and programs, financial planning benefits, wellness benefits including an employee assistance program (EAP), paid time off and paid company holidays, and family care and bonding leave. Interns are eligible for some of the benefits listed. Our pay ranges are determined by role, level, and location. The range displayed reflects the pay for this position in the primary location identified in this posting. Actual pay depends on several factors, including state minimum pay wage rates, location, job-related skills, experience, and relevant education level or training. We are committed to complying with all applicable federal and state minimum wage requirements where applicable. If applicable, your recruiter can share more about the specific pay range for your preferred location during the hiring process. KLA is proud to be an Equal Opportunity Employer. We will ensure that qualified individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us at ************************** or at *************** to request accommodation. Be aware of potentially fraudulent job postings or suspicious recruiting activity by persons that are currently posing as KLA employees. KLA never asks for any financial compensation to be considered for an interview, to become an employee, or for equipment. Further, KLA does not work with any recruiters or third parties who charge such fees either directly or on behalf of KLA. Please ensure that you have searched KLA's Careers website for legitimate job postings. KLA follows a recruiting process that involves multiple interviews in person or on video conferencing with our hiring managers. If you are concerned that a communication, an interview, an offer of employment, or that an employee is not legitimate, please send an email to ************************** to confirm the person you are communicating with is an employee. We take your privacy very seriously and confidentially handle your information.

The Intel NPU IP Architecture team is looking for an AI Frameworks Architect to lead VPU architecture performance modeling and analysis activities. In this position, you will function as a senior technical member in the NPU architecture performance COE (center-of-excellence) team. The primary responsibility of the team includes developing the next generation NPU architecture performance model and conducting performance analysis using models from various benchmarking suites or customer end-to-end use cases. The role's responsibilities include but are not limited to: + Define performance model architecture and modeling flow to best reflect the interworking of NPU SW/HW. + Implementing and testing performance models with systematic SW development practice. + Conduct performance-and-power analysis of various neural network workloads. + Utilize the performance data-driven flow to drive the NPU architecture definition. + Collaborates with management, product owners, and project managers to evaluate feasibility of requirements and determine priorities for development. + Performs pathfinding, surveys technologies, participates in standards committees, and presents at external and internal events. + May interact with multiple technologists in the company to influence architectures and optimize/customize software offerings. **Qualifications:** You must possess the minimum education requirements and minimum required qualifications to be initially considered for this position. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Qualifications could be obtained through a combination of schoolwork, classes, research, and/or relevant previous job and/or internship experiences. **Minimum Qualifications** + Bachelor's Degree in Electrical Engineering, Computer Engineering, or Computer Science or related engineering field with 6+ years of relevant experience - OR - Master's Degree in Electrical Engineering, Computer Engineering, or Computer Science or related engineering field with 4+ years of relevant experience - OR - PhD in Electrical Engineering, Computer Engineering/Computer Science with 2+ years of relevant experience, or related engineering field + 6+ years of experience in two or more of the following: + Knowledge of computer architecture concepts such as pipelining, caching, parallel computing with SIMD/VLIW, multi-core/multi-threading, data precision, memory hierarchy + Understanding HW modeling concepts such as event-driven, concurrency, etc. + Knowledge of AI framework, AI models and basic neural computing operations. + Knowledge of data precision, floating point vs fixed point computing trade-offs. **Preferred Qualifications** + Experiences for object-oriented programming in C/C++ or Python. Capable of design class objects, data structure and API methods are required. + Prior usage of event-driven modeling language (SC/C++/Python) and platforms + Prior experience in architecture definition and/or mentoring junior engineers is highly desirable. **Job Type:** Experienced Hire **Shift:** Shift 1 (United States of America) **Primary Location:** US, California, Santa Clara **Additional Locations:** US, Arizona, Phoenix, US, California, Folsom, US, Oregon, Hillsboro, US, Oregon, Portland **Business group:** The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel's leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences. **Posting Statement:** All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. **Position of Trust** N/A **Benefits** We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel (*********************************************************************************** . Annual Salary Range for jobs which could be performed in the US: $170,500.00-315,490.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. **Work Model for this Role** This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Who We Are Applied Materials is a global leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. We design, build and service cutting-edge equipment that helps our customers manufacture display and semiconductor chips - the brains of devices we use every day. As the foundation of the global electronics industry, Applied enables the exciting technologies that literally connect our world - like AI and IoT. If you want to push the boundaries of materials science and engineering to create next generation technology, join us to deliver material innovation that changes the world. What We Offer Salary: $122,000.00 - $168,000.00 Location: Austin,TX, Santa Clara,CA You'll benefit from a supportive work culture that encourages you to learn, develop, and grow your career as you take on challenges and drive innovative solutions for our customers. We empower our team to push the boundaries of what is possible-while learning every day in a supportive leading global company. Visit our Careers website to learn more. At Applied Materials, we care about the health and wellbeing of our employees. We're committed to providing programs and support that encourage personal and professional growth and care for you at work, at home, or wherever you may go. Learn more about our benefits. Job Requisition Summary Onsite based position - Santa Clara, CA or Austin, TX Key Responsibilities: Requires specialized depth and/or breadth of expertise in the Quality Domain, with demonstrated solution leadership experience in this area. Candidate should be highly skilled in SAP, with hands-on experience in S/4HANA implementations or support. They should interpret internal or external business issues and recommend best practices. Solves complex problems and takes a broad perspective to identify innovative solutions. Works independently, with guidance in only the most complex situations. May lead functional teams or projects. Serve as an interface with multiple sub-groups within a business unit or functional area such as Sales, Operations, Engineering, Service, and Finance for the purpose of business technology alignment, solution discovery, service management, project portfolio management, and relationship management. Architect and design complex business process/business application solutions to address cross-functional needs, and convert design to functional and technical specifications. Oversee software application configuration, prepare and execute testing (unit, integration, performance, acceptance), and data conversions. Identify and recommend industry best-known methods (BKMs) for integrated solution design and standards. Provide and/or oversee business application functional support services to meet customer performance, availability, service level agreements, and customer satisfaction targets. Oversee monitoring of specific IT systems or set of systems and tuning of such systems for availability and performance. Drive completion of root cause analysis and resolution of outages or incident trends, coordinating with infrastructure and technical teams, support providers, and application vendors. Drive implementation of corrective and preventative actions. Evaluate, recommend, and plan life cycle for patches, point releases, and major upgrades. Deliver project and support services within area of responsibility within allocated budget. Develop project budgets. Understand cost models and cost drivers for service(s) and recommend service area budgets and cost optimization activities. May be responsible for timely renewal of maintenance and subscription contracts. Ensure adherence to GIS project management, software application development, testing, service management, change management, RCA, and other relevant processes, standards, governance, and controls. May manage execution of SOX controls and testing, and support internal and external audits. Plan and manage medium to large-scale cross-functional projects to ensure effective and efficient execution in line with guardrails of scope, timeline, budget, and quality. Oversee/manage contingent workers performing services across multiple projects or service areas. Responsible for the selection, onboarding, and offboarding of contingent workers in a timely manner. Manage contingent worker project/task assignments and ensure work product quality. Approve contingent worker timesheets/costs. Functional Knowledge: Demonstrates depth and/or breadth of expertise in own specialized discipline or field, particularly in SAP S/4HANA and Quality domain solution architecture. Business Expertise: Interprets internal/external business challenges and recommends best practices to improve products, processes, or services. Leadership: May lead functional teams or projects with moderate resource requirements, risk, and/or complexity. Problem Solving: Leads others to solve complex problems; uses sophisticated analytical thought to exercise judgment and identify innovative solutions. Impact: Impacts the achievement of customer, operational, project, or service objectives; work is guided by functional policies. Interpersonal Skills: Communicates difficult concepts and negotiates with others to adopt a different point of view. Additional Information Time Type: Full time Employee Type: Assignee / Regular Travel: Yes, 10% of the Time Relocation Eligible: No The salary offered to a selected candidate will be based on multiple factors including location, hire grade, job-related knowledge, skills, experience, and with consideration of internal equity of our current team members. In addition to a comprehensive benefits package, candidates may be eligible for other forms of compensation such as participation in a bonus and a stock award program, as applicable. For all sales roles, the posted salary range is the Target Total Cash (TTC) range for the role, which is the sum of base salary and target bonus amount at 100% goal achievement. Applied Materials is an Equal Opportunity Employer. Qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, ancestry, religion, creed, sex, sexual orientation, gender identity, age, disability, veteran or military status, or any other basis prohibited by law. In addition, Applied endeavors to make our careers site accessible to all users. If you would like to contact us regarding accessibility of our website or need assistance completing the application process, please contact us via e-mail at Accommodations_****************, or by calling our HR Direct Help Line at ************, option 1, and following the prompts to speak to an HR Advisor. This contact is for accommodation requests only and cannot be used to inquire about the status of applications.

Join Our Team as a High-Speed I/O PHY Architect. Are you a visionary in High-Speed I/O PHY Architecture? Do you have a passion for driving innovation and shaping the future of cutting-edge PHYs for next-generation client SoCs? If so, we want you to be a part of our Client CIT team. In this pivotal role, you will be instrumental in defining the architecture, performance, and power efficiency of our high-speed interfaces, directly impacting the success of our client products.Collaborate closely with a diverse range of cross-functional teams to ensure seamless integration and optimized system-level performance. This is a high-impact role offering the opportunity to drive innovation and influence the future of our client SoC technology. Key Responsibilities + Architectural Leadership: Lead the architectural definition and integration of high-speed PHYs for client SoCs, including PCIe, CXL, USBx (e.g., eUSB2, USB3, USB4), Display, MIPI (D-PHY, C-PHY, M-PHY), Ethernet, and TSN. Collaborate with platform and product architects to analyze requirements and define critical performance, power, and area specifications to ensure the success of our products. + IP Evaluation: Conduct technical evaluations of both internal and external PHY IPs, analyzing their performance characteristics against product requirements, and ensuring strategic alignment with overall product goals. Define detailed IP requirements, lead vendor engagement, and make strategic IP selection recommendations based on technical feasibility, cost-effectiveness, and long-term roadmap alignment. + Technology Vision: Proactively research and evaluate emerging high-speed I/O technologies, industry trends, and evolving standards. Identify and champion opportunities to incorporate these advancements into our product roadmap, enhancing performance, power efficiency, and feature sets, and positioning our products for competitive advantage. + Technical Documentation: Create clear and comprehensive architecture specifications and rigorous integration guidelines. Provide review and constructive feedback on related architectural specifications to ensure alignment with overall SoC goals. + Technical Mentorship and Collaboration: Provide technical guidance and mentoring to junior engineers, fostering their growth and contributing to the overall team expertise. Champion a collaborative environment across multiple teams. + Post-Silicon Leadership: Serve as a technical lead in the post-silicon debug and validation of high-speed I/O interfaces, leading taskforces and driving the resolution of complex issues. Oversee the validation process to ensure seamless and high-quality implementations. Additional Skills: + Demonstrated strategic acumen with proven effectiveness in collaborating with senior technologists and business leaders across organizational boundaries.- Demonstrated ability to network with and influence a broad range of stakeholders **Qualifications:** Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum Qualifications:- + BS degree in Electrical/Computer Engineering with a minimum of 15 years of experience. + Master's or PhD degree in Electrical/Computer Engineering with minimum 12 years of experience Preferred Qualifications: + High familiarity with industry trends within the HSIO domain and the ability to map them to Intel roadmap/products and segment strategies. + We look forward to welcoming a dynamic and innovative High-Speed I/O (PHY) Architect to our team. Apply now and be a part of shaping the future of our client SoC technology. + Prior hands-on experience in High-Speed IO PHY Architecture and Design. + Strong knowledge in the interoperability of HSIO PHYs within the PCIe, SATA, Ethernet, USB2, USB3, USB4, Display or MIPI IO Controller subsystems + Strong technical leadership and communication skills **Job Type:** Experienced Hire **Shift:** Shift 1 (United States of America) **Primary Location:** US, California, Folsom **Additional Locations:** US, Arizona, Phoenix, US, California, Santa Clara, US, Oregon, Hillsboro **Business group:** The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel's leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences. **Posting Statement:** All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. **Position of Trust** This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter. **Benefits** We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel (*********************************************************************************** . Annual Salary Range for jobs which could be performed in the US: $220,920.00-361,480.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. **Work Model for this Role** This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a CMBU Systems Architecture Engineer at Micron Technology, you will have the opportunity to establish a deep understanding of Micron's technologies and capabilities, as well as key market trends and competitive landscapes. You will be responsible for using that knowledge to define optimized memory and storage solutions for AI training and inference. You will be responsible for building strong technical relationships with system architects and key technologists across the industry and will have the opportunity to represent Micron at technical conferences and consortia. Your role in those industry engagements will be to drive pathfinding discussions, influence design-in decisions and negotiate product requirements with our ecosystem partners and customers. Internally, you will partner with Micron's top R&D, design, test, and product engineers to ensure successful implementation of new product concepts. Working closely with Product and Business Development Managers you will ensure that each technical decision is aligned with our business strategy and ultimately help bring these outstanding new products to our customers! Responsibilities * Conduct system architecture exploration, analysis, and evaluation using modeling, simulation, and prototyping tools. * Collaborate with customers and external partners to identify architecture bottlenecks and propose innovative solutions. * Drive pathfinding initiatives for system architectures incorporating LPDDR, DDR, and HBM memory technologies. * Explore memory features that enhance DRAM's value proposition in AI and high-performance computing applications. * Mentor and coach junior system architects and engineers to build technical expertise within the team. Minimum Qualifications * Bachelor's degree in Electrical Engineering or related field (BSEE or higher). * 12+ years of experience in system design and architecture. * Strong understanding of memory hierarchy, memory controllers, and PHY design. * Familiarity with LPDDR, DDR, and HBM memory technologies and their integration in compute systems. * Ability to work independently and collaboratively in a fast-paced, dynamic environment. Preferred Qualifications * Master's or Ph.D. in Electrical Engineering, Computer Engineering, or related discipline. * Deep knowledge of memory architectures, system memory hierarchy, and compute system architectures. * Exposure to packaging technologies such as TSV, stacked packaging, and 3D packaging. * Experience with custom SoC/ASIC design and HW/SW co-optimization. * Understanding of JEDEC standards and participation in specification-setting processes; familiarity with AI frameworks and high-performance computing applications. The US base salary range that Micron Technology estimates it could pay for this full-time position is: $208,000.00 - $416,000.00 a year Additional compensation may include benefits, bonuses and equity. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target base pay for new hire salaries of the position across all US locations. Within the range, individual pay is determined by work location and additional job-related factors, including knowledge, skills, experience, tenure and relevant education or training. The pay scale is subject to change depending on business needs. Your recruiter can share more about the specific salary range for your preferred location during the hiring process. Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits. Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws. To learn about your right to work click here. To learn more about Micron, please visit micron.com/careers US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron's People Organization at hrsupport_************* or ************** (select option #3) Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron. AI alert: Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification. Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a CMBU Systems Architecture Engineer at Micron Technology, you will have the opportunity to establish a deep understanding of Micron's technologies and capabilities, as well as key market trends and competitive landscapes. You will be responsible for using that knowledge to define optimized memory and storage solutions for AI training and inference. You will be responsible for building strong technical relationships with system architects and key technologists across the industry and will have the opportunity to represent Micron at technical conferences and consortia. Your role in those industry engagements will be to drive pathfinding discussions, influence design-in decisions and negotiate product requirements with our ecosystem partners and customers. Internally, you will partner with Micron's top R&D, design, test, and product engineers to ensure successful implementation of new product concepts. Working closely with Product and Business Development Managers you will ensure that each technical decision is aligned with our business strategy and ultimately help bring these outstanding new products to our customers! Responsibilities * Conduct system architecture exploration, analysis, and evaluation using modeling, simulation, and prototyping tools. * Collaborate with customers and external partners to identify architecture bottlenecks and propose innovative solutions. * Drive pathfinding initiatives for system architectures incorporating LPDDR, DDR, and HBM memory technologies. * Explore memory features that enhance DRAM's value proposition in AI and high-performance computing applications. * Mentor and coach junior system architects and engineers to build technical expertise within the team. Minimum Qualifications * Bachelor's degree in Electrical Engineering or related field (BSEE or higher). * 12+ years of experience in system design and architecture. * Strong understanding of memory hierarchy, memory controllers, and PHY design. * Familiarity with LPDDR, DDR, and HBM memory technologies and their integration in compute systems. * Ability to work independently and collaboratively in a fast-paced, dynamic environment. Preferred Qualifications * Master's or Ph.D. in Electrical Engineering, Computer Engineering, or related discipline. * Deep knowledge of memory architectures, system memory hierarchy, and compute system architectures. * Exposure to packaging technologies such as TSV, stacked packaging, and 3D packaging. * Experience with custom SoC/ASIC design and HW/SW co-optimization. * Understanding of JEDEC standards and participation in specification-setting processes; familiarity with AI frameworks and high-performance computing applications. The US base salary range that Micron Technology estimates it could pay for this full-time position is: $208,000.00 - $416,000.00 a year Additional compensation may include benefits, bonuses and equity. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target base pay for new hire salaries of the position across all US locations. Within the range, individual pay is determined by work location and additional job-related factors, including knowledge, skills, experience, tenure and relevant education or training. The pay scale is subject to change depending on business needs. Your recruiter can share more about the specific salary range for your preferred location during the hiring process. Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits. Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws. To learn about your right to work click here. To learn more about Micron, please visit micron.com/careers US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron's People Organization at hrsupport_************* or ************** (select option #3) Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron. AI alert: Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification. Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.

** "At Western Digital, our vision is to power global innovation and push the boundaries of technology to make what you thought was once impossible, possible. At our core, Western Digital is a company of problem solvers. People achieve extraordinary things given the right technology. For decades, we've been doing just that-our technology helped people put a man on the moon and capture the first-ever picture of a black hole. We offer an expansive portfolio of technologies, HDDs, and platforms for business, creative professionals, and consumers alike under our Western Digital , WD , WD_BLACK brands. We are a key partner to some of the largest and highest-growth organizations in the world. From enabling systems to make cities safer and more connected, to powering the data centers behind many of the world's biggest companies and hyperscale cloud providers, to meeting the massive and ever-growing data storage needs of the AI era, Western Digital is fueling a brighter, smarter future. Today's exceptional challenges require your unique skills. Together, we can build the future of data storage." **Job Description** This is a Hybrid role in either the San Jose or Irvine offices. We are seeking a **ServiceNow Solutions Technical Architect** to lead the enterprise architecture, design strategy, and platform governance for our ServiceNow ecosystem. This senior role is essential in shaping scalable, secure, and high-performing ServiceNow solutions that deliver real business value across IT and operational domains. This architect will act as a hands-on leader, solution designer, and internal expert-driving best practices, guiding project delivery teams, and ensuring we continuously leverage the full potential of the ServiceNow platform without over-reliance on external vendors or ServiceNow itself. **Key Responsibilities** **Architecture & Solution Design** + Lead and own architectural design of ServiceNow solutions-covering workflows, data structures, platform topology, and integration strategies. + Define reusable solution frameworks and reference architectures across ITSM, ITOM, HRSD, and custom applications. + Translate complex business needs into robust technical designs while aligning to platform guardrails and enterprise architecture standards. + **Drive modernization of legacy, heavily customized ServiceNow instances-leading efforts to eliminate technical debt, adopt out-of-the-box capabilities, and align to current best practices.** **Platform & Product Expertise** + Maintain expert-level knowledge across the ServiceNow product suite, including platform architecture, new modules, and evolving features. + Stay current on product releases, roadmap updates, and industry trends to proactively guide adoption of new capabilities. + Act as an internal authority on ServiceNow configuration, development patterns, and feature usage. **Implementation Leadership** + Provide technical oversight on ServiceNow implementations and enhancements, ensuring scalable and maintainable solutions. + Collaborate with delivery teams and implementation partners to uphold architecture quality and design intent. **Agile & Business Engagement** + Work closely with product owners and stakeholders to gather and translate business requirements into user-centric technical solutions. + Participate in Agile planning and delivery processes, supporting backlog grooming, sprint reviews, and incremental delivery. **Integration & Performance Strategy** + Design and govern integrations using IntegrationHub, Flow Designer, and APIs for real-time and batch data exchange. + Architect solutions that meet enterprise standards for availability, performance, and security. **AI & Innovation** + Support the evaluation and responsible adoption of new platform capabilities, including ServiceNow AI, GenAI, agent-based automation, and other intelligent features as they are released. **Why This Role Matters** This is a strategic, hands-on technical leadership role that directly impacts how we design, deliver, and govern solutions on the ServiceNow platform. As a **ServiceNow Solutions Technical Architect** , you'll ensure the platform is modern, efficient, and aligned with business priorities-serving as the go-to expert for architecture, innovation, and platform optimization. **Qualifications** **Required Qualifications** + 8-10+ years of progressive IT experience with 5+ years in ServiceNow architecture and solution design roles. + Strong understanding of the full ServiceNow product ecosystem and experience architecting enterprise-wide solutions. + **Proven experience modernizing legacy/custom-heavy ServiceNow environments and reducing technical debt through platform standardization.** + Experience leading technical delivery within Agile/SAFe environments. + Proficient in integration design, system APIs, security architecture (RBAC), and enterprise-scale platform governance. + Strong communication and documentation skills for technical and business audiences. + Familiarity with ServiceNow's AI, GenAI, and workflow intelligence features (e.g., Now Assist, Virtual Agent, Process Optimization). **Preferred Skills** + **ServiceNow Certified Technical Architect** , or equivalent advanced certifications across multiple ServiceNow products. + Working knowledge of enterprise architecture frameworks, data modeling, and automation platforms. + Experience guiding DevOps and CI/CD practices for ServiceNow development and releases. **Additional Information** Western Digital is committed to providing equal opportunities to all applicants and employees and will not discriminate against any applicant or employee based on their race, color, ancestry, religion (including religious dress and grooming standards), sex (including pregnancy, childbirth or related medical conditions, breastfeeding or related medical conditions), gender (including a person's gender identity, gender expression, and gender-related appearance and behavior, whether or not stereotypically associated with the person's assigned sex at birth), age, national origin, sexual orientation, medical condition, marital status (including domestic partnership status), physical disability, mental disability, medical condition, genetic information, protected medical and family care leave, Civil Air Patrol status, military and veteran status, or other legally protected characteristics. We also prohibit harassment of any individual on any of the characteristics listed above. Our non-discrimination policy applies to all aspects of employment. We comply with the laws and regulations set forth in the "Know Your Rights: Workplace Discrimination is Illegal (************************************************************************************** " poster. Our pay transparency policy is available here (*********************************************************************************************** . Western Digital thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. Western Digital is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at jobs.accommodations@wdc.com to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying. Based on our experience, we anticipate that the application deadline will be (3 months from posting), although we reserve the right to close the application process sooner if we hire an applicant for this position before the application deadline. If we are not able to hire someone from this role before the application deadline, we will update this posting with a new anticipated application deadline. \#LI-AS1 **Compensation & Benefits Details** + An employee's pay position within the salary range may be based on several factors including but not limited to (1) relevant education; qualifications; certifications; and experience; (2) skills, ability, knowledge of the job; (3) performance, contribution and results; (4) geographic location; (5) shift; (6) internal and external equity; and (7) business and organizational needs. + The salary range is what we believe to be the range of possible compensation for this role at the time of this posting. We may ultimately pay more or less than the posted range and this range is only applicable for jobs to be performed in California, Colorado, New York or remote jobs that can be performed in California, Colorado and New York. This range may be modified in the future. + If your position is non-exempt, you are eligible for overtime pay pursuant to company policy and applicable laws. You may also be eligible for shift differential pay, depending on the shift to which you are assigned. + You will be eligible to be considered for bonuses under **either** Western Digital's Short Term Incentive Plan ("STI Plan") or the Sales Incentive Plan ("SIP") which provides incentive awards based on Company and individual performance, depending on your role and your performance. You may be eligible to participate in our annual Long-Term Incentive (LTI) program, which consists of restricted stock units (RSUs) or cash equivalents, pursuant to the terms of the LTI plan. Please note that not all roles are eligible to participate in the LTI program, and not all roles are eligible for equity under the LTI plan. RSU awards are also available to eligible new hires, subject to Western Digital's Standard Terms and Conditions for Restricted Stock Unit Awards. + We offer a comprehensive package of benefits including paid vacation time; paid sick leave; medical/dental/vision insurance; life, accident and disability insurance; tax-advantaged flexible spending and health savings accounts; employee assistance program; other voluntary benefit programs such as supplemental life and AD&D, legal plan, pet insurance, critical illness, accident and hospital indemnity; tuition reimbursement; transit; the Applause Program; employee stock purchase plan; and the Western Digital Savings 401(k) Plan. + **Note:** No amount of pay is considered to be wages or compensation until such amount is earned, vested, and determinable. The amount and availability of any bonus, commission, benefits, or any other form of compensation and benefits that are allocable to a particular employee remains in the Company's sole discretion unless and until paid and may be modified at the Company's sole discretion, consistent with the law. **Notice To Candidates:** Please be aware that Western Digital and its subsidiaries will never request payment as a condition for applying for a position or receiving an offer of employment. Should you encounter any such requests, please report it immediately to Western Digital Ethics Helpline (******************************************************************** or email ****************** .

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Core Datacenter Solution Architect is an integral member of the CDBU. In this role you will collaborate with a highly technical team of experts to develop deep technical engagements with customers and partners, identify key future technology trends and set technical strategies for product roadmaps in a fast-paced, agile environment, closely partnered with business, R&D, and technology teams in Micron! Key Responsibilities Portfolio Strategy * Develop and own a holistic long‑term memory and storage strategy that aligns Micron's strengths with evolving customer needs. * Lead internal and external industry research and pathfinding to identify future technology directions. * Collaborate with CMBU and engineering teams to define memory product features that support the long‑term roadmap. * Partner with engineering, operations, and BU teams to identify and drive new business opportunities in storage and memory systems. Market Leadership * Lead CDBU's technical enablement strategy to accelerate adoption of next‑generation memory and storage technologies. * Establish and maintain strong technical partnerships with customers and ecosystem players, advancing Micron's long-term memory and storage vision. * Actively contribute to Quarterly Technical Reviews, including content development, technical presentations, and follow‑through on action items. * Engage with ecosystem partners to drive joint innovations and deliver differentiated "better together" solutions. * Architect, plan, simulate, and guide system‑level prototypes and new feature explorations supporting CDBU's roadmap. Industry Leadership * Represent Micron in leadership roles across industry organizations, consortia, and standards bodies. * Present publicly on Micron's behalf, contributing to thought leadership and elevating the company's technical brand. * Support corporate development and business teams in evaluating emerging technologies, startups, and new market entrants. * Provide a visionary approach that builds differentiated, category‑leading products. Competitive Landscape * Analyze competitive and alternative market offerings through direct ecosystem engagement. * Supply technology and product teams with strategic insights to build advantaged products and win key markets. Minimum Qualifications * 10+ years of experience in memory, storage, or datacenter technology development, including delivering complex solutions to market. * 5+ years of leadership experience running multi-functional technical programs with measurable outcomes. * Proven expertise in memory systems architecture or enterprise SSD, demonstrated through delivery of 2+ major products or technology programs. * Experience representing strategy externally, including 5+ public presentations, standards engagements, or industry forums. * Demonstrated success in managing customer/partner engagements with 3+ strategic accounts or technology partners. Preferred Qualifications * 15+ years of experience in storage, memory, or hyperscale systems, including 3+ years in senior technical leadership or pathfinding roles. * Hands‑on experience architecting or evaluating multiple end‑to‑end system prototypes, including simulation or modeling. * Demonstrated industry influence, such as leading 1+ standards bodies or catalyzing 2+ ecosystem technology initiatives. * Proven track record delivering 3-5 competitive analyses or market comparison studies. * Experience coordinating global teams and supporting international engagements and ability to travel domestically and internationally. Professional Experience & Technical Qualifications * Bachelor's or Master's degree or equivalent experience in Electrical Engineering, Computer Engineering, Computer Science, or related field. * Strong technical leadership track record delivering datacenter‑class products. * In‑depth knowledge of memory systems, enterprise SSD architectures, and emerging storage technologies. * Proficiency navigating complex programs with diverse sets of team members across engineering, product, and customer organizations. * Working knowledge of enterprise storage, networking architectures, and hyperscale deployments. * Excellent problem‑solving and troubleshooting capabilities. * Ability to effectively articulate strategy, engage customers, and build trust at multiple organizational levels. Leadership Skills * Thought Leadership: Inspire innovation through strategic insights shared with customers, product teams, R&D, and technology groups. * Visionary Thinking: Imagine and articulate the future of SSD, NAND, and DRAM technology; drive innovation that keeps Micron ahead of competitors. * Collaboration & Networking: Build influential partnerships with customers, internal teams, and ecosystem players to accelerate progress. * Communication: Translate complex technical concepts for both technical and non‑technical audiences with clarity and impact. The US base salary range that Micron Technology estimates it could pay for this full-time position is: $156,000.00 - $364,000.00 a year Additional compensation may include benefits, bonuses and equity. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target base pay for new hire salaries of the position across all US locations. Within the range, individual pay is determined by work location and additional job-related factors, including knowledge, skills, experience, tenure and relevant education or training. The pay scale is subject to change depending on business needs. Your recruiter can share more about the specific salary range for your preferred location during the hiring process. Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits. Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws. To learn about your right to work click here. To learn more about Micron, please visit micron.com/careers US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron's People Organization at hrsupport_************* or ************** (select option #3) Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron. AI alert: Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification. Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Core Datacenter Solution Architect is an integral member of the CDBU. In this role you will collaborate with a highly technical team of experts to develop deep technical engagements with customers and partners, identify key future technology trends and set technical strategies for product roadmaps in a fast-paced, agile environment, closely partnered with business, R&D, and technology teams in Micron! Key Responsibilities Portfolio Strategy * Develop and own a holistic long‑term memory and storage strategy that aligns Micron's strengths with evolving customer needs. * Lead internal and external industry research and pathfinding to identify future technology directions. * Collaborate with CMBU and engineering teams to define memory product features that support the long‑term roadmap. * Partner with engineering, operations, and BU teams to identify and drive new business opportunities in storage and memory systems. Market Leadership * Lead CDBU's technical enablement strategy to accelerate adoption of next‑generation memory and storage technologies. * Establish and maintain strong technical partnerships with customers and ecosystem players, advancing Micron's long-term memory and storage vision. * Actively contribute to Quarterly Technical Reviews, including content development, technical presentations, and follow‑through on action items. * Engage with ecosystem partners to drive joint innovations and deliver differentiated "better together" solutions. * Architect, plan, simulate, and guide system‑level prototypes and new feature explorations supporting CDBU's roadmap. Industry Leadership * Represent Micron in leadership roles across industry organizations, consortia, and standards bodies. * Present publicly on Micron's behalf, contributing to thought leadership and elevating the company's technical brand. * Support corporate development and business teams in evaluating emerging technologies, startups, and new market entrants. * Provide a visionary approach that builds differentiated, category‑leading products. Competitive Landscape * Analyze competitive and alternative market offerings through direct ecosystem engagement. * Supply technology and product teams with strategic insights to build advantaged products and win key markets. Minimum Qualifications * 10+ years of experience in memory, storage, or datacenter technology development, including delivering complex solutions to market. * 5+ years of leadership experience running multi-functional technical programs with measurable outcomes. * Proven expertise in memory systems architecture or enterprise SSD, demonstrated through delivery of 2+ major products or technology programs. * Experience representing strategy externally, including 5+ public presentations, standards engagements, or industry forums. * Demonstrated success in managing customer/partner engagements with 3+ strategic accounts or technology partners. Preferred Qualifications * 15+ years of experience in storage, memory, or hyperscale systems, including 3+ years in senior technical leadership or pathfinding roles. * Hands‑on experience architecting or evaluating multiple end‑to‑end system prototypes, including simulation or modeling. * Demonstrated industry influence, such as leading 1+ standards bodies or catalyzing 2+ ecosystem technology initiatives. * Proven track record delivering 3-5 competitive analyses or market comparison studies. * Experience coordinating global teams and supporting international engagements and ability to travel domestically and internationally. Professional Experience & Technical Qualifications * Bachelor's or Master's degree or equivalent experience in Electrical Engineering, Computer Engineering, Computer Science, or related field. * Strong technical leadership track record delivering datacenter‑class products. * In‑depth knowledge of memory systems, enterprise SSD architectures, and emerging storage technologies. * Proficiency navigating complex programs with diverse sets of team members across engineering, product, and customer organizations. * Working knowledge of enterprise storage, networking architectures, and hyperscale deployments. * Excellent problem‑solving and troubleshooting capabilities. * Ability to effectively articulate strategy, engage customers, and build trust at multiple organizational levels. Leadership Skills * Thought Leadership: Inspire innovation through strategic insights shared with customers, product teams, R&D, and technology groups. * Visionary Thinking: Imagine and articulate the future of SSD, NAND, and DRAM technology; drive innovation that keeps Micron ahead of competitors. * Collaboration & Networking: Build influential partnerships with customers, internal teams, and ecosystem players to accelerate progress. * Communication: Translate complex technical concepts for both technical and non‑technical audiences with clarity and impact. The US base salary range that Micron Technology estimates it could pay for this full-time position is: $156,000.00 - $364,000.00 a year Additional compensation may include benefits, bonuses and equity. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target base pay for new hire salaries of the position across all US locations. Within the range, individual pay is determined by work location and additional job-related factors, including knowledge, skills, experience, tenure and relevant education or training. The pay scale is subject to change depending on business needs. Your recruiter can share more about the specific salary range for your preferred location during the hiring process. Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits. Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws. To learn about your right to work click here. To learn more about Micron, please visit micron.com/careers US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron's People Organization at hrsupport_************* or ************** (select option #3) Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron. AI alert: Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification. Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.

Category Engineering Hire Type Employee Job ID 13350 Base Salary Range $209000-$313000 Remote Eligible No Date Posted 17/11/2025 We Are:At Synopsys, we drive the innovations that shape the way we live and connect. Our technology powers the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an experienced IC physical design expert, with strong leadership in digital implementation and signoff for complex, high-speed mixed-signal subsystems. You thrive in collaborative environments, can manage both local and remote teams, and have a proven track record of driving projects to tapeout. You're hands-on, detail-oriented, and passionate about optimizing performance, power, and area. Your communication skills and technical insight make you a go-to resource for cross-functional teams. What You'll Be Doing: * Technically lead and manage local and remote teams for complex Subsystem designs digital implementation and signoff. * Guide signoff quality timing constraints development and qualification for critical Subsystem designs with hundreds of clocks. * Drive PNR flow and methodology for timing critical muti-million deep sub-micro designs flat/hierarchical digital implementation. * Handson expertise in all aspects of flat, hierarchical PNR implementation tasks like synthesis, floorplanning, design partitioning, DFT, low power/UPF based implementation, timing constraints, clock tree synthesis, routing and optimization, extraction, timing signoff, signal integrity, physical verification, Power & IR drop signoff to debug and resolve critical implementation bottlenecks. * Requires close interaction and collaborative teamwork with multiple functional groups front end, analog, PM/PEMs. * Drive RTL, design partitioning, timing constraints related feedback to Frond-end team for data path optimization, clock & reset architecture improvements for enabling high speed timing closure, PPA improvements. The Impact You Will Have: * Deliver signoff-quality, high-performance silicon solutions. * Mentor and develop engineering teams. * Drive process improvements and technical innovation. * Enhance Synopsys' leadership in high-speed IP. * Facilitate successful cross-team collaboration. * Enable next-generation chip architectures. What You'll Need: * MS in Electrical Engineering; 10+ years in physical design, static timing analysis. * Must have hands-on RTL-GDSII physical implementation tapeout experience for complex high-speed flat/hierarchical designs. * Must have experience in leading and managing local, remote implementation teams. * Expertise of the Synopsys tools, flows and methodologies required to execute physical design projects. * Strong scripting and software skills. Who You Are: * Inclusive leader and effective communicator. * Innovative, collaborative, and quality-driven. * Thrives in dynamic environments. The Team You'll Be A Part Of: Join a global engineering team advancing high-speed silicon IP design. We value innovation, inclusion, and technical excellence. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits. Your recruiter will share more details about salary and total rewards during the process. #LI-NK4 At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.

Category Engineering Hire Type Employee Job ID 12954 Base Salary Range $194000-$291000 Remote Eligible No Date Posted 20.10.2025 We Are: Also open to hiring for this role in Austin, Hillsboro and in Canada. At Synopsys, we drive innovation in chip design, verification, and IP integration-powering the future of smart technology, from AI to self-driving cars. Join us to transform the world through continuous advancement. You Are: You're a seasoned technical leader with deep expertise in ASIC/SoC design flows, multiple tape-outs, and silicon bring-up. You thrive on solving complex challenges, mentoring engineers, and collaborating with customers. Your knowledge spans protocols like PCIe/CXL, DDR, UCIe, and you're skilled in advanced technology nodes and 2.5D/3D IC packaging. You communicate well, take ownership, and drive technical excellence in every project. What You'll Be Doing: * Lead technical strategy and mentor engineering teams * Architect and support UCIe IP integration in customer SOCs * Resolve design and debug issues during integration and tape-out * Drive post-silicon validation and bring-up * Create technical collateral and training materials * Collaborate with R&D to support new IP and influence product direction The Impact You Will Have: * Accelerate customer time-to-market for SOC products * Reduce project risk through expert technical support * Shape future Synopsys IP with critical feedback * Advance methodologies and team knowledge * Drive innovation in cutting-edge silicon markets * Support customer success and satisfaction What You'll Need: * BSc/MSc in Electrical Engineering or related field * 15+ years of SOC design or applications experience * Proven tape-out and silicon bring-up expertise * Strong protocol and EDA tool knowledge * Leadership and customer-facing experience Who You Are: * Innovative, collaborative, and communicative * Proactive problem-solver and mentor * Detail-oriented and analytical The Team You'll Be A Part Of: Work with a talented, diverse team at the forefront of SOC innovation, collaborating closely with R&D and customers to deliver world-class silicon solutions. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.

Category Information Technology Hire Type Employee Job ID 12637 Base Salary Range $171000-$256000 Date Posted 11/11/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a visionary technical leader with a passion for architecting robust, scalable solutions in high-performance computing (HPC) and electronic design automation (EDA) environments. Your extensive experience enables you to navigate complex infrastructures and deliver solutions that advance the capabilities of our clients in the semiconductor and electronic design industries. You thrive in dynamic, collaborative settings and excel at bridging the gap between technical details and business objectives. Your ability to mentor and lead teams, coupled with a strong commitment to innovation and continuous improvement, makes you an invaluable asset. You possess a keen sense for optimizing performance, reducing costs, and elevating operational efficiency. Your communication skills empower you to engage effectively with stakeholders across all levels, translating intricate requirements into actionable solutions. You are motivated by challenging problems and eager to share your expertise, fostering an environment of growth and excellence. If you are seeking an opportunity to make a significant impact while shaping the technological future, we invite you to bring your talents and join our team at Synopsys. What You'll Be Doing: * Architecture Design: Develop and maintain the architecture for HPC EDA infrastructure, ensuring alignment with business goals and technical requirements. Evaluate and recommend technologies, tools, and platforms that enhance performance and scalability. * Solution Development: Collaborate with cross-functional teams to design and implement end-to-end solutions for EDA workloads in HPC environments. Create detailed solution designs, including system architecture, data flow, and integration points. * Technical Leadership: Provide technical guidance and mentorship to engineering teams throughout the solution development lifecycle. Lead architectural reviews and ensure adherence to best practices and standards. * Client Engagement: Work closely with clients to understand their requirements and challenges, translating them into effective solutions. Present architectural solutions and recommendations to stakeholders, including technical and non-technical audiences. * Performance Optimization: Analyze system performance and identify areas for improvement, implementing optimizations to enhance efficiency and reduce costs. Stay current with industry trends and emerging technologies in HPC and EDA to inform solution development. * Documentation and Training: Create comprehensive documentation for architectural designs, processes, and best practices. Conduct training sessions and workshops for internal teams and clients on HPC EDA infrastructure solutions. The Impact You Will Have: * Shape the HPC EDA infrastructure supporting leading-edge semiconductor and electronics design projects. * Drive the development of scalable and efficient solutions that elevate client performance and productivity. * Implement innovative technologies that directly contribute to clients' project successes and strategic goals. * Enhance system reliability, throughput, and cost-efficiency for mission-critical workloads. * Empower engineering teams through mentorship, technical leadership, and knowledge sharing. * Influence industry trends by integrating emerging technologies and best practices into our infrastructure solutions. What You'll Need: * Bachelor's degree in computer science, Engineering, or a related field; Master's degree preferred. * 10+ years of experience with large-scale grid solutions using job schedulers such as LSF, Slurm, and UGE (Univa Grid Engine). * Proficiency in Linux administration, observability, configuration management, network services (LDAP/DNS/DHCP), scripting, and automation. * Strong understanding of HPC architectures, parallel computing, EDA tools, and workflows. * Demonstrated experience with performant NAS/NFS solutions tailored for EDA workloads, ensuring high throughput and low latency. * Proficiency in cloud computing platforms (e.g., AWS, Azure) and virtualization technologies. * Excellent problem-solving skills and the ability to think critically and strategically. * Strong communication and interpersonal skills, with the ability to work collaboratively in a team environment. * Experience with project management methodologies and tools is a plus. Who You Are: You are a passionate, driven professional with deep expertise in HPC and EDA infrastructure. You excel in collaborative environments, communicating effectively with both technical and non-technical stakeholders. You are committed to delivering high-quality solutions, eager to mentor others, and thrive when tackling challenging problems. Your leadership, adaptability, and strategic thinking will help shape the future of technology at Synopsys. The Team You'll Be A Part Of: You will join a dynamic, multidisciplinary engineering team focused on advancing HPC and EDA solutions for the semiconductor industry. Our team values innovation, collaboration, and continuous learning, working together to deliver world-class infrastructure and support for high-impact projects. You'll collaborate with colleagues across engineering, product, and client engagement to drive excellence and shape the future of design automation. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.