Layout designer job description

In this position, you will work closely with design engineering to complete the layout and verification of high-performance mixed-signal CMOS Integrated Circuits using Cadence Virtuoso XL and Mentor's Calibre tools, and work with circuit engineers to generate topological layouts to ensure optimal circuit performance.
Responsibilities

Solving layout design issues and applying proactive intervention Proactively work with design engineers to achieve efficient circuit performance Design analog & mixed-signal layouts Understand device matching techniques Understand signal conditioning/protection techniques Strong collaboration skills, including written and verbal communication Outstanding layout planning and integration skills Experience in routing at the block level and chip top-level using assisted/automated tools
Required Skills and Qualifications


Associates Degree in Electronic/IC layout CAD specialization or related program and 10+ years of IC layout experience Ability to layout analog circuitry in a size/time constrained environment Understand layout techniques such as common centroid, matching, isolation, shielding, and the use of dummy devices Solid understanding of ESD, Latch-up, STI, WPE, electro-migration, IR drop, cross-coupling capacitance, DFM, and Antenna effect Ability to solve design problems while using a combination of technical skills, intuition, and creativity Proficiency in floor planning activities with block assembly, and block-level routing LVS trouble shooting and debug skills Proven track record of working in a fast-paced team-oriented environment Great teammate and works well with others
Preferred Skills and Qualifications


BS Degree in Electronics Engineering or related program Comfortable with multiple IC design CAD tools and foundry PDKs Demonstrated ability to contribute ideas for improved efficiency and automation of layout tasks Knowledge of analog, digital, and mixed-signal fundamentals

This position is located in Cupertino, CA

This is a hybrid position and will follow a 2+ day in-office work schedule, with in-office days based on business needs and team preference. You must be based within commutable distance of the work location listed on the job posting, or willing to relocate prior to beginning employment with Cirrus Logic.

Cirrus Logic is an Equal Opportunity/Affirmative Action Employer. We strive to select the best qualified applicant for any opening and to reward employees based on their skills, experience and performance. We do not discriminate on the basis of race, national origin, pregnancy status, marital status, gender, age, religion, physical or mental disability, medical condition, veteran status, sexual orientation, genetic information or any other characteristic protected by law.

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Analog Devices (ADI) has just over $9 billion in revenue with offices around the world. As a global leader in the design and manufacturing of analog, mixed signal, power management and DSP integrated circuits, ADI is known for helping to solve its customers' toughest engineering challenges. With a commitment to engineering for good, ADI strives to create a more sustainable future, while also focusing on its employees through mentoring programs, employee networks and continuous learning opportunities.

At ADI, you will learn from the brightest minds who are here to help you grow and succeed. You will make an impact through work on meaningful projects alongside a team of experts. ADI's culture values aligned goals, work-life balance, continuous and life-long learning opportunities, and shared rewards.
Apply now for the opportunity to grow your career and help innovate ahead of what's possible.

Job Description Summary:

The Automotive Group needs an experienced layout designer to perform physical mask design of advanced analog and mixed-signal ICs. Work as a team with other layout designers and engineers, local and/or globally to complete full chip projects. Responsibilities include all aspects of IC mask design from creating full chip floor plans, planning schedules, hookup, and verification to tapeout. Use your skills to lead projects to market.

Job Description:

Responsibilities include but are not limited to:

Layout of integrated circuits including the ability to place and route active and passive devices in Cadence Virtuoso Custom IC design tool including VXL Chip floor-planning and top-level integration DRC (design rule check) , LVS (layout-vs-schematic) using layout verification tools Strong written and verbal communication skills Self-driven to take ownership of tasks.


Minimum Requirements:

Bachelors degree or equivalent experience Ideal candidate will have 3+ years of relevant analog/mixed-signal layout experience. Requires a thorough understanding of DRC and LVS layout verification procedures. Knowledge of Cadence tools required. Knowledge of Unix/Linux, Calibre tools and coding skills a plus. Must work well in a team environment, have excellent communication skills, attention to detail, and exhibit a sense of project ownership.



Education:



Work Experience:



Pay Rate Type:

Salary


Eligible for Relocation:

Yes


Eligible for Work Visa Sponsorship:

Yes

This position may require a deemed export control license for compliance with applicable laws and regulations; including but not limited to US Government International Traffic in Arms Regulations (ITAR), US Export Administration Regulations (EAR), or US Treasury Regulations. If required, placement is contingent on Maxim's ability to apply for and obtain an export control license on your behalf.

ADI is an equal opportunity employer. Applicants are considered for employment without regard to race, color, religion (including religious creed), sex (including pregnancy), gender, national origin, age, sexual orientation, marital status, gender identity or expression, ancestry, disability, medical condition, genetic information, veterans, and/or military status and any other categories protected by applicable law.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
+ BSEE, MSEE

+ Exposure to microelectronics design and requirements

+ Understanding of layout effects on the circuit such as speed, capacitance, power and area etc.,

+ Knowledge of various analog layout techniques like matching, shielding etc.,

+ Exposure to Cadence Virtuoso Layout and physical verification tools

+ Team player, driven, self-motivated and autonomous

+ Excellent communication, presentation and customer service skills

Custom Layout Designer (Analog Layout Designer)

Join our team of layout designers creating challenging IP designs for the consumer, industrial, and automotive markets. Our designs are fabricated in the world's leading edge silicon processes for companies ranging from large multinational companies to hot start-ups. Learn on-the-job how to apply your engineering background to create these robust high performance analog designs. Working with experienced skilled designers, you will be part of the design team using Cadence design tools. We are looking for a layout engineer capable of producing quality layouts of analog/mixed-signal circuit blocks, working in collaboration with circuit designers. Responsibilities include all facets of the back-end flow, from initial floor planning through detailed layout and final verification of conformance to foundry design rules.

The Cadence IP Group custom layout team develops and delivers a variety of high-quality high speed and high accuracy CMOS integrated circuits IP for several foundries and process nodes down to 5n and even below. We are deeply involved in finfet layout and even beyond (gate all-around).

As part of Cadence, the Cadence IP group custom layout team not only has access to all the current and future Cadence layout and verification tools, we also participate in the development and validation of the Cadence Virtuoso software, which the most used in the industry.

As a custom layout designer, you will be involved in:

+ Implementing high speed and high accuracy cells, blocks and IP blocks in a timely fashion with high quality and efficiency

+ Working with custom layout designers from groups all over the world to build high quality IP and testchips

+ Working with circuit designers from groups all over the world to understand their technical and schedule needs

+ Collaborating with the Cadence R&D teams (Virtuoso, PVS developers) to help develop the layout editing and verification tools

We're doing work that matters. Help us solve what others can't.

Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.