Mechanical engineer jobs in Livermore, CA - 6,120 jobs

Physical Design Engineer - New College Grad 2026 page is loaded## Physical Design Engineer - New College Grad 2026locations: US, CA, Santa Claratime type: Full timeposted on: Posted Todayjob requisition id: JR2009983We are now looking for a Physical Design Engineer!NVIDIA has continuously pioneered and reinvented itself over two decades through various avenues of computing: Graphics, High Performance Computing, Artificial Intelligence, Research, and more. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to tackle, that only we can solve, and that matter to the world. This is our life's work, to amplify human creativity, intelligence, and technology. Today, visual computing is becoming increasingly central to how people interact with technology, and there has never been a more exciting time to join our team. We are looking for a Physical Design Engineer who will be responsible for all aspects of physical design and implementation of Graphics processors, integrated chipsets, and other ASICs targeted at the desktop, laptop, workstation, set-top box and home networking markets.**What you will be doing:*** As a member of the team, you will participate in the efforts in establishing CAD and physical design methodologies (flow and tools development) as well as implementation.* Your day to day will include developing chip floor plan, power/clock distribution, chip assembly and P&R, timing closure, power and noise analysis and back-end verification across multiple projects.* This position requires you to work with EDA vendor (Synopsys, Cadence, Mentor, etc.) tool suites such as: ICC2,PrimeTime, dc\_shell, Innovus, SeaHawk.* You will interact with a diverse team engineers.**What we need to see:*** Completing an BSEE, MSEE or PhD (or equivalent experience).* Deep understanding of VLSI and Physical Design related basics & concepts.* Possess a deep understanding of static timing analysis, clock/power distribution and analysis, RC extraction and correlation, place and route, circuit design and analysis.* Experience in scripting and programming using several of the following languages/tools: Perl, C, C++, TCL, Scheme, Skill, or Make.* Previous internship or project experience in physical design implementation With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world's most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our best-in-class engineering teams are rapidly growing. If you're a creative and autonomous engineer with a passion for technology, we want to hear from you!Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 96,000 USD - 161,000 USD for Level 1, and 108,000 USD - 184,000 USD for Level 2.You will also be eligible for equity and .Applications for this job will be accepted at least until December 19, 2025.NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. #J-18808-Ljbffr

About the team Droyd builds autonomous robotic systems that automate repetitive manual work in real environments. Our robots operate in production settings, which means mechanical design has to be robust, manufacturable, and tightly integrated with electronics and control systems. Our mechanical team designs the structures, linkages, and assemblies that make the robots real. This work moves fast and lives on the shop floor as much as it does in CAD. About the role As a Mechanical Design Engineer at Droyd, you'll own mechanical subsystems from first sketch through working prototype. You'll design, build, break, and iterate on real hardware. This is a hands‑on role. You'll spend time in CAD, but also at the printer, in the shop, and on the robot. You'll work closely with electrical, software, and robotics teams to bring systems together. This role is based in Burlingame, CA. We're an in‑person company. We build faster that way. In this role, you'll Own mechanical subsystem design from concept to prototype and iteration Design parts and assemblies in CAD, supported by hand calculations and FEA when needed Design for rapid prototyping methods including 3D printing and CNC machining Make decisions on materials, tolerances, and manufacturing methods Integrate mechanical designs with motors, sensors, electronics, and actuators Build prototypes yourself using 3D printers, shop tools, and CNC equipment Work closely with manufacturing to turn designs into physical hardware quickly We're looking for someone who Has a strong portfolio showing complete systems taken from concept to physical prototype Has experience on hands‑on engineering teams such as Formula SAE, aerospace clubs, or robotics teams Has internship or early‑career experience on real hardware projects or at hardware startups Is proficient with modern CAD tools (Onshape preferred, but not required) Understands manufacturing methods, tolerancing, and assembly workflows Is comfortable with hands‑on fabrication and rapid iteration Nice to have Experience with FEA, topology optimization, or generative design Exposure to electronics, controls, or mechatronic systems Interest in industrial or visual design alongside functional engineering About Droyd Droyd builds autonomous robotic systems to automate manual work for enterprises. We design the hardware, write the control stack, and deploy robots that operate in real environments. If we do this right, robots stop being prototypes and start being infrastructure. Join us and help build hardware that ships. #J-18808-Ljbffr

A specialized engineering recruiter is seeking a Mechanical Engineering Manager for RF Electronics to lead the design and development of complex microwave components. The ideal candidate will have over 15 years of experience in microelectronics packaging and microwave testing. Responsibilities include managing engineering teams, overseeing production transitions, and ensuring high-quality mechanical designs. Proficiency in design tools like Solidworks and ANSYS is essential, as is the ability to innovate for military and aerospace environments. Candidates must be US citizens and able to obtain a security clearance. #J-18808-Ljbffr

A technology company in San Francisco is seeking a Sr. Mechanical Engineering Manager to lead mechanical and hardware design for sensing devices. The role requires overseeing the full lifecycle of mechanical products, ensuring designs meet rigorous durability standards. The ideal candidate should have over 8 years of experience in mechanical product development and proven leadership skills. This position offers a competitive salary and comprehensive benefits, including health coverage and paid parental leave. #J-18808-Ljbffr

About Commonwealth Fusion Systems: Commonwealth Fusion Systems is on a mission to deliver the urgent transition to fusion energy. Combining decades of research, top talent, and new technologies, we're designing and building commercially viable fusion power plants. And working with policymakers and suppliers to build the energy industry of the future. We're in the best position to make it happen. Since 2018, we've raised nearly $3 billion in capital, making us the largest and leading private fusion company in the world. Now we're looking for more thinkers, doers, builders, and makers to join us. People who'll bring new perspectives, solve tough problems, and thrive as part of a team. If that's you and this role fits, we want to hear from you. Principal Mechanical Engineer We're looking for a Principal Mechanical Engineer to join our R&D and equipment design team to help build the next generation of thin‑film deposition technology. The Principal Mechanical Engineer will be responsible for the design and implementation of advanced R&D equipment and complex machinery. This role requires strong technical expertise, procedural discipline, and the ability to collaborate across engineering and technology functions to ensure safe, reliable, and high‑performance equipment. If you enjoy working on complex design problems, mentoring others, and solving problems in a collaborative, fast‑paced environment, this is your opportunity to make an impact. What you'll do: Lead the design and implementation of advanced R&D equipment for thin‑film processing, including ownership of key mechanical modules and sub‑systems Define system level requirements and drive innovative design concepts to meet these requirements Lead design reviews for overall mechanical system and key mechanical subsystems Generate and maintain interfaces with other engineering subsystems Report on and be accountable for project progress to stakeholders Work effectively within a multi‑disciplinary team of top scientists and engineers Mentor engineering staff for effectiveness and delivery of on‑time & in‑spec outcomes Get things done: drive projects, consistently deliver, act with speed What we're looking for: Master's degree in Mechanical Engineering or related field (or equivalent industrial experience) 15+ years of experience with at least 7 years of experience working as a principal mechanical design engineer or engineering team lead in a relevant context: design and implementation of R&D systems and manufacturing equipment Ability to conceive of novel solutions for complex engineering systems in challenging environments Expertise with 3D modeling; preferred experience with SolidWorks and NX Experience with COMSOL, ANSYS or other FEA tools Ability to select and qualify vendors for components or subsystems Demonstrated ability to lead in either direct or matrix structures Strong verbal and written communication skills and a dedication to high‑quality documentation Bonus points for: Ph.D. in Mechanical Engineering or related field (or equivalent industrial experience) Prior success building first‑of‑kind or experimental tools for material science or semiconductor R&D Familiarity in applying Semi‑S8, ASME, ACI, ASTM, and other mechanical standards to design solutions Experience with the operation of equipment in a manufacturing environment Must‑have Requirements: Ability to occasionally lift up to 50 lbs Perform activities such as stooping, climbing, standing, or sitting for extended periods of time Dedication to safety to mitigate industrial hazards that may include heat, cold, noise, fumes, strong magnets, lead (Pb), high voltage, and cryogenics Willingness to travel or work required nights/weekends/on‑call occasionally $150,000 - $225,000 a year Benefits Competitive compensation with equity 12.5 Company‑wide Holidays Flexible vacation days 10 sick days Generous parental leave policy Health, dental, and vision insurance 401(k) with employer matching Professional growth opportunities Team‑building activities #LI‑Onsite At CFS, we excel in fast‑paced environments, driven by our values of integrity, execution, impact, and self‑critique. As we grow, we're eager to bring on mission‑driven folks who offer diverse perspectives and fresh ways to tackle challenges. We value diversity deeply and are proud to be an equal opportunity employer by choice. We consider all qualified applicants equally, regardless of race, color, national origin, ancestry, citizenship status, protected veteran status, religion, physical or mental disability, marital status, sex, sexual orientation, gender identity or expression, age, or any other basis protected by law. This role requires compliance with U.S. laws concerning the export of controlled or protected technologies or information (collectively, “Export Control Laws #J-18808-Ljbffr

An AI-native engineering firm in San Francisco seeks a talented mechanical engineer to lead the design and commissioning of mechanical systems across various industrial applications. The role involves using innovative AI-powered engineering tools and working closely with cross-functional teams to create efficient solutions. Ideal candidates will have foundational knowledge in mechanical engineering, hands-on experience with fluid systems or HVAC, and excellent collaboration skills. This is an opportunity to be part of an engineering-led team driving impactful projects. #J-18808-Ljbffr

Altera .# **Job Details:**### ## **Job Description:****About the Role:**As a Physical Design Engineer at Altera, you will play a critical role in the backend implementation flow - from RTL/netlist through GDSII/tape-out for FPGA/SoC devices. You will collaborate with architecture, logic design, DFT, CAD/EDA, and manufacturing teams to achieve performance, power, and area (PPA) goals, with a particular emphasis on programmable logic structures, block and full-chip integration, and the unique demands of FPGA technologies (e.g., configurable logic blocks, routing fabrics, I/O rings, on-chip power domains).**Key Responsibilities:*** Execute physical design implementation tasks (floorplanning, power planning, placement, clock tree synthesis (CTS), routing, engineering change orders (ECO), extraction, sign-off preparation) from netlist to GDSII.* Apply PPA optimization techniques (performance/timing closure, power reduction, area efficiency) across block-level and full-chip hierarchies.* Collaborate with front-end design, architecture, and CAD/EDA tool teams to ensure physical design constraints, timing budgets, power budgets, and DFT insertions are met.* Develop and enhance physical design flows, methodologies, scripts, and automation frameworks (TCL, Python, Perl) to accelerate turnaround, improve QoR, and reduce manual intervention.* Participate in timing, power, EM/IR integrity, signal/power noise, and DRC/LVS/ERC verification for sign-off readiness.* Integrate FPGA-specific physical design aspects: configurable logic block placement, fabric routing, I/O ring optimization, power domains for programmable regulation, and yield optimization.* Debug physical design issues and interact with CAD tool vendors and internal tool teams to drive tool enhancements or workarounds.**Salary Range**The pay range below is for Bay Area California only. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance.**$127,400 - $184,400 USD**We use artificial intelligence to screen, assess, or select applicants for the position.### ## **Qualifications:****Minimum Qualifications:**Bachelor's degree in Electrical Engineering, Computer Engineering, or related field with 6+ years of experience in:* Hands-on digital/SoC physical design (synthesis through P&R and sign-off).* Industry-standard EDA tools (e.g., Synopsys IC Compiler/Fusion, Cadence Innovus/Encounter, PrimeTime, STAR-RCX, Calibre) for high-speed digital ASIC/SoC implementation.* Scripting/programming (TCL, Python, Perl, shell) for flow automation and productivity enhancement.* Physical design flow: floorplanning, CTS, placement, routing, power domain gating, clock domain crossing, multi-power domain design, timing closure, ECOs, and DRC/LVS/DFM resolution.* Power/IR analysis, signal/power integrity reporting, and corrective action planning.* Interfacing with front-end teams (RTL, architecture), CAD/EDA tool teams, and manufacturing/packaging teams.**Preferred Qualifications:*** Experience with advanced process nodes (7nm, 5nm or smaller) or FPGA/programmable logic device flows.* Familiarity with FPGA architecture: routing fabrics, programmable logic blocks (PLBs), on-chip networks, I/O rings, static/dynamic reconfiguration.* Expertise in low-power design methodologies, power grid design, power gating, multi-voltage domain implementation, and power sign-off flows.* Prior exposure to full-chip integration flows (block-to-chip convergence) and high-frequency (1 GHz+) timing closure.* Experience in high-volume manufacturing environments, including yield and DFM/DFY considerations.* Experience mentoring or leading small physical design sub-teams or owning major P&R blocks.### ## **Job Type:**Regular### ## **Shift:**Shift 1 (United States of America)### ## **Primary Location:**San Jose, California, United States### ## **Additional Locations:**### ## **Posting Statement:**All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. #J-18808-Ljbffr

A tech startup focused on CAD intelligence is seeking a talented individual to own the creation and refinement of computational geometry features using Python and C++. You'll collaborate closely with engineers and gain insights from customers to shape the product roadmap. The role offers a generous equity package, opportunities for growth, and relocation assistance to San Francisco. Excellent communication skills and experience with reinforcement learning algorithms are required. #J-18808-Ljbffr

A cutting-edge AI lab in San Francisco is seeking experienced end-to-end engineers to join their small, talent-dense team. The role involves building innovative software products, enhancing user experiences, and collaborating closely with product teams. Ideal candidates should have experience with Python, Typescript, and React. Strong achievers who thrive in fast-moving environments are encouraged to apply. #J-18808-Ljbffr

A global technology company is looking for a seasoned software engineer to enhance AI capabilities within their observability platform. Candidates should have a strong background in AI/ML systems, cloud computing, and robust technical leadership. This role is pivotal in driving innovation in data analysis and delivering scalable solutions. The ideal candidate will thrive in an agile environment and provide mentorship to junior engineers. Enjoy competitive salaries and benefits while contributing to impactful technology solutions. #J-18808-Ljbffr

About the Team OpenAI's Hardware team designs the custom silicon that powers the world's most advanced AI systems. From system‑level architecture to custom circuit implementations, we partner closely with model and infrastructure teams to deliver performance, power, and efficiency breakthroughs across all layers of the stack. About the Role We are seeking a highly skilled Silicon Implementation Engineer with deep expertise in physical design and methodology. This individual contributor role sits within our physical design team and is central to delivering power, performance, and area (PPA) optimized datapath and interconnect solutions for next‑generation AI accelerators. You'll work closely with RTL designers to define and execute on physical design strategies. You will develop tools, flows and methodologies to increase team productivity. Your work will directly impact silicon's performance and cost efficiency, as well as the team's execution velocity and quality. In this role, you will: Develop, build and own tools, flows and methodologies for physical implementation Own physical implementation of floorplan blocks from floorplanning to final signoff Collaborate with RTL designers to drive optimal block implementation solutions Analyze and optimize design for timing, power, and area trade‑offs, working in collaboration with EDA vendors and ASIC partners Qualifications: BS w/ 4+ or MS with 2+ years or PhD with 0-1 year(s) of relevant industry experience in physical design and methodology development Demonstrated success in taping out complex silicon designs Hands‑on experience with block physical implementation and PPA convergence Strong coding experience with python, bazel, TCL Strong experience building physical design tools, flows and methodologies Strong understanding of microarchitecture, RTL design, physical design, circuit design, physical verification and timing closure. Deep familiarity with industry‑standard tools and flows for physical synthesis, PNR, LEC and power estimation Bonus: Experience with AI or HPC‑focused chips Experience with optimizing PPA for high performance compute cores Hands‑on experience with top‑level design methodologies About OpenAI OpenAI is an AI research and deployment company dedicated to ensuring that general‑purpose artificial intelligence benefits all of humanity. We push the boundaries of the capabilities of AI systems and seek to safely deploy them to the world through our products. AI is an extremely powerful tool that must be created with safety and human needs at its core, and to achieve our mission, we must encompass and value the many different perspectives, voices, and experiences that form the full spectrum of humanity. We are an equal opportunity employer, and we do not discriminate on the basis of race, religion, color, national origin, sex, sexual orientation, age, veteran status, disability, genetic information, or other applicable legally protected characteristic. For additional information, please see OpenAI's affirmative Action and Equal Employment Opportunity Policy Statement Background checks for applicants will be administered in accordance with applicable law, and qualified applicants with arrest or conviction records will be considered for employment consistent with those laws, including the San Francisco Fair Chance Ordinance, the Los Angeles County Fair Chance Ordinance for Employers, and the California Fair Chance Act, for US‑based candidates. For unincorporated Los Angeles County workers: we reasonably believe that criminal history may have a direct, adverse and negative relationship with the following job duties, potentially resulting in the withdrawal of a conditional offer of employment: protect computer hardware entrusted to you from theft, loss or damage; return all computer hardware in your possession (including the data contained therein) upon termination of employment or end of assignment; and maintain the confidentiality of proprietary, confidential, and non‑public information. In addition, job duties require access to secure and protected information technology systems and related data security obligations. To notify OpenAI that you believe this job posting is non‑compliant, please submit a report through this form. No response will be provided to inquiries unrelated to job posting compliance. We are committed to providing reasonable accommodations to applicants with disabilities, and requests can be made via link. OpenAI Global Applicant Privacy Policy At OpenAI, we believe artificial intelligence has the potential to help people solve immense global challenges, and we want the upside of AI to be widely shared. Join us in shaping the future of technology. #J-18808-Ljbffr

A blockchain-based payment company is looking for an early Product Engineer to help partners move money on-chain. You will work with design partners to build production-ready applications. Responsibilities include delivering customer applications, building fullstack solutions, and collaborating with cross-functional teams. The ideal candidate has strong TypeScript skills, and needs to thrive in a collaborative, high-energy environment. This role is perfect for engineers aspiring to take initiative and deliver impactful solutions. #J-18808-Ljbffr

A company specializing in robotic systems seeks a Mechanical Design Engineer to design and build mechanical subsystems from concept to prototype. This hands-on role involves using CAD, collaborating with electrical and software teams, and fabricating prototypes in a shop environment. Candidates should have a strong engineering portfolio and experience on hands-on engineering teams. The position is in California and requires in-person presence. #J-18808-Ljbffr

A leading fusion energy company in Milpitas is seeking a Principal Mechanical Engineer to join their R&D team focused on advanced thin-film deposition technology. Responsibilities include designing R&D equipment, leading complex projects, and mentoring engineering staff. The ideal candidate will have a Master's in Mechanical Engineering, over 15 years of experience in mechanical design, and familiarity with tools such as SolidWorks and ANSYS. Competitive salary and benefits are offered, including 12.5 holidays and flexible vacation days. #J-18808-Ljbffr

Mill is all about answering a simple question: how can we prevent waste? Less waste can save time, money, energy, maybe even our planet. And there's no better place to start than food. Food waste is one of the most solvable climate problems facing us today. Plus, our trash really stinks. It's gross, heavy, and our least favorite chore. At Mill we are striving to build a better environment for all, as we take on climate and kitchen change. As a member of Mill's Product Design Engineering team you will be part of a cross functional team to design, validate and ship Mill's hardware products. You will work closely with other members of the PD team as well as cross functional groups including Industrial Design, Electrical Engineering, Reliability, Product Management and Operations. Objectives of this role: Design mechanical systems to balance complex tradeoffs between cross functional teams including Industrial Design, Electrical Engineering, Reliability, Product Management and Operations Generate detailed CAD models, specifications and documentation Prototype, Test and Analyze component and system designs Validate and system performance and iterate designs to achieve targets Create predictive models and correlate with real world performance Perform root cause analysis of performance failures and drive corrective actions Work directly with the supply chain to ensure parts are properly manufactured and assembled. Qualifications BS degree in mechanical engineering or equivalent 2 + years experience working in mechanical product design. Consumer Electronics or Home Appliance industries are preferred Expertise in CAD modeling, experience with NX is preferred. Detailed knowledge of plastic and metal part manufacturing processes Solid understanding of product design concepts including Design for Manufacturing (DFM), Design for Assembly (DFA), Tolerance Analysis Demonstrated ability to apply engineering fundamentals to find simple solutions to complex problems A strong desire to work hands-on Strong communication skills The estimated base salary range for this position is $150k to $175k, which does not include the value of benefits or a potential equity grant. A wide range of factors are considered in making compensation decisions, including but not limited to skill sets, market conditions, experience and training, licensure and certifications, and business and organizational needs. #J-18808-Ljbffr

A leading technology company in San Jose is looking for a recent graduate or PhD candidate for an AI/ML development role. The position requires backend development skills in Go or Python and understanding of LLM infrastructure. Candidates should be ready to collaborate with cross-functional teams, optimizing models for real-world deployment. This role offers competitive salary ranges based on location, benefiting from Cisco's extensive employee perks and growth opportunities. #J-18808-Ljbffr

About the Team The Scaling team is responsible for the architectural and engineering backbone of OpenAI's infrastructure. We design and deliver advanced systems that support the deployment and operation of cutting‑edge AI models. Our work spans system software, networking, platform architecture, fleet‑level monitoring, and performance optimization. As part of the Stargate initiative, the Industrial Compute team's mission is to build and operate the foundation that powers our research and products. To deliver on this mission, there is a critical need for advanced lab infrastructure and capabilities to perform rapid prototyping, targeted and end‑to‑end testing, and system qualification across the full software and hardware stack to ensure readiness and stability for fast and smooth deployment of our large‑scale clusters. About the Role We are seeking an experienced engineer to lead advanced R&D, rapid prototyping, and build‑out of in‑house lab infrastructure to support system bring‑up, testing, and qualification for next‑generation systems. In this role, you will: You will work closely with the research, fleet, silicon, hardware health, and external vendors and partners to accelerate system qualification, increase deployment velocity, and improve platform and fleet robustness at scale. You will focus on detailed evaluation and systematic testing of early hardware, including servers, racks, NICs, switches, chips, optics, transceivers, and other lab prototype equipment. Your engineering work will span a broad range of software (systems, firmware, RDMA, collectives, cluster provisioning, orchestration, etc.) and/or hardware solutions (e.g., FPGA development) to manage lab infrastructure, support bring‑up activities and perform extensive characterizations of new hardware through microbenchmarking, fault injection, impairment modelling, localized stress testing, and end‑to‑end evaluations. This role is based in San Francisco, CA or Seattle, WA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. You might thrive in this role if you: Bachelor's Degree in Computer Science or a related field Strong background in system architecture, large‑scale distributed systems and AI/HPC networking expertise (high performance multipath transport protocols, RDMA, RoCE, Infiniband) 5+ years of software development experience in C/C++ and Python Experience developing and running large‑scale distributed AI workloads Hands‑on lab experience with datacenter hardware (racks, servers, switches, NICs, accelerators, etc.) Experience with low‑level software and/or FPGA hardware development (e.g., firmware or RTL) About OpenAI OpenAI is an AI research and deployment company dedicated to ensuring that general‑purpose artificial intelligence benefits all of humanity. We push the boundaries of the capabilities of AI systems and seek to safely deploy them to the world through our products. AI is an extremely powerful tool that must be created with safety and human needs at its core, and to achieve our mission, we must encompass and value the many different perspectives, voices, and experiences that form the full spectrum of humanity. We are an equal opportunity employer, and we do not discriminate on the basis of race, religion, color, national origin, sex, sexual orientation, age, veteran status, disability, genetic information, or other applicable legally protected characteristic. For additional information, please see OpenAI's affirmative action and equal employment opportunity policy statement. Background checks for applicants will be administered in accordance with applicable law, and qualified applicants with arrest or conviction records will be considered for employment consistent with those laws, including the San Francisco Fair Chance Ordinance, the Los Angeles County Fair Chance Ordinance for Employers, and the California Fair Chance Act, for US‑based candidates. For unincorporated Los Angeles County workers: we reasonably believe that criminal history may have a direct, adverse and negative relationship with the following job duties, potentially resulting in the withdrawal of a conditional offer of employment: protect computer hardware entrusted to you from theft, loss or damage; return all computer hardware in your possession (including the data contained therein) upon termination of employment or end of assignment; and maintain the confidentiality of proprietary, confidential, and non‑public information. In addition, job duties require access to secure and protected information technology systems and related data security obligations. To notify OpenAI that you believe this job posting is non‑compliant, please submit a report through this form. No response will be provided to inquiries unrelated to job posting compliance. We are committed to providing reasonable accommodations to applicants with disabilities, and requests can be made via this link. OpenAI Global Applicant Privacy Policy At OpenAI, we believe artificial intelligence has the potential to help people solve immense global challenges, and we want the upside of AI to be widely shared. Join us in shaping the future of technology. #J-18808-Ljbffr

Tempo is a layer-1 blockchain purpose-built for stablecoins and real-world payments, born from Stripe's experience in global payments and Paradigm's expertise in crypto tech. Tempo's payment-first design provides a scalable, low-cost predictable backbone that meets the needs of high-volume payment use cases. Our goal is to move money reliably, cheaply, and at scale. Our north star is simplicity for users: fintechs, traditional banks, merchants, platforms, and anyone else looking to move their payments into the 21st century. We're building Tempo with design partners who are global leaders in AI, e-commerce, and financial services: Anthropic, Coupang, Deutsche Bank, DoorDash, Mercury, Nubank, OpenAI, Revolut, Shopify, Standard Chartered, Visa, and more. We're a team of crypto-optimists, building the infrastructure needed to bring real, substantial economic flows onchain. We like to move fast and swing for the fences - join us! The Role We're hiring for an early Product Engineer to help Tempo's partners move money on-chain. You'll work directly with design partners to diagnose, design, build, and deliver production-ready applications and integrations. You'll build world-class products that bring together the best in wallets, APIs, explorers, and payment systems, capable of turning any customer need into running code. This is a deeply technical, high-ownership role for someone who thrives on autonomy, collaboration, and execution. The ideal candidate combines the mindset of a product-oriented engineer with the instincts of a customer-facing developer, working across Tempo's stack to unblock integrations, ship fixes quickly, and feed insights back into Product and Engineering. The role is ideal for customer- and product-centric engineers who aspire to be founders. Responsibilities Scope, architect, and deliver customer applications that meet functional, security, and reliability requirements Build and own fullstack partner applications across frontend, backend, and on-chain components for partners on Tempo Stand up reliable backends with services, queues, and data models; integrate partner systems and third-party SDKs; optimize for performance and cost Prototype to validate with POCs and middleware to unblock partners quickly, and graduate successful patterns to production quality Collaborate with Product, Partnerships, and Engineering to prioritize and land high-impact improvements surfaced from the field Customer engagements can range from month-long embedded product builds, to week-long feature deliveries, to short-term Q&A and support work Qualifications Experience as a fullstack software engineer or forward deployed engineer at a blockchain, fintech, or infrastructure company. Prior experience with customer-facing roles is not required, but may be beneficial. Deep proficiency in TypeScript is a must to build performant, delightful product experiences. The ideal candidate can take customer requirements to architect and design a solution, ship into production, and debug across frontend, backend, SDK, and onchain layers. Nice to have Wagmi, Viem, and Foundry experience and bonus for Solidity, Go, Rust, and infrastructure experience. Strong communication and customer empathy; able to bridge technical depth with clear, actionable guidance for non-technical audiences. Proven ability to operate independently and make product-level tradeoffs in high-context, fast-moving environments Attributes High-energy, proactive, and execution-driven Engineer by trade with a deep curiosity for how systems work end-to-end Sharp communicator who can represent Tempo's technology with clarity and conviction Highly autonomous, comfortable prioritizing and shipping fixes directly in the field Collaborative and adaptable; learns fast from partners and feeds insights back into the product loop Scrappy and hands-on; willing to dive deep to make integrations succeed #J-18808-Ljbffr

About the Team The Sora team is working on making video a key capability of OpenAI's foundation models. We are a hybrid research and product team that seeks to understand and expand the capabilities of our video models, while ensuring their reliability and safety. We accomplish this both through directly studying and experimenting with the models, as well as deploying them into the real-world to distribute their benefits widely. About the Role As a Distributed Systems/ML engineer, you will work on improving the training throughput for our internal training framework and enable researchers to experiment with new ideas. This requires good engineering (for example designing, implementing, and optimizing state-of-the-art AI models), writing bug-free machine learning code (surprisingly difficult!), and acquiring deep knowledge of the performance of supercomputers. We're looking for people who love optimizing performance, understanding distributed systems, and who cannot stand having bugs in their code. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: Collaborate with researchers to enable them to develop systems-efficient video models and architectures Apply the latest techniques to our internal training framework to achieve impressive hardware efficiency for our training runs Profile and optimize our training framework You might thrive in this role if you: Have experience working with multi-modal ML pipelines Love diving deep into systems implementations and understanding their fundamentals in order to improve their performance and maintainability Have strong software engineering skills and are proficient in Python. Have experience understanding and optimizing training kernels Are passionate about understanding stable training dynamics About OpenAI OpenAI is an AI research and deployment company dedicated to ensuring that general-purpose artificial intelligence benefits all of humanity. We push the boundaries of the capabilities of AI systems and seek to safely deploy them to the world through our products. AI is an extremely powerful tool that must be created with safety and human needs at its core, and to achieve our mission, we must encompass and value the many different perspectives, voices, and experiences that form the full spectrum of humanity. We are an equal opportunity employer and do not discriminate on the basis of race, religion, national origin, gender, sexual orientation, age, veteran status, disability or any other legally protected status. OpenAI Affirmative Action and Equal Employment Opportunity Policy Statement For US Based Candidates: Pursuant to the San Francisco Fair Chance Ordinance, we will consider qualified applicants with arrest and conviction records. We are committed to providing reasonable accommodations to applicants with disabilities, and requests can be made via this link. OpenAI Global Applicant Privacy Policy At OpenAI, we believe artificial intelligence has the potential to help people solve immense global challenges, and we want the upside of AI to be widely shared. Join us in shaping the future of technology. Compensation Range: $380K - $555K #J-18808-Ljbffr