Electrical Engineer jobs at Modis - 4287 jobs

A leading RF components manufacturer in New York seeks an Engineering professional to design and scale automated production test systems for RF and Microwave components. The ideal candidate will possess a relevant engineering degree and have a minimum of 5 years of experience with robotic systems and automation. This is a full-time position offering a salary range of $100,000 - $125,000 per year and comprehensive benefits. #J-18808-Ljbffr

Our team is responsible for designing rack power solutions covering in-rack AC/DC and DC/DC, to support our fast growing infrastructure at scale. Internally, we work closely with cross-functional teams to define the most efficient power hardware system, and to optimize for data center deployment. Externally, we work closely with industry partners, driving through the design cycle from beginning to end, ensuring high-quality product delivery. Our designs have been contributed to the Open Compute Project. Required Skills: Hardware Engineer, Power Responsibilities: Define and design rack level power systems to enable integration of a variety of IT gears into Meta data centers Work with cross-functional teams to drive product qualification full test coverage to meet product requirements and ensure product deployment Review and drive the product development with external power vendors, including in-depth design review, thorough test report review and manufacturing test coverage review. Create verification test case as needed Review circuit/PCB design, calculation and simulation Review and check bug reports Review and check manufacturing test reports Support trouble shooting and resolution for product operation issues in the field Contribute to rack level power system solution roadmap with cross-functional teams and vendor partners to ensure long term scalability of Meta power infrastructure Minimum Qualifications: Minimum Qualifications: BS in Electrical Engineering or Power Electronics 5+ years of experience in power supply design 5+ years of experience with AC-DC power conversion topologies, such as various active PFC approaches, PWM converters and resonant converters 5+ years of experience with high power redundant AC-DC power supply design and proven track of successfully delivering products into production 5+ years of experience with design tools for schematic, layout and simulation, such as Cadence, PCad, Mathcad, PSpice, or Simetrix/Simplis 5+ years of experience with product bring-up and troubleshooting skills with power supply testing methodologies 5+ years of experience developing design specifications, design guidelines, and test plans Preferred Qualifications: Preferred Qualifications: Familiar with rack level power system Familiar with digital bus design, such as I2C/PMBus, Modbus, and CANbus Familiar with safety standards and application process Familiar with power supply qualification standard and process, such as components derating, MTBF and EMC Detail oriented communication skills Experience with Data center power delivery is a plus Familiar with DC/DC power system design and evaluation is a plus Public Compensation: $139,000/year to $200,000/year + bonus + equity + benefits Industry: Internet Equal Opportunity: Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment. Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@fb.com. #J-18808-Ljbffr

San Francisco Bay Area, California, United States Hardware You will serve as a technical leader and strategic partner, driving the specification, development, and characterization of advanced silicon sensing solutions across Apple's product ecosystem. With deep expertise in silicon sensor technologies, you will bridge technical execution with executive‑level strategy and decision‑making, acting as the central connection point across engineering disciplines, product teams, and executive leadership. Description The Motion Sensing Hardware team operates in a highly collaborative environment alongside world‑class engineers developing cutting‑edge sensor technologies. This team architects and delivers innovative silicon‑based sensing solutions across Apple's full product portfolio including iPhone, Vision and emerging product categories. Engineering rigor and attention to detail are fundamental expectations. Innovation and intellectual property development are actively encouraged and supported through Apple's robust patent program. The mission of this sensing technology team is to push the boundaries of what's possible-designing and shipping breakthrough products that feature best‑in‑class sensor performance and deliver exceptional user experiences. Responsibilities Lead vendor relationships for custom silicon sensor development and qualification programs Translate complex technical concepts into clear business insights for executive leadership Drive cross‑functional collaboration across hardware, software, algorithm, and operations teams Define strategic sensor technology roadmaps aligned with product vision and business objectives Influence key architectural decisions and drive consensus on critical trade‑offs Develop comprehensive test methodologies and characterization plans for sensor performance Lead root cause analysis and implement corrective actions for sensor performance issues Mentor and provide technical leadership to engineers across the organization Present technical reviews and program updates to senior leadership and executive teams Minimum Qualifications BS and a minimum of 10 years relevant industry experience Experience in sensor development, MEMS technologies, or related semiconductor fields Deep expertise in MEMS design principles, semiconductor fabrication processes, and sensor performance characterization Proven track record of executive‑level communication and presenting technical content to senior leadership Demonstrated ability to lead cross‑functional programs and drive alignment across diverse teams Preferred Qualifications Advanced degree (MS or PhD) in Electrical/Mechanical Engineering, Physics, or related field Experience with motion sensing technologies including accelerometers, gyroscopes, inertial measurement units, pressure sensors, and magnetometers Track record of successful vendor management and development partnerships and experience shipping consumer products at high volume Compensation and Benefits At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $181,100 and $318,400, and your base pay will depend on your skills, qualifications, experience, and location. Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program. Equal Opportunity Employer Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant. Apple accepts applications to this posting on an ongoing basis. #J-18808-Ljbffr

A global technology company is seeking a Reliability Engineer in New York to conduct reliability studies and coordinate qualification of new products. The ideal candidate will have a background in mechanical engineering or related fields and 3-5 years of experience in the semiconductor industry. Key responsibilities include designing and executing qualification tests and collaborating with engineering teams to ensure product reliability. #J-18808-Ljbffr

A leading tech company is seeking an RTL Design Engineer in Sunnyvale, CA to shape the future of AI/ML hardware acceleration. The ideal candidate will work on cutting-edge TPU technology, taking part in ASIC development to enhance computational efficiency in data centers. Responsibilities include defining project scope, design, and documentation of next-generation data center accelerators, alongside collaborative efforts with cross-functional teams to drive innovations that empower billions of users globally. Comprehensive education and experience in relevant engineering fields are essential. #J-18808-Ljbffr

A leading tech company in Sunnyvale seeks a Physical Design Engineer to contribute to the development of cutting-edge TPU technology. You will collaborate with various teams to enhance design processes, focusing on innovative solutions for AI/ML applications. Candidates should have relevant experience in physical design, strong qualifications in Electrical Engineering, and skills in scripting languages like Python. The role offers a competitive salary range and numerous benefits, with a strong emphasis on diversity and inclusion. #J-18808-Ljbffr

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: We are looking for an ASIC Design Engineer, GPU/ML Shader Core who are motivated to challenge the status quo. If you are excited about building the next generation GPU/MI shader core, our team is on the lookout for you! You will be part of a fast-paced team working on the Graphics shader design, a team of engineers of varied disciplines who are responsible for micro-architecting, designing, and delivering GPU and ML/AI shader IP for various products. Since we are the heart of GPU engine, we strive to challenge ourselves in exceeding area, power, and performance targets. No idea is too small; we welcome every initiative that makes our product better. THE PERSON: You are an “out of the box” thinker, motivated to absorb dynamic changes and thirsty to keep innovating. You will work on the sub-block inside programmable engine aka shader core of the GPU. The shader core plays a key role in running applications program, feeding, and consuming the data to/from GPU shader resources and computing mathematical operations. Collaborate with software, architect, micro-architect and logic design team members to define and tackle “how to efficiently own an application program with the least number of instructions and data transfer while consuming the least amount of power”. Strong interpersonal skills and an excellent teammate. KEY RESPONSIBILITIES: Collaborate with block architect, ASIC designers and verification engineers to define and document block micro-architecture and analyze architectural trade-offs based on features, performance requirements and system limitations Responsible for owning full design cycle from defining micro-architecture, implementing RTL, and deliver fully verified and PD timing clean design. Consult DV engineers in describing features, outlining test plans, and closing on coverage Assist DV engineers to debug functional, performance or power test failures Work with Physical Design team to close on timing, area and power requirements PREFERRED EXPERIENCE: Experience in micro-architecture and RTL development (Verilog), focused on GPU/CPU/ML/AI pipelines, arbiters, scheduling, synchronization & bus protocols, interconnect networks and/or caches. Good understanding of ASIC design flow including RTL design, verification, logic synthesis and timing analysis. Exposure to Digital systems and VLSI design, Computer Architecture, Computer Arithmetic, CMOS transistors and circuits is required. ACADEMIC CREDENTIALS: Undergraduate degree required. Bachelors or Masters degree in Computer Engineering/Electrical Engineering preferred. LOCATION: Santa Clara CA - San Diego CA - Folsom CA This role is not eligible for Visa sponsorship. Benefits offered are described: AMD benefits at a glance AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. #J-18808-Ljbffr

A leading technology company in Santa Clara seeks an experienced ASIC Design Engineer specializing in GPU/ML Shader Core. In this role, you will define micro-architecture, implement RTL, and collaborate with various engineering teams. Ideal candidates will have experience in micro-architecture and an undergraduate degree in Computer Engineering or Electrical Engineering. Enjoy a vibrant culture that fosters innovation and teamwork, while pushing the boundaries of next-generation computing. This role does not offer visa sponsorship. #J-18808-Ljbffr

A leading platform for human + AI collaboration in San Francisco seeks a Staff CI/CD Engineer to enhance and develop high-performance CI/CD pipelines. The ideal candidate will have extensive experience in software engineering, particularly in CI/CD for large-scale environments, and possess strong leadership abilities. This role offers competitive compensation ranging from $248,000 to $282,000 annually, along with additional benefits and a hybrid work model. #J-18808-Ljbffr

A leading technology company is seeking a skilled Design Verification Engineer to focus on functional and performance verification of GPU designs in San Jose, California. This role involves developing verification plans, maintaining UVM-based environments, and collaborating with multiple teams to ensure adherence to specifications. The ideal candidate should have a Bachelor's degree and significant experience in ASIC/SoC/GPU/CPU development, particularly in verification processes. It is a 6-month onsite contract position. #J-18808-Ljbffr

Prodapt is a global technology company and the largest specialized player in the Connectedness industry. As an AI-first strategic partner, Prodapt provides consulting, business transformation, and managed services to top telecom and tech enterprises. Prodapt ASIC Services is a leading provider of SoC ASIC/FPGA and Embedded Software services. We offer turnkey solutions, Offshore Design Centers (ODCs), and staff augmentation across key areas like RTL Design, UVM Verification, Emulation, FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up. Our embedded services include firmware, device drivers, RTOS porting, and board bring-up. A “Great Place To Work Certified™” company, Prodapt employs over 6,000 technology and domain experts in 30+ countries. Prodapt is part of The Jhaver Group, which employs over 32,000 people across 80+ locations globally. Prodapt is seeking a highly skilled Design Verification Engineer to focus on functional and performance verification of cutting-edge GPU designs, ensuring they meet stringent quality and specification requirements. In this role, you will develop and execute verification plans, build and maintain UVM-based environments, and collaborate closely with design and architecture teams to drive verification closure on complex GPU blocks and subsystems. 6 month contract Onsite in Austin, TX Responsibilities Develop and execute comprehensive verification plans for GPU designs, including defining verification goals, test strategies, and coverage metrics. Design, develop, and maintain verification testbenches and environments using SystemVerilog, UVM, and C++ to verify GPU functionality, performance, and power-related features. Create complex test scenarios and test cases to achieve comprehensive functional and performance coverage of GPU features and micro-architecture. Analyze simulation and regression results, debug complex GPU designs, identify root causes, and drive bug resolution in collaboration with design and architecture engineers. Work closely with cross-functional teams, including design, architecture, and software, to align verification efforts with project milestones and product requirements. Maintain accurate and up-to-date documentation for verification plans, testbenches, test cases, and results to support traceability and reviews. Requirements Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or a related technical field; or equivalent practical experience. 10+ years of industry experience with a Bachelor's, 8+ years with a Master's, or 6+ years with a PhD in relevant domains of ASIC/SoC/GPU/CPU development. 5+ years of hands-on experience in GPU/CPU design verification or closely related IP/subsystem verification. Strong proficiency in SystemVerilog and UVM for block-level and/or subsystem-level verification. Experience with industry-standard verification tools and simulators (e.g., VCS, Xcelium, Questa, Verdi or similar) and coverage-driven verification flows. Proficiency with scripting languages such as Python and Perl for automation, regression management, and data analysis. Demonstrated strength in debugging, root-cause analysis, and driving verification closure in complex designs. Excellent communication and interpersonal skills, with the ability to work effectively in a collaborative, cross-functional environment. #J-18808-Ljbffr

A leading aerospace and defense company is looking for a Senior Principal Electronics Engineer - Hardware and Software Integration Lead in San Diego. This role involves leading the development of next-generation ground system solutions, managing software supplier interactions, and coordinating various engineering efforts. Candidates should have a strong background in STEM, relevant work experience, and active security clearance. The position requires on-site work but could offer hybrid options in the future. #J-18808-Ljbffr

A technology company in San Jose is seeking a Senior ASIC/RTL Design Engineer to contribute to the development of large SoCs. The role requires expertise in RTL ownership, complex timing constraints, and EDA tools, alongside strong communication skills. Candidates should have a Bachelor's or Master's degree in Electrical Engineering or Computer Engineering. This is a non-remote role requiring in-person presence, and does not offer visa sponsorship. #J-18808-Ljbffr

San Francisco Bay Area, California, United States Hardware We are seeking an engineer to architect next-generation display technologies for Apple products. In this unique role, you will have first-hand access to novel display innovations and will be responsible for designing display subsystems that integrate seamlessly into Apple devices. Description You will contribute to the development of groundbreaking display solutions by inventing original concepts that redefine visual performance, power efficiency, and system-level integration. Your work will ensure harmonious interaction among critical display module subsystems, including the panel, touch IC, power supply, timing controller, and row- and column-driver ICs. You will also be responsible for drafting display module electrical engineering specifications.This role demands strong collaboration with cross-functional teams to translate theoretical insights into manufacturable hardware. Responsibilities Performing detailed engineering analyses of silicon and system requirements Designing display architectures and prototypes, including bring-up and validation Delivering high-quality electrical hardware architecture specifications for display systems Preparing presentations for cross-functional teams and leadership to review designs and development progress Minimum Qualifications Bachelor's degree in Engineering (BS) with a minimum of three years of relevant industry experience Experience with electrical engineering fundamentals, including analog, mixed-signal, digital design, and power electronics Experience with complex system design and/or analog and mixed-signal circuit design Preferred Qualifications Master's or Ph.D. in a relevant field Hands‑on laboratory experience, including silicon debugging, IC characterization, and system validation Strong mathematical and analytical skills Prior knowledge of display and/or touch hardware and technologies Prior knowledge of analog and mixed‑signal circuit design, including op amps, ADCs, DACs, and power management ICs Experience with system modeling and system‑level integration Expert knowledge of MATLAB, Python, and/or circuit simulation tools Excellent verbal and written communication skills Strong leadership skills to coordinate efforts across Apple teams and external vendors Exceptional attention to detail to ensure error‑free designs and rapid time‑to‑market Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits. Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant. Apple accepts applications to this posting on an ongoing basis. #J-18808-Ljbffr

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: As a member of the front-end verification team you will be part of a multi-site team to help drive successful verification execution and prove the functional correctness of the next generation of AMD/Xilinx programmable devices. THE PERSON: You have a passion for digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Collaborate with architects, hardware and firmware engineers to understand the new features to be verified Take ownership of block level verification tasks Define test plans, test benches, and tests using System Verilog and UVM Debug RTL and Gate simulations and work with HW and SW development teams to verify fixes Review functional and code coverage metrics to meet the coverage requirements Develop and improve existing verification flows and environments PREFERRED EXPERIENCE: Strong understanding of computer architecture and logic design Knowledge of Verilog, system Verilog and UVM is a must Strong understanding of state of the art verification techniques, including assertion and constraint-random metric-driven verification Working knowledge of C/C++ and Assembly programming languages Exposure to scripting (python preferred) for post-processing and automation Experience with gate level simulation, power and reset verification ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering or a related field LOCATION: San Jose, CA #LI-DW1 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. #J-18808-Ljbffr

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. THE ROLE: Adaptive and Embedded Computing Group (AECG) seeks a Senior Silicon Design Verification Engineer to provide technical leadership and expertise in the verification of high-speed Crypto, Network‑on‑Chip (NoC), and cutting‑edge DRAM Memory Controller IPs (LPDDR6, HBM4). You will be responsible for architecting, developing, and utilizing simulation and/or formal‑based verification environments at both block and SoC‑level to achieve first‑pass silicon success. THE PERSON: The ideal candidate has a proven track record in driving strategies and successfully executing verification strategies for Pre‑Silicon Design IP and/or SOC designs. They should be strong team players with excellent communication and leadership skills, capable of positively and strategically influencing design teams to improve overall product quality. Key Responsibilities: Lead the verification of high‑speed Crypto, Network‑on‑Chip (NoC), cutting‑edge DRAM Memory controller (LPDDR6, DDR5) designs, ensuring the highest standards of quality and performance. Architect, develop, and use simulation and/or formal‑based verification environments at IP and SoC‑level. Lead and manage verification teams, including planning, execution, tracking, verification closure, and delivery to programs. Develop and execute comprehensive verification plans, including testbenches and test cases. Collaborate with design, architecture, and software teams to define and implement verification strategies. Utilize advanced verification methodologies, including UVM, formal verification, and assertion‑based verification. Mentor and guide junior engineers, fostering a collaborative and innovative team environment. PREFERRED EXPERIENCE: Proven track record in technical leadership of teams with 5+ engineers. This includes planning, execution, tracking, verification closure, and delivery to programs. Proven track record on driving strategies and successful verification execution of NoC, Crossbar switches, analysed and verified system‑level Performance and QoS (Quality of Service) requirements. Experience with development of UVM and System Verilog test benches and usage of simulation tools/debug environments such as Synopsys VCS or Cadence Xcelium. Require strong understanding of state of the art of verification techniques, including assertion and coverage‑driven verification. Experience as a verification architect, establishing the verification methodology, tools and infrastructure for high‑performance IP and/or VLSI designs is a plus. Familiarity with verification management tools as well as an understanding of database management particularly as it pertains to regression management. Experience with formal property checking tools such as VC Formal (Synopsys), JasperGold (Cadence), and Questa Formal (Mentor) is a plus. Experience with gate‑level simulation, power‑aware verification is a plus. Experience with silicon debug at the tester and board level, is a plus. ACADEMIC CREDENTIALS: BS, MS or PhD in Electrical Engineering, Computer Engineering or Computer Science. This role is not eligible for visa sponsorship. Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's “Responsible AI Policy” is available here. This posting is for an existing vacancy. #J-18808-Ljbffr

A technology company is recruiting for a remote Electronics Engineer for an AI research project. You will work asynchronously to evaluate AI models based on your professional experience in electronics. This role requires at least 4 years of experience in engineering, where you will develop prompts for AI, evaluate responses, and contribute meaningful feedback. Flexibility in hours and work location makes it an ideal opportunity for professionals. Ideal for those looking to engage with AI in their field while maintaining their current professional commitments. #J-18808-Ljbffr

At Capgemini Engineering, the world leader in engineering services, we bring together a global team of engineers, scientists, and architects to help the world's mostinnovative companies unleash their potential. From autonomous cars to life-saving robots, our digital and software technology experts think outside the box as theyprovide unique R&D and engineering services across all industries. Join us for a career full of opportunities. Where you can make a difference. Where no two days arethe same. About the job you're considering Position: IC CAD Engineer - Analog Mixed-Signal Flow Automation About the Role We are seeking a skilled IC CAD Engineer to support our Analog Mixed-Signal (AMS) design teams. In this role, you will be responsible for maintaining and enhancing the CAD infrastructure, automating design flows, and supporting physical verification processes. You will collaborate closely with both analog and digital design teams, ensuring efficient and reliable design environments. Key Responsibilities Administer and maintain the CAD/EDA environment for analog and digital IC design teams. Support and enhance design flows using tools from Cadence, Synopsys, Mentor, Keysight, Ansys, and others. Develop and maintain automation scripts using Python and other scripting languages. Manage and customize physical verification tools and decks (DRC, LVS, PEX, EM/IR, ESD, etc.). Support PDK administration, including installation, regression testing, and custom PDK development (pcells, models, rule decks). Collaborate with infrastructure teams to ensure optimal performance and availability of compute resources. Provide layout and verification support to design teams across global locations. Required Qualifications Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. 4+ years of experience in CAD engineering for IC design. Proficiency in Cadence Virtuoso, Calibre DRC/LVS, and other industry-standard tools. Strong scripting skills in Python, SKILL, and Perl. Solid understanding of analog and digital design flows. Experience with EMIR analysis, physical verification (DRC/LVS/PEX/ERC), and waiver handling. Strong fundamentals in software development and automation. Excellent communication skills and ability to work effectively with remote teams. Preferred Experience Hands‑on experience with tools from Keysight and Ansys. Familiarity with custom PDK development and automated regression testing. Job Description - Grade Specific Focus on Electrical, Electronics and Semiconductor. Fully competent in own area. Acts as a key contributor in a more complexor critical environment. Proactively acts to understand and anticipates client needs. Manages costs and profitability for a work area. Manages own agenda to meet agreed targets. Develop plans for projects in own area. Looks beyond the immediate problem to the wider implications. Acts as a facilitator, coach and moves teams forward. The base compensation range for this role in the posted location is: [$65,200 - $158,550 /yr] Capgemini provides compensation range information in accordance with applicable national, state, provincial, and local pay transparency laws. The base compensation range listed for this position reflects the minimum and maximum target compensation Capgemini, in good faith, believes it may pay for the role at the time of this posting. This range may be subject to change as permitted by law. The actual compensation offered to any candidate may fall outside of the posted range and will be determined based on multiple factors legally permitted in the applicable jurisdiction. These may include, but are not limited to: Geographic location, Education and qualifications, Certifications and licenses, Relevant experience and skills, Seniority and performance, Market and business consideration, Internal pay equity. It is not typical for candidates to be hired at or near the top of the posted compensation range. In addition to base salary, this role may be eligible for additional compensation such as variable incentives, bonuses, or commissions, depending on the position and applicable laws. Capgemini offers a comprehensive, non‑negotiable benefits package to all regular, full‑time employees. In the U.S. and Canada, available benefits are determined by local policy and eligibility and may include: Paid time off based on employee grade (A‑F), defined by policy: Vacation: 12‑25 days, depending on grade, Company paid holidays, Personal Days, Sick Leave Medical, dental, and vision coverage (or provincial healthcare coordination in Canada) Retirement savings plans (e.g., 401(k) in the U.S., RRSP in Canada) Life and disability insurance Employee assistance programs Other benefits as provided by local policy and eligibility Important Notice: Compensation (including bonuses, commissions, or other forms of incentive pay) is not considered earned, vested, or payable until it becomes due under the terms of applicable plans or agreements and is subject to Capgemini's discretion, consistent with applicable laws. The Company reserves the right to amend or withdraw compensation programs at any time, within the limits of applicable legislation. Disclaimers Capgemini is an Equal Opportunity Employer encouraging inclusion in the workplace. Capgemini also participates in the Partnership Accreditation in Indigenous Relations (PAIR) program which supports meaningful engagement with Indigenous communities across Canada by promoting fairness, accessibility, inclusion and respect. We value the rich cultural heritage and contributions of Indigenous Peoples and actively work to create a welcoming and respectful environment. All qualified applicants will receive consideration for employment without regard to race, national origin, gender identity/expression, age, religion, disability, sexual orientation, genetics, veteran status, marital status or any other characteristic protected by law. This is a general description of the Duties, Responsibilities and Qualifications required for this position. Physical, mental, sensory or environmental demands may be referenced in an attempt to communicate the manner in which this position traditionally is performed. Whenever necessary to provide individuals with disabilities an equal employment opportunity, Capgemini will consider reasonable accommodations that might involve varying job requirements and/or changing the way this job is performed, provided that such accommodation does not pose an undue hardship. Capgemini is committed to providing reasonable accommodation during our recruitment process. If you need assistance or accommodation, please reach out to your recruiting contact. Please be aware that Capgemini may capture your image (video or screenshot) during the interview process and that image may be used for verification, including during the hiring and onboarding process. Capgemini is a global business and technology transformation partner, helping organizations to accelerate their dual transition to a digital and sustainable world, while creating tangible impact for enterprises and society. It is a responsible and diverse group of 340,000 team members in more than 50 countries. With its strong over 55-year heritage, Capgemini is trusted by its clients to unlock the value of technology to address the entire breadth of their business needs. It delivers end‑to‑end services and solutions leveraging strengths from strategy and design to engineering, all fueled by its market‑leading capabilities in AI, generative AI, cloud and data, combined with its deep industry expertise and partner ecosystem. When you join Capgemini, you don't just start a new job. You become part of something bigger. We bring together passionate, skilled people, a tech‑driven approach to innovation, and a deep commitment to our clients to help organizations unlock the true value of technology. As a graduate or an experienced professional, you will be working with the world's leading brands to enhance and transform the way they do business. #J-18808-Ljbffr

A leading AI research company in San Francisco is seeking a Software Engineer for the Fleet Hardware team. This role focuses on ensuring the reliability and uptime of compute fleets, minimizing hardware failures. Responsibilities include building automation systems, collaborating with various technical teams, and developing monitoring tools. Ideal candidates have experience with large-scale server environments and proficiency in languages like Python or Go. OpenAI values safety and seeks individuals who can navigate complex hardware systems. #J-18808-Ljbffr