Architect jobs at NVIDIA - 328 jobs

NVIDIA's success builds on a foundation of industry leading hardware. We achieve distinction through extensive design optimization, including combining the best of external EDA with highly optimized, internal EDA tools. Our team develops these tools by fusing advances in parallel computing, machine learning, and specialized algorithms for VLSI design. We are seeking a Senior P&R Methodology Architect to define and own the next generation RTL2GDS flow for advanced nodes (3nm and below) and high performance GPU, CPU and SoC designs. You should have deep, hands‑on experience across the full RTL2GDS flow, with expertise in key stages such as RTL, DFT, synthesis, placement, optimization, CTS, routing, and signoff. Creativity and self-drive to explore is required. Our engineers enjoy unusually high intellectual freedom and the ability to explore broad roles. If you like to work across many technical areas and see your successes directly realized in the world's best AI hardware, it does not get any better than this! What you'll be doing: Working directly with core P&R engine developers to define real‑world optimization problems, shape requirements and roadmaps, and provide detailed feedback on engine behavior, QoR, and scalability. Defining and rolling out next‑gen flows, including refactoring legacy flows and consolidating ad‑hoc solutions into scalable, maintainable frameworks used across multiple design teams. Designing and running rigorous A/B and multi‑variant experiments to compare flows, engines, and tool settings. Developing Python‑based analytics and ML/GenAI techniques to mine large QoR datasets, recommend flow settings, and automate analysis. Performing deep root‑cause analysis on QoR issues across engines, tools, and flows, and driving methodologies to resolve the ‘long tail' of timing closure and performance limiters. Partnering with architecture, RTL, DFT, synthesis, physical design, power, signoff, and CAD/methodology teams as a key technical leader and bridge. Driving aggressive PPA and schedule targets and the adoption of new tools and flows across the company. What we need to see: BS or MS in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience. 8+ years physical design experience, with deep expertise in industry standard tools like ICC2/Innovus, PrimeTime/Tempus, etc. Extensive hands‑on P&R experience taking complex blocks or chips to tape‑out with aggressive PPA targets. Proven skills in Python, Perl, and TCL flow development. Strong problem‑solving skills and self‑motivation, demonstrated by simplifying complex, cluttered environments and modernizing legacy tools and processes. Excellent communication and collaboration skills, with a track record of driving consensus and solving complex issues across distributed design, CAD, and R&D teams. Ways to stand out from the crowd: Experience collaborating with EDA or internal R&D teams on core engine development, co‑defining features, developing benchmarks and leading validation and deployment. Expertise in designing and automating A/B tests and large‑scale regressions, and analyzing large QoR datasets to understand trends and drive root‑cause analysis. Background in advanced‑node and large‑scale designs with exposure to advanced‑node challenges (DFM, variability, EM/IR, power integrity). Hands‑on experience applying AI/ML or GenAI to physical design, QoR analysis, or flow development will be a strong plus. If working hands‑on from early architecture and RTL through silicon, and serving as the connector between core developers, methodology teams, and users, excites you, we want to hear from you. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD. You will also be eligible for equity and benefits. Applications for this job will be accepted at least until January 13, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

Introduction A career in IBM Consulting is rooted by long-term relationships and close collaboration with clients across the globe. You'll work with visionaries across multiple industries to improve the hybrid cloud and AI journey for the most innovative and valuable companies in the world. Your ability to accelerate impact and make meaningful change for your clients is enabled by our strategic partner ecosystem and our robust technology platforms across the IBM portfolio Your role and responsibilities Support client engagements to provide subject matter expertise in Oracle Cloud Financials implementations. Assume accountability for the solution design and the successful implementation of the full solution for on Oracle Cloud ERP Projects. May include hands‑on development, design, prototyping and/or other efforts required to keep the project on a successful track. Ensure that the proposed solution meets the client's requirements, is architecturally complete, and all architectural risks are quantified within their assigned area. Required technical and professional expertise 10+ years ERP implementation experience Played a Senior Solution Architect role on a minimum of 2 full lifecycle Oracle Cloud implementation projects in the USA Public Sector domain (city/state/local/county government) experience considered an asset Knowledge and experience in GASB Accounting and Reporting, Encumbrance Accounting, Fund Accounting, Projects and Grants Accounting and Management IBM is committed to creating a diverse environment and is proud to be an equal‑opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, gender, gender identity or expression, sexual orientation, national origin, caste, genetics, pregnancy, disability, neurodivergence, age, veteran status, or other characteristics. IBM is also committed to compliance with all fair employment practices regarding citizenship and immigration status. #J-18808-Ljbffr

A global consulting firm is seeking a Senior Solution Architect specializing in Oracle Cloud Financials in San Francisco. The role requires over 10 years of ERP implementation experience with at least two full lifecycle Oracle Cloud projects. A background in the Public Sector and knowledge of GASB Accounting are advantageous. This position offers an opportunity to work with innovative companies and make a significant impact on their cloud journeys. #J-18808-Ljbffr

A leading cloud technology company located in San Francisco is seeking an AI Specialist to support the Global Public Sector. This position requires expertise in AI solutions, strong communication skills, and a background in technical pre-sales. Responsibilities include designing AI applications, leading workshops, and working with product teams on innovation strategies. Ideal candidates will have a B.S. in a relevant field, and familiarity with predictive AI models, and experience with Salesforce tools is a plus. Competitive salary and comprehensive benefits offered. #J-18808-Ljbffr

A leading semiconductor company in California is looking for a Senior Silicon Design Verification Engineer to innovate in the verification of high-speed Crypto and Network-on-Chip designs. You will lead a team, develop verification strategies, and collaborate with cross-functional engineering teams. The ideal candidate has a strong leadership background, is proficient in UVM and System Verilog, and has a passion for fostering a collaborative environment. The role requires a relevant degree and strong communication skills. Competitive benefits are included. #J-18808-Ljbffr

We are seeking a Photomask Design Architect to join our innovative Mask Design team in San Jose, CA. In this critical role, you will be responsible for designing and optimizing photomasks for Wafer Development and Manufacturing based on electrical/ optical/ magnetic design specifications and process requirements, including post-wafer processing. * Design photomasks for magnetic HDD head wafers to enable technology leadership and on-time new product launch * Engage with wafer process integration & photo-lithography teams to define mask sequences (wafer alignment tree) and metrology requirements for new processes, new designs, and assure the electrical integrity of the head build * Define new wafer formats and wafer technology platforms. Interlock with wafer, slider, HGA, and staging teams to define electrical configuration, pad orientation/ assignments * Work with post-wafer teams to design ELG's, alignment marks for new product requirements to enable strategic roadmaps * Collaborate with cross-functional teams to optimize mask designs for manufacturability, high yields, and process robustness; engage in F/A activities * Maintain design rule decks for various wafer formats, head design, test structure and other wafer features * Interface with mask vendors to assure mask quality and delivery time reduction; enable multiple suppliers when possible * Provide technical guidance and mentorship to junior team members * Contribute to the development of new photomask design methodologies, best practices and automation Qualifications * Master's degree in Physics/ Chemistry/ Engineering. * 10+ years of experience in wafer process integration, photolithography and/or mask design * Experience with HDD head wafer products is needed * Prior work history within WD is preferred * Strong analytical skills for interpreting electrical, optical, and magnetic design requirements, data analysis * Exceptional attention to detail and precision in design work * Excellent project management and problem-solving abilities in a complex technical and fast-paced environment * Effective communication and collaboration skills; team player Additional Information Western Digital is committed to providing equal opportunities to all applicants and employees and will not discriminate based on their race, color, ancestry, religion (including religious dress and grooming standards), sex (including pregnancy, childbirth or related medical conditions, breastfeeding or related medical conditions), gender (including a person's gender identity, gender expression, and gender-related appearance and behavior, whether or not stereotypically associated with the person's assigned sex at birth), age, national origin, sexual orientation, medical condition, marital status (including domestic partnership status), physical disability, mental disability, medical condition, genetic information, protected medical and family care leave, Civil Air Patrol status, military and veteran status, or other legally protected characteristics. We also prohibit harassment of any individual on any of the characteristics listed above. Our non-discrimination policy applies to all aspects of employment. We comply with the laws and regulations set forth in the Equal Employment Opportunity is the Law poster. Western Digital thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. Western Digital is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at *********************** to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying. #L1-RR1 Compensation & Benefits Details * An employee's pay position within the salary range may be based on several factors including but not limited to (1) relevant education; qualifications; certifications; and experience; (2) skills, ability, knowledge of the job; (3) performance, contribution and results; (4) geographic location; (5) shift; (6) internal and external equity; and (7) business and organizational needs. * The salary range is what we believe to be the range of possible compensation for this role at the time of this posting. We may ultimately pay more or less than the posted range and this range is only applicable for jobs to be performed in California, Colorado, New York or remote jobs that can be performed in California, Colorado and New York. This range may be modified in the future. * If your position is non-exempt, you are eligible for overtime pay pursuant to company policy and applicable laws. You may also be eligible for shift differential pay, depending on the shift to which you are assigned. * You will be eligible to be considered for bonuses under either Western Digital's Short Term Incentive Plan ("STI Plan") or the Sales Incentive Plan ("SIP") which provides incentive awards based on Company and individual performance, depending on your role and your performance. You may be eligible to participate in our annual Long-Term Incentive (LTI) program, which consists of restricted stock units (RSUs) or cash equivalents, pursuant to the terms of the LTI plan. Please note that not all roles are eligible to participate in the LTI program, and not all roles are eligible for equity under the LTI plan. RSU awards are also available to eligible new hires, subject to Western Digital's Standard Terms and Conditions for Restricted Stock Unit Awards. * We offer a comprehensive package of benefits including paid vacation time; paid sick leave; medical/dental/vision insurance; life, accident and disability insurance; tax-advantaged flexible spending and health savings accounts; employee assistance program; other voluntary benefit programs such as supplemental life and AD&D, legal plan, pet insurance, critical illness, accident and hospital indemnity; tuition reimbursement; transit; the Applause Program; employee stock purchase plan; and the Western Digital Savings 401(k) Plan. * Note: No amount of pay is considered to be wages or compensation until such amount is earned, vested, and determinable. The amount and availability of any bonus, commission, benefits, or any other form of compensation and benefits that are allocable to a particular employee remains in the Company's sole discretion unless and until paid and may be modified at the Company's sole discretion, consistent with the law. Notice To Candidates: Please be aware that Western Digital and its subsidiaries will never request payment as a condition for applying for a position or receiving an offer of employment. Should you encounter any such requests, please report it immediately to Western Digital Ethics Helpline or email ******************.

At Western Digital, our vision is to power global innovation and push the boundaries of technology to make what you thought was once impossible, possible. At our core, Western Digital is a company of problem solvers. People achieve extraordinary things given the right technology. For decades, we've been doing just that. Our technology helped people put a man on the moon. We are a key partner to some of the largest and highest growth organizations in the world. From energizing the most competitive gaming platforms, to enabling systems to make cities safer and cars smarter and more connected, to powering the data centers behind many of the world's biggest companies and public cloud, Western Digital is fueling a brighter, smarter future. Binge-watch any shows, use social media or shop online lately? You'll find Western Digital supporting the storage infrastructure behind many of these platforms. And, that flash memory card that captures and preserves your most precious moments? That's us, too. We offer an expansive portfolio of technologies, storage devices and platforms for business and consumers alike. Our data-centric solutions are comprised of the Western Digital , G-Technology™, SanDisk and WD brands. Today's exceptional challenges require your unique skills. It's You & Western Digital. Together, we're the next BIG thing in data. Job Description We are seeking a Photomask Design Architect to join our innovative Mask Design team in San Jose, CA. In this critical role, you will be responsible for designing and optimizing photomasks for Wafer Development and Manufacturing based on electrical/ optical/ magnetic design specifications and process requirements, including post-wafer processing. Design photomasks for magnetic HDD head wafers to enable technology leadership and on-time new product launch Engage with wafer process integration & photo-lithography teams to define mask sequences (wafer alignment tree) and metrology requirements for new processes, new designs, and assure the electrical integrity of the head build Define new wafer formats and wafer technology platforms. Interlock with wafer, slider, HGA, and staging teams to define electrical configuration, pad orientation/ assignments Work with post-wafer teams to design ELG's, alignment marks for new product requirements to enable strategic roadmaps Collaborate with cross-functional teams to optimize mask designs for manufacturability, high yields, and process robustness; engage in F/A activities Maintain design rule decks for various wafer formats, head design, test structure and other wafer features Interface with mask vendors to assure mask quality and delivery time reduction; enable multiple suppliers when possible Provide technical guidance and mentorship to junior team members Contribute to the development of new photomask design methodologies, best practices and automation Qualifications Master's degree in Physics/ Chemistry/ Engineering. 10+ years of experience in wafer process integration, photolithography and/or mask design Experience with HDD head wafer products is needed Prior work history within WD is preferred Strong analytical skills for interpreting electrical, optical, and magnetic design requirements, data analysis Exceptional attention to detail and precision in design work Excellent project management and problem-solving abilities in a complex technical and fast-paced environment Effective communication and collaboration skills; team player Additional Information Western Digital is committed to providing equal opportunities to all applicants and employees and will not discriminate based on their race, color, ancestry, religion (including religious dress and grooming standards), sex (including pregnancy, childbirth or related medical conditions, breastfeeding or related medical conditions), gender (including a person's gender identity, gender expression, and gender-related appearance and behavior, whether or not stereotypically associated with the person's assigned sex at birth), age, national origin, sexual orientation, medical condition, marital status (including domestic partnership status), physical disability, mental disability, medical condition, genetic information, protected medical and family care leave, Civil Air Patrol status, military and veteran status, or other legally protected characteristics. We also prohibit harassment of any individual on any of the characteristics listed above. Our non-discrimination policy applies to all aspects of employment. We comply with the laws and regulations set forth in the Equal Employment Opportunity is the Law poster. Western Digital thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. Western Digital is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at [email protected] to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying. #L1-RR1 Compensation & Benefits Details An employee's pay position within the salary range may be based on several factors including but not limited to (1) relevant education; qualifications; certifications; and experience; (2) skills, ability, knowledge of the job; (3) performance, contribution and results; (4) geographic location; (5) shift; (6) internal and external equity; and (7) business and organizational needs. The salary range is what we believe to be the range of possible compensation for this role at the time of this posting. We may ultimately pay more or less than the posted range and this range is only applicable for jobs to be performed in California, Colorado, New York or remote jobs that can be performed in California, Colorado and New York. This range may be modified in the future. If your position is non-exempt, you are eligible for overtime pay pursuant to company policy and applicable laws. You may also be eligible for shift differential pay, depending on the shift to which you are assigned. You will be eligible to be considered for bonuses under either Western Digital's Short Term Incentive Plan (“STI Plan”) or the Sales Incentive Plan (“SIP”) which provides incentive awards based on Company and individual performance, depending on your role and your performance. You may be eligible to participate in our annual Long-Term Incentive (LTI) program, which consists of restricted stock units (RSUs) or cash equivalents, pursuant to the terms of the LTI plan. Please note that not all roles are eligible to participate in the LTI program, and not all roles are eligible for equity under the LTI plan. RSU awards are also available to eligible new hires, subject to Western Digital's Standard Terms and Conditions for Restricted Stock Unit Awards. We offer a comprehensive package of benefits including paid vacation time; paid sick leave; medical/dental/vision insurance; life, accident and disability insurance; tax-advantaged flexible spending and health savings accounts; employee assistance program; other voluntary benefit programs such as supplemental life and AD&D, legal plan, pet insurance, critical illness, accident and hospital indemnity; tuition reimbursement; transit; the Applause Program; employee stock purchase plan; and the Western Digital Savings 401(k) Plan. Note: No amount of pay is considered to be wages or compensation until such amount is earned, vested, and determinable. The amount and availability of any bonus, commission, benefits, or any other form of compensation and benefits that are allocable to a particular employee remains in the Company's sole discretion unless and until paid and may be modified at the Company's sole discretion, consistent with the law. Notice To Candidates: Please be aware that Western Digital and its subsidiaries will never request payment as a condition for applying for a position or receiving an offer of employment. Should you encounter any such requests, please report it immediately to Western Digital Ethics Helpline or email [email protected].

What you do at AMD changes everything At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies - building blocks for gaming, immersive platforms, and the data center. Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to take a look at the opportunities available to come join our team. HPC/ML GPU Performance Architect: AMD is looking for an outstanding technical contributor & lead to help optimize performance of AMD based next-generation GPU accelerators for HPC and Machine Learning. As a passionate and dedicated Server GPU Performance Architect in the MI SOC Architecture Team, you will optimize SOC performance by identifying opportunities across all parts of system architecture, spanning the application and related frameworks, driver, GPU core, memory & I/O subsystems. You will collect and analyze performance profiling data and traces to isolate performance bottlenecks, and share the insights to help drive features into the next generation of server GPUs and software stack components. The ideal candidate is expected to be well informed on latest trends in GPU accelerated HPC and ML, and be able to quickly ascertain, in a data-driven manner, how next generation server GPUs and platforms should be engineered to support those needs. Key Responsibilities: • Establishes and maintains AMD's technological leadership position • Considered technical leader across project and departmental boundaries and has a proven track record for sustained innovation. • Is responsible for projects or processes of significant strategic or commercial importance and for project/program results • Deals with problems requiring cutting edge approaches and champions innovation across the organization • Makes technical decisions that have a significant impact on product families, go to market strategies and customer satisfaction • Has business and technical time horizon of generally 6 to 36 months. • Accountability on project execution with significant influence on project/product time-tomarket schedules. • Provides consultative direction with senior management • Coaches and mentors experienced staff • Represents AMD to the outside technical community, partners and vendors • Work closely with other team members to understand design architecture and to propose solutions to improve/enhance performance with given SoC/IP and markets. • Architectural modeling, performance triage, deeper analysis, identifying bottlenecks working with architects and proposing solutions for performance improvement. • Developing tools and methodology for performance modeling, workloads analysis. • Proposing, communicating and implementing solutions to issues. • Lead technical teams, participate and present in executive reviews on product planning and execution. • Participate in collaborative development and workload performance optimization with AMD's partners/customers. Position Requirements: • Exceptional foundation in systems architecture, cutting across CPU or GPU, memory, storage and I/O subsystems • Power user of performance profiling tools • Experience with hardware performance counter monitoring tools • Knowledge of OS internals and kernel parameter tuning experience • Exposure to GPU accelerator performance benchmarks and codes are a plus (HPL, HPCG, STREAM, MLPerf, HACC, QMCPACK, LAMMPS, etc.) • Excellent communication skills (verbal, written, and presentation) • > 7 years relevant industry experience Education Requirements: Master's degree required, PhD preferred, emphasis in Electrical or Computer Engineering, Computer Architecture, or Computer Science with SoC/IP performance studies. AMD is a government contractor and subcontractor. As required by Executive Order, our US employees are required to be fully vaccinated against COVID-19 regardless of the employee's work location or work arrangement (e.g., telework, remote work, etc.), subject to such exceptions as required by law. If selected, you will be required to be vaccinated against COVID-19 and submit documentation of proof of vaccination by January 4, 2022 . AMD will provide additional information regarding what information or documentation will be needed and how you can request an exception from this requirement if you have a need for a religious and/or medical accommodation. Requisition Number: 124246 Country: United States State: Texas City: Austin Job Function: Design AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: The Senior Fellow will lead efforts in developing and optimizing adaptive and embedded hardware architectures. This role involves working on advanced elements such as pipelining, application mapping, customer commitments, technology evaluation, strategic pathfinding, government contracts, integration strategies, and FPGA prototyping algorithms. The position requires close collaboration with foundry teams, software teams, product planning teams, customers, and implementation groups to ensure successful project execution and alignment with strategic goals. RESPONSIBILITIES: * Design and optimize hardware architectures with a focus on adaptability and usability. * Develop pipelining strategies to enhance performance and efficiency. * Map applications effectively onto hardware platforms to establish capabilities against requirements. * Evaluate emerging technologies and conduct pathfinding to identify future opportunities. * Manage customer commitments and ensure alignment with project timelines and deliverables. * Collaborate with government entities to secure contracts and manage deliverables towards strategic research and development. * Develop integration strategies to seamlessly incorporate new technologies into existing systems. * Innovate and refine FPGA P&R algorithms to improve design and implementation processes. * Optimize product capabilities along with organization capabilities, schedule, cost, power, performance, and ease of use. * Coordinate with software teams to ensure hardware-software integration and functionality. * Engage with product planning teams to align hardware development with market needs. * Interface with customers to understand requirements and deliver tailored solutions. * Lead implementation groups to ensure successful deployment and operation of hardware systems. PREFERRED EXPERIENCE: * Extensive experience in hardware architecture design and development, particularly in adaptive and embedded systems. * Proven track record in managing complex projects and delivering innovative solutions. * Strong understanding of FPGA technology and implementation algorithms. * Excellent collaboration skills with the ability to work across multiple teams and disciplines. * Experience in government contract management and compliance. * Ability to evaluate and integrate new technologies into existing frameworks. * Strong communication skills to effectively engage with customers and stakeholders. #LI-IL1 #LI-HYBRID This role is not eligible for visa sponsorship. Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here. This posting is for an existing vacancy.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE PERSON: This role is ideal for a strategic thinker who thrives in solving large-scale technical challenges without losing sight of execution realities. You are: * A visionary and a builder - someone who can define and improve DV frameworks that will last through generations of silicon. * A mentor and a unifier - guiding diverse teams across geographies and backgrounds, aligning them to a shared DV mission. * A strong communicator who brings clarity and confidence when navigating ambiguity or resolving conflicting technical perspectives. * Comfortable influencing without authority and leading through technical credibility * Motivated by impact - not just doing DV but transforming how it's done at scale. THE ROLE: At AMD, we believe in "We before Me" - and this role exemplifies that value. Success here means making those around you better through leadership, knowledge sharing, and collaboration. * We are building high-performance computing technologies that are powering the future - from gaming and AI to hyperscale data centers and beyond. To help us continue this trajectory of excellence and innovation, we're looking for a Design Verification Architect AI/ML focus to drive the strategic vision of DV for our next-generation CPU cores. * This is a technical leadership position focused on methodology design, infrastructure planning, and team enablement. You will set the standard for quality, coverage, and scalability across a wide array of processor verification efforts. * If you have multiple successful tape-outs, a vision for world-class DV strategy, and the ability to orchestrate technical teams toward measurable impact, this role is your opportunity to shape the core of AMD's processor roadmap. KEY RESPONSIBILITIES: * Define and own the overall DV architecture for high-performance CPU cores, ensuring scalability across variants and generations. * Collaborate closely with design, microarchitecture, emulation, and verification leads/architects to build aligned verification strategies. * Lead the evaluation and enhancement of AMD's DV infrastructure and methodologies, to drive RTL quality and project intercept. * Provide technical mentorship and strategic direction to DV leads and engineers across global AMD sites. * Anticipate architectural and verification risks early and drive systemic solutions before they impact delivery. * Influence cross-functional decision-making through a blend of technical insight and collaborative communication. * Champion long-term DV innovation by staying current on AI/ML techniques, formal verification, and emulation strategies - and knowing when to integrate them into project flow. PREFERRED EXPERIENCE: * Expertise in Design Verification with an emphasis on CPU architecture and core-level verification, or strong AI/ML deployment experience * Strong grasp of DV methodologies: coverage-driven verification, formal, and infrastructure strategy. * Solid understanding of computer architecture fundamentals: pipelines, caching, coherency, load/store, execution units, etc. * Strong documentation, planning, and cross-functional coordination skills. * Familiarity with x86 or ARM CPU cores, or AI/ML deployments ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering LOCATION: Santa Clara #LI-DC1 #HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here. This posting is for an existing vacancy.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: We are looking for a GPU Machine Learning Architect to join GPU architecture team developing Deep Learning Architecture and GPU kernels for architecture exploration, development and performance verification THE PERSON: The successful person will be an experienced GPU-compute or graphics hardware developer and programmer with an eye towards hardware/software-aware performance implementations and optimizations. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. Good teamwork and interpersonal skills required. Ability to work independently and within complementary teams. Demonstrate flexibility, strong motivation and a proven track record of meeting results-oriented deadlines. KEY RESPONSIBILITIES: * They will play a key role in all phases of GPU architecture development including architecture feature development and analysis, performance projection, and performance analysis across different platforms. * The ideal candidate will be responsible for writing high performance GPU kernels for Machine Learning applications to run on AMD's next generation GPU.\ * They will be porting and optimizing algorithms for new GPU architecture, perform code reviews, authoring detailed documentation related to their work. PREFERRED EXPERIENCE: * Strong programming skills in C/C++, HIP, and CUDA * Extensive experience with machine learning * Experience with GPU ML runtimes and compilers * Experience using version control software such as Git * Strong understanding of GPU architecture * Knowledge of Parallel-Computing, GPUs, and 3D graphics * Familiarity with deep neural network machine learning technologies and modern machine learning programming frameworks ACADEMIC CREDENTIALS: * PhD in computer architecture/Electrical Engineering preferred. This role is not eligible for Visa sponsorship. #LI-BM1 #LI-Hybrid Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here. This posting is for an existing vacancy.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: This role offers a rare opportunity for a senior technical leader to shape the future of memory interface technology at scale. As a key architect within the AMD Circuit Technology Design Group, you will influence the definition, architecture, and delivery of next-generation Memory PHY solutions in advanced CMOS technologies. The focus is on long-term impact: setting technical direction, guiding critical design decisions, and enabling teams to deliver differentiated mixed-signal IP across future SoCs. This position is well suited for technologists who value deep technical ownership, architectural influence, and the ability to leave a lasting technical legacy-without requiring people-management as a primary responsibility. THE PERSON: You are a highly respected engineer or architect known for solving difficult problems and raising the technical bar around you. You bring perspective earned from experience, approach challenges with curiosity and pragmatism, and engage others through thoughtful collaboration rather than authority. You are comfortable operating with ambiguity, influencing across organizations, and contributing at both strategic and hands-on technical levels. KEY RESPONSIBILITIES: * Serve as a senior technical authority and architect for Memory PHY technology, shaping long-range roadmaps and architectural direction. * Define and evolve architectures and specifications for advanced Memory PHYs, including DDR, LPDDR, GDDR, and HBM. * Drive innovation in high-speed I/O circuit design, system-level analysis, power integrity, and signal integrity. * Partner with cross-functional teams across Circuit Design, Layout, Logic Design, Physical Design, Firmware, Design Verification, and Post-Silicon organizations worldwide. * Influence design quality and execution through design reviews, technical mentorship, and principled tradeoff decisions. * Support post-silicon bring-up, validation, characterization, optimization, and product readiness. * Communicate complex technical concepts clearly to senior technical peers, leadership, and stakeholders. * Mentor and advise engineers and architects, contributing to a strong and inclusive technical community. PREFERRED EXPERIENCE: * Sustained technical impact on production Memory PHYs or high-speed I/O IP at advanced technology nodes. * Experience owning or shaping architecture across multiple successful tape-outs. * Deep expertise in high-speed analog and mixed-signal design, memory protocols, and system-level considerations. * Strong understanding of advanced CMOS technologies and modern design methodologies. * Track record of making sound technical decisions in complex, high-risk design spaces. * Ability to influence without formal authority and collaborate effectively across organizational boundaries. ACADEMIC CREDENTIALS: * Advanced degree in Electrical Engineering or related field preferred, or equivalent professional experience. * Typically, 15+ years of experience in high-speed analog, mixed-signal, or memory PHY design. LOCATION: Flexible - Bay Area, CA; Boston, MA; Austin, TX; or Toronto, Canada. This role is not eligible for visa sponsorship. #LI-ML4 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here. This posting is for an existing vacancy.

What you do at AMD changes everything At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies - building blocks for gaming, immersive platforms, and the data center. Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to take a look at the opportunities available to come join our team. GPU ML Performance Architect The Role: AMD is looking for an individual to join GPU architecture team to work on next generation GPU architecture for machine learning acceleration. The job includes architecture modeling and developing Deep Learning GPU kernels for architecture exploration and performance projection. The Person: The successful person will be an experienced GPU architect or GPU-compute/graphics programmer with an eye towards hardware-aware performance optimizations. Key Responsibilities: The ideal candidate will be responsible for architecture modeling and writing high performance GPU kernels for Machine Learning applications to run on AMD's next generation GPU. They will be porting and optimizing algorithms for new GPU architecture Implement new architecture ideas then analyze performance impact Perform code reviews, authoring detailed documentation related to their work. They will play a key role in all phases of GPU architecture development including architecture feature analysis, performance projection, and performance analysis across different platforms. Preferred Experience: Strong programming skills in C/C++ Extensive experience with machine learning Experience on GPU programing Strong understanding of GPU architecture Good teamwork and interpersonal skills required Ability to work independently and within complementary teams Demonstrate flexibility, strong motivation and a proven track record of meeting results-oriented deadlines. Knowledge of Parallel-Computing, GPUs, and 3D graphics Familiarity with deep neural network machine learning technologies and modern machine learning programming frameworks Academic Credentials: Masters, PhD or 5 years industry experience in relevant field (CS, EE, CE) Location: Santa Clara, CA; Orlando, Florida #LI-PA1 Requisition Number: 112841 Country: United States State: California City: Santa Clara Job Function: Design AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

What you do at AMD changes everything We care deeply about transforming lives with AMD technology to enrich our industry, our communities and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence, while being direct, humble, collaborative and inclusive of diverse perspectives. This is who we are at our best. One Company. One Team. AMD together we advance_ Power Management Architect The Role: Drive the definition, tradeoff studies, protyping, implementation and verification of the Power Management Architecture features and algorithms for Radeon gaming and datacenter GPUs. Collaborate closely with a wide array of engineering disciplines to create leadership products that delight our customers. The Person: This is an experienced engineer who brings a deep understanding of SoC and Platform architecture, Power Management concepts and algorithms, and a passion to drive perf/watt and perf/$ optimizations for worldclass GPUs. Previous experience in the areas of voltage margin optimization, reliability and yield management, statistical analysis of silicon manufacturing/test data will be a bonus. Key Responsibilities: Drive Power Management advances and multi-generational roadmap in the area of voltage optimization, with an eye on silicon reliability and yeild, to maximize power and cost constrained performance for Radeon graphics platforms Take ownership for developing and driving PM features from concept through product launch for a family of SoC devices with varying configurations and target market segments Work cross functionally with Software, Firmware, SOC, IP, Platform, Technology, Product teams through every stage of product development, evangelize for power efficiency, lead broad forums and drive product definition alignment Work with product teams to understand the Perf/Power/Cost requirements Drive power management feature definition per SoC program Develop system level models, analyze return-on-investment and evaluate trade-offs Document specifications Guide power management feature implementation, verification, emulation and post-silicon validation in an engineering resource efficient and scalable manner Coach and mentor other engineers as a technical leader Preferred Experience: Proven experience with GPU or CPU power architecture, PPA tradeoffs, power management algorithms, embedded microcontroller firmware, hardware test and verification environments Solid background in electrical circuits, VLSI and circuit design fundamentals Familiarity with ASIC/SoC Design cycles and methodologies including RTL, Verification, Emulation, Physical Design and post-si validation Background in prototyping and proof of concept of new complex architectures and algorithms in hardware/software/firmware using physical and/or emulation platforms will be a plus Programming skills in C/C++, scripting with Perl or Python Previous experience in the areas of voltage margin optimization, reliability and yield management, statistical analysis of silicon manufacturing/test data will be a major differentiator Ability to work cross functionally with HW/SW and Pre/Post Silicon teams, lead by influence and strong communication skills Academic Credentials: Bachelor's Degree in Electrical Engineering, Computer Engineering, or another relevant field. Masters or Ph.D. preferred Location: Santa Clara, CA - Austin, TX - Markham, Ontario #LI-SW2 Requisition Number: 150682 Country: United States State: California City: Santa Clara Job Function: Product Engineering Benefits offered are described here. AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: As a DFT Architect you will drive DFT architecture definitions of Scan, MBIST, PHY, high-speed/high-density IOs, communication controllers and FPGA logics of future AMD products. The role involves working with design architecture, design DFT/DFX, design block owners and physical design teams with ATE manufacturing environment, silicon debug, product quality and test cost perspectives. The DFT architect is expected to apply past technical knowledge, learn new cutting-edge technologies and collaborate with teams to arrive at best manufacturable solution. The DFT architect will ensure that DFT implementation is completed by architecture design specifications. This is the role of overseeing early architecture design definition to successful silicon high-volume production. THE PERSON: We are looking for candidates that can communicate complex engineering subjects effectively to cross functioning technical teams and upper management. Strong DFT and leadership skills will be put to good use. Successful DFT architects interact with many external teams and must confidently represent his/her organization. KEY RESPONSIBILITIES: * Promote ATE & production test environment, test cost and test quality enhancements in future AMD products through DFT architecture definitions and specifications * Manage DFT activities across architecture, design implementation, verification, and test implementation for new products. * The role is in AMD global quality and operation organization driving best manufacturing test solution through early product definition and pre & post silicon activities * Work closely with design teams and make sure DFT structures are correctly implemented. * Drive internal DFT teams to correctly implement and create test solutions * Drive firmware driven test solutions * Plan for diagnosability and yield improvement PREFERRED EXPERIENCE: * Significant DFT engineering experience through DFT pre and post silicon cycles * Experience in creating and implementing complex chip-level DFT architecture * Experience in DFT implementation including Scan and Scan Compression at IP and SoC level * Experience with DFT tools, ATPG (Stuck-At, At-Speed, Path-Delay) and scan compression. * Strong MBIST knowledge * Experience in PHY, high-speed IO, digital communication and functional test development * Knowledge of Tessent Streaming Scan Network SSN and hand-on experience is a big plus * Good understanding of Verilog, synthesis, physical implementation and STA * Good understanding of verification methodology * Knowledge of FPGA logic, synthesis and design flow is a plus * Knowledge of embedded design and firmware methodology is a plus * Experience with post-silicon debug and bench equipment (e.g., oscilloscope and logic analyser) * Good communication skills and works well in a group environment that spans across continents ACADEMIC CREDENTIALS: * MS or Ph.D. in Electrical/Electronic/Computer Engineering LOCATION: San Jose, California, United States This role is not eligible for visa sponsorship. #LI-AJ1 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here. This posting is for an existing vacancy.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE We are seeking an SoC Architect specializing in Boot, Firmware, and Software/Hardware Interfacing. In this role, you will define and drive firmware architecture for next-generation SoCs, ensuring robust boot flows and compliance with functional safety standards. You will collaborate closely with other SoC architects to integrate firmware seamlessly with processor subsystems, interconnects, and system-level components. THE PERSON You are passionate about SoC architecture and firmware design, with deep expertise in boot flows for ARM and x86 platforms. You thrive in cross-functional environments, balancing performance, power, and reliability trade-offs. You have strong analytical skills, excellent communication, and the ability to influence architecture decisions across teams. KEY RESPONSIBILITIES * Define and develop firmware architecture for SoC boot flows, reset sequences, and system initialization. * Collaborate with SoC architects to ensure cohesive integration of firmware with hardware components. * Specify requirements and create detailed documentation for boot and firmware interfaces. * Drive implementation of functional safety-compliant firmware and software. * Partner with design, verification, and software teams to ensure functional correctness and system-level validation. * Analyze trade-offs for performance, power, reliability, and safety in firmware design. * Influence strategies for security, safety, and lifecycle management across firmware domains. PREFERRED EXPERIENCE * Experience in ARM and x86 SoC boot flows, including secure boot and power-on initialization. * Expertise in firmware development for SoCs, including low-level drivers and hardware abstraction layers. * Experience with functional safety compliance (ISO 26262 or equivalent) for firmware and software. * Familiarity with SoC architecture, processor subsystems, interconnect protocols (e.g., AXI), and memory systems. * Knowledge of low-power design techniques, reset flows, and power management. * Proficiency in modeling and automation using C, Python or similar languages. * Strong understanding of security and reliability strategies for embedded firmware. ACADEMIC & EXPERIENCE REQUIREMENTS * BS, MS, or PhD in Computer/Electrical Engineering or related field. * 8+ years of experience in SoC architecture and firmware development. * Proven track record in delivering architecture for SoCs with robust boot and firmware solutions. LOCATION: Austin, Texas Preferred. #LI-RW1 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here. This posting is for an existing vacancy.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: SerDes Technology group is seeking a talented, motivated and self-driven SerDes Micro Architect with expertise in high-speed SerDes RTL design. You have had significant success driving architecture and product requirements, integrating complex IPs into SOC. You have deep knowledge of digital design methodology and are meticulous about Power, Performance and Area. In this role, you will work with a world-class team to drive the definition of next generation high-speed SerDes IPs. THE PERSON: If you have a keen interest in high-speed SerDes and digital RTL design, excel in teamwork and possess strong communication skills, your profile aligns well with our requirements. We are seeking someone who is innovative, detail-oriented and possesses excellent problem-solving skills to join our design team. KEY RESPONSIBILITIES: * Define micro-architecture requirements for SerDes IPs, drive technical specifications to meet those requirements, and provide technical direction to execution teams * Design and development of digital logic blocks in leading edge technology nodes * Work with cross-functional teams to identify and assess complex technical issues/risks and develop architectural solutions to achieve product requirements * Work closely with design teams for area and floorplan refinement, verification test plan reviews, timing targets, emulation plans, pre-Si bug resolution and performance/power verification sign offs * Support post-Si teams for product performance, power and functional issues debug/resolution PREFERRED EXPERIENCE: * Excellent communication, management, and presentation skills * Adept at collaboration among top-thinkers and senior architects with strong interpersonal skills to work across teams in different geographies * Experience in driving the definition of high-speed SerDes IPs, with strong knowledge on the application in PCIe and Ethernet * Experience in system architecture, CPU & IP Integration, power and clock management design * Experience in RTL design, verification, synthesis and STA in high performance design * Good understanding of adaptation and calibration algorithms * Good understanding of link equalization, clock and data recovery * Good understanding of digital signal processing * Good knowledge of SystemVerilog and UVM ACADEMIC CREDENTIALS: * Bachelor's or Master's degree in related discipline LOCATION: San Jose, CA #LI-SC3 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here. This posting is for an existing vacancy.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: The AMD Datacenter GPU team is seeking an experienced Principal Solutions Architect to join our team focused on enabling large clusters for AI & HPC workloads. THE PERSON: The candidate will be a technical expert in datacenter infrastructure with deep knowledge of datacenter design, strong knowledge of compute (CPUs/GPUs), networking, and storage solutions, and experience partnering with customers to support RFP development. This role offers the opportunity to work at the cutting edge of AI & HPC infrastructure, solving complex technical challenges and helping customers implement transformative datacenter solutions at-scale. KEY RESPONSIBILITIES: * Lead customer technical discovery with data/ML, platform, and infrastructure stakeholders; map business goals to AI & HPC workloads and success metrics. * Assess current system state (GPUs/accelerators, storage, fabric, security) and identify gaps, risks, and define required POCs. * Shape reference architectures for large AI & HPC clusters (rack design, GPU topology, RoCE/InfiniBand, NVMe/parallel FS) aligned to customer constraints (power, cooling, space). * Create high-level design. * Partner with the business development and product teams to build ROI/TCO models. (CapEx/OpEx, $/token, $/inference) and craft the value story. * Support draft of technical sections of RFIs/RFPs; produce architecture diagrams, deployment plans, and implementation timelines. * Partner with program & engineering teams to define POC success criteria, test plans, and exit reports. * Collaborate with product management to foster product roadmap improvements. * Network design for high-throughput GPU clusters (scale-up / scale-out / OOB), cabling. * Storage architectures optimized for AI data pipelines. * Datacenter layout strategies / power /cooling. * Rack power delivery / mechanicals. REQUIRED EXPERIENCE: * Deep hands-on experience designing and implementing large-scale GPU based infrastructure solutions, including datacenter network and storage architectures. * Proven track record of creating technical documentation and reference architectures. * Excellent communication skills with the ability to explain complex technical concepts. * Experience working directly with customer technical teams. ACADEMIC CREDENTIALS: * Bachelor's degree or higher in Computer Science, Electrical Engineering or closely related field. LOCATION: * San Jose, CA #LI-EV1 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here. This posting is for an existing vacancy.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. SoC Architect - PCIe/CXL/UAL/DMA THE ROLE: AMD's Adaptive and Embedded Computing Group (AECG) is looking for a SoC Architect to join the team in defining the next generation of Adaptive and Embedded SoCs. You will drive novel SoC architecture solutions across a wide range of applications, including Embedded Computing, AI/ML, Data Center, Communications, Automotive, and Aerospace, in close collaboration with customers, partners, product planning, SoC and IP architects, and design & verification teams. THE PERSON: As a SoC Architect you will help drive new architecture initiatives that leverage the state-of-the-art PCIe, CXL, UAL, and Confidential Compute technologies and standards. You will exercise your technical expertise and excellent communication skills to collaborate with design and product planning with an eye towards delivering innovative and highly competitive adaptive accelerators and embedded computing solutions. KEY RESPONSIBILITIES: * Responsible for driving the SoC architecture, with a particular focus on I/O subsystems connected over PCIe, UAL or CXL. * Define I/O subsystem and PCIe DMA architectures, including their interactions with internal embedded processor-subsystems, Network on Chip, Memory controllers, and FPGA fabric. * Create flexible and modular I/O subsystem architectures that can be deployed in either chiplet, monolithic or 3D form factors. * Work with customers, and cross-functional teams to scope SoC requirements, analyze PPA tradeoffs, and then define architectural requirements that meet the PPA and schedule targets. * Define I/O subsystem and DMA hardware, software, and firmware interactions with embedded processing subsystems and external CPUs. * Author architecture specifications in clear and concise language. Guide and assist pre-silicon design/verification and post-silicon validation during the execution phase. PREFERRED EXPERIENCE: * Strong technical background architecting SoC and I/O subsystems involving PCIe and PCIe-DMA engines. * Strong technical knowledge of the PCIe protocol specifications, and how mandatory and optional protocol features are leveraged in PCIe devices. * Domain expertise in embedded computing, aerospace & defense, data-center, networking, or automotive industries. * Knowledge of I/O Subsystem and DMA interactions with internal embedded processor-subsystems (x86, RISC-V or ARM) and external host CPUs. * Knowledge of bridging and ordering rule enforcement between on-chip protocols such as AXI, and off-chip protocols such as PCIe desired. * Knowledge of ARM Processors and AXI Interconnects desired. * Knowledge of FPGA and AI/ML Accelerators desired. * Knowledge of boot, security, debug, telemetry and RAS desired. ACADEMIC CREDENTIALS: * BS/MS/PhD in electrical or computer engineering or related field. LOCATION: San Jose, CA This position is not eligible for Visa sponsorship #LI-BW2 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here. This posting is for an existing vacancy.