Electrical Design Engineer jobs at SAIC - 6717 jobs

Description:Join Our Team as an Avionics Circuit Design Engineer where you will work on the development of a sophisticated state-of-the-art avionics product in a world class Integrated Product Development environment. Location: This position does not support teleworking; the preferred candidate will be located near our Lockheed Martin Space facility one of the Coolest places to work: Littleton CO, and be expected to work in the office. Space is a critical domain, connecting our technologies, our security, and our humanity. While others view space as a destination, we see it as a realm of possibilities, where we can do more - we can innovate, invest, inspire, and integrate our capabilities to transform the future. At Lockheed Martin Space, we aim to harness the full potential of space to cultivate innovation, reduce costs, and push the boundaries of what technology can achieve. We're creating future-ready solutions, focusing on resiliency and urgency through our 21st Century Security vision. We're erasing boundaries and forming partnerships across industries and around the world. We're advancing spacecraft and the workforce to fuel the next generation. And we're reimagining how space can connect us, ensuring security and prosperity. Join us in shaping a new era in space and find a career that's built for you. What does this role look like? As a Circuit Design Engineer, you will work on the development of a sophisticated state-of-the-art Avionics product in a world class Integrated Product Development environment. Key activities you will accomplish in this role: • Design/Capture electrical schematics and guide the board layouts. • Perform electrical Worst Case Analysis and Electrical Parts Stress Analysis. • Work on a cross-functional team in the development and integration of world class avionics systems. • Resolve test anomalies and troubleshooting, and generation, review and presentation of Product Certification, and also support system level testing. To be effective in this role, you will need: • Experience supporting the technical evaluation of design and requirements verification. • Experience in different phases of aerospace hardware development cycle. • Experience interacting with peers, management and government customers. • Experience in presentations and in written communication skills. • Missile design experience. • 5+ years professional experience; 3+ years with Masters degree. • Must have an active DoD Secret clearance, thus you are a US Citizen. Why Lockheed Martin? Our employees play an active role in strengthening the quality of life where we live and work by volunteering more than 850,000 hours annually. Learn more about Lockheed Martin's comprehensive benefits package. Find out more on how we proudly support Hiring Our Heroes. At Space we value your skills, training, and education. We believe that by applying the highest standards of business ethics and visionary thinking, everything is within our reach - and yours as a Lockheed Martin Space employee... join us to experience your future! Let's do Space! Basic Qualifications: • Bachelor of Science or higher from an accredited college in Electrical Engineering or related discipline, or equivalent experience/combined education. • Experience in electronics design, with a focus on CCA design and development. • Experience as a technical lead or responsible engineer. • Active Secret clearance thus US Citizenship is required. Desired Skills: • Experienced at leading teams through challenging engineering and/or programmatic issues. • Experience on Space and/or Missile Defense Missions. • Experience in electronic systems schematic creation and interpretation, and Electronics Modeling/Simulation Tools such as SPICE. • Experience in schematic capture using Zuken or similar tools. • Experience with PSPICE, Saber or other electronics simulation tool experience. • Experience performing electronics analysis (Worst Case Analysis, Electrical Parts Stress Analysis, Failure Modes and Effects Critical Analysis). • Demonstrated good communication and presentation skills with the ability to articulate complex technical issues to peers, management, subcontractors and customers. • Demonstrated ability to work in a fast-paced, dynamic, collaborative team environment and to build consensus among peers and effective relationships with team members. • Demonstrated strong problem solving and conflict resolution skills. • Adaptable to new situations and demonstrate self-initiative in solving complex problems. • Able to work effectively in a diverse team environment. Security Clearance Statement: This position requires a government security clearance, you must be a US Citizen for consideration. Clearance Level: Secret Other Important Information You Should Know Expression of Interest: By applying to this job, you are expressing interest in this position and could be considered for other career opportunities where similar skills and requirements have been identified as a match. Should this match be identified you may be contacted for this and future openings. Ability to Work Remotely: Onsite Full-time: The work associated with this position will be performed onsite at a designated Lockheed Martin facility. Work Schedules: Lockheed Martin supports a variety of alternate work schedules that provide additional flexibility to our employees. Schedules range from standard 40 hours over a five day work week while others may be condensed. These condensed schedules provide employees with additional time away from the office and are in addition to our Paid Time off benefits. Schedule for this Position: 9x80 every other Friday off Pay Rate: The annual base salary range for this position in California, Massachusetts, and New York (excluding most major metropolitan areas), Colorado, Hawaii, Illinois, Maryland, Minnesota, New Jersey, Vermont, Washington or Washington DC is $118,700 - $209,300. For states not referenced above, the salary range for this position will reflect the candidate's final work location. Please note that the salary information is a general guideline only. Lockheed Martin considers factors such as (but not limited to) scope and responsibilities of the position, candidate's work experience, education/ training, key skills as well as market and business considerations when extending an offer. Benefits offered: Medical, Dental, Vision, Life Insurance, Short-Term Disability, Long-Term Disability, 401(k) match, Flexible Spending Accounts, EAP, Education Assistance, Parental Leave, Paid time off, and Holidays. (Washington state applicants only) Non-represented full-time employees: accrue at least 10 hours per month of Paid Time Off (PTO) to be used for incidental absences and other reasons; receive at least 90 hours for holidays. Represented full time employees accrue 6.67 hours of Vacation per month; accrue up to 52 hours of sick leave annually; receive at least 96 hours for holidays. PTO, Vacation, sick leave, and holiday hours are prorated based on start date during the calendar year. This position is incentive plan eligible. Lockheed Martin is an equal opportunity employer. Qualified candidates will be considered without regard to legally protected characteristics. The application window will close in 90 days; applicants are encouraged to apply within 5 - 30 days of the requisition posting date in order to receive optimal consideration. Join us at Lockheed Martin, where your mission is ours. Our customers tackle the hardest missions. Those that demand extraordinary amounts of courage, resilience and precision. They're dangerous. Critical. Sometimes they even provide an opportunity to change the world and save lives. Those are the missions we care about. As a leading technology innovation company, Lockheed Martin's vast team works with partners around the world to bring proven performance to our customers' toughest challenges. Lockheed Martin has employees based in many states throughout the U.S., and Internationally, with business locations in many nations and territories. Experience Level: Experienced Professional Business Unit: SPACE Relocation Available: Possible Career Area: Electrical Engineering Type: Full-Time Shift: First

A leading engineering firm in Boston seeks a Senior Project Engineer to manage design aspects of electrical systems for various projects. The role involves leading design efforts, coordinating with other trades, and ensuring projects adhere to deadlines and quality standards. With a minimum of 5 years of experience and a Bachelor's in Electrical Engineering, the ideal candidate will be proficient in software such as Revit and AutoCAD. Offering a hybrid workplace and comprehensive benefits, this role provides opportunities to work on iconic projects. #J-18808-Ljbffr

An engineering firm in Boston is searching for a Senior Engineer specialized in electrical design. This position involves designing tenant fit-out projects, leading design tasks, and mentoring junior engineers. Candidates should have a Bachelor's degree in electrical engineering and at least 2 years of relevant experience. Proficiency in design tools like Revit and AutoCAD is essential. The company offers a hybrid work environment, a comprehensive benefits package, and the opportunity to work on significant projects, promoting both career growth and collaboration. #J-18808-Ljbffr

A leading engineering firm in Boston is seeking a Senior Engineer to join its dynamic Electrical team. The ideal candidate will possess a strong understanding of electrical design, project execution, and interdisciplinary coordination. Responsibilities include designing tenant fit-out projects, mentoring junior engineers, and ensuring accurate implementation of designs. The firm offers a hybrid workplace, a comprehensive benefits package, and estimated annual compensation between $85,000 and $93,000. #J-18808-Ljbffr

A leading technology company located in Sunnyvale, CA is looking for an ASIC Physical Design Engineer to drive the development of cutting-edge TPU technology, crucial for AI/ML applications. The role requires 7 years of physical design experience, proficiency in Python, and collaboration with various teams to optimize design outcomes. The position offers a competitive salary range of $156,000-$229,000, plus bonus and benefits. #J-18808-Ljbffr

corporate_fare Google Sunnyvale, CA, USA Apply Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 7 years of experience with physical design (e.g. from RTL to GDSII, including key stages like floorplanning, place and route, and timing closure). Experience in Python, Tcl, or Perl scripting. Preferred qualifications: Experience working with external partners on Physical Design (PD) closure. Experience in Static Timing Analysis (STA), with an understanding of how to define timing corners, margins and derates. Experience with Synopsys/Cadence PnR tools. Experience with backend flows (e.g., LEC, PI/SI, DRC/LVS, etc.). Understanding of DFT including Scan, MBIST and LBIST. Understanding of performance, power and area (PPA) trade-offs. About the job In this role, you'll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting‑edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You'll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML‑driven systems. As an ASIC Physical Design Engineer, you will collaborate with RTL, Design for Testing (DFT), Floorplan, and full‑chip Signoff teams. Additionally, you'll solve technical problems with innovative micro‑architecture and practical logic circuits solutions, while evaluating design options with optimized performance, power, and area in mind. The AI and Infrastructure team is redefining what's possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide. We're the driving team behind Google's groundbreaking innovations, empowering the development of our cutting‑edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world‑leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. The US base salary range for this full‑time position is $156,000-$229,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job‑related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process. Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google . Responsibilities Participate in the Physical Design of complex blocks. Contribute to the design and closure of the full chip and individual blocks from RTL‑to‑GDS. Collaborate with internal logic and internal and external teams to achieve the best Power/Performance Analysis (PPA). This includes conducting feasibility studies for new microarchitectures as well as optimizing runs for finished RTL. Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents‑to‑be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google's EEO Policy , Know your rights: workplace discrimination is illegal , Belonging at Google , and How we hire . Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting. To all recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias, Google employees, or any other organization location. Google is not responsible for any fees related to unsolicited resumes. #J-18808-Ljbffr

corporate_fare Google place Sunnyvale, CA, USA Apply Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 4 years of experience with design verification. Experience with SystemVerilog/Verilog. Preferred qualifications: Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture. 6 years of experience with silicon design verification. Experience contributing across the entire design and verification life cycle. Experience optimizing tools, flows, and methodologies to improve efficiency. Experience with scripting languages (e.g., Python or Perl). Excellent problem solving and communication skills. About the job In this role, you'll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You'll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. As an ASIC Design Verification Engineer, you will use design and verification expertise to verify complex digital designs. You will collaborate closely with design and verification engineers in active projects and perform direct verification. Using SystemVerilog coding and problem solving skills, you will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will be responsible for the full lifecycle of verification, from verification planning to test execution, to collecting and closing coverage. The AI and Infrastructure team is redefining what's possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide. We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. The US base salary range for this full-time position is $132,000-$189,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process. Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google . Responsibilities Plan the verification of complex digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios. Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools. Identify and write all types of coverage measures for stimulus and corner-cases. Debug tests with design engineers to deliver functionally correct design blocks. Close coverage measures to identify verification holes and to show progress towards tape-out. Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google's EEO Policy , Know your rights: workplace discrimination is illegal , Belonging at Google , and How we hire . Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting. To all recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias, Google employees, or any other organization location. Google is not responsible for any fees related to unsolicited resumes. #J-18808-Ljbffr

Hardware support specialist for NFC Point-Of-Sale, IoT and WireLess Charging domains Supporting FAEs and Tier1 customers over JIRA ticketing system by answering questions, conducting design reviews and evaluating prototypes Design PCBs with microcontrollers and NFC antennas for internal prototypes and for certified Evaluation Kits Develop full-scale NFC wireless charging solutions from Antenna to Battery Be TechLead and take ownership of customer projects and internal development programs Performing measurements with RF lab equipment (in-house and at external laboratories) Perform EMC tests and troubleshooting, maintain documentation repository Write and maintain application notes, articles and presentations Create technical trainings for customers and internal staff Qualifications You bring a MSc in Electrical Engineering and several years of experience in wireless communications and PCB design You are familiar with Altium Designer (a Renesas company) You have hands‑on skills for re‑work, bring‑up and troubleshooting using EE lab equipment You have solid EMC theory knowledge and practical problem‑solving skills You have skills with EE simulation tools like Cadence, LTSpice, Qucs and CST Studio You have experience in NFC/RFID protocols, standards and products You have basic skills for Firmware updates, interface sniffing and protocol debugging You are open for customer inputs, self‑reflective and self‑critical personality, good at talking and writing to customers You can work independently and as part of a team You are willing to share your expert know‑how within the team as well as with customers You have sound knowledge of English Company Description Renesas is a global semiconductor company providing hardware and software solutions for a range of cutting‑edge technologies including self‑driving cars, robots, automated factory equipment, and smart home applications. We are a key supplier to the world's leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas is a global, multi‑billion dollar, publicly traded company headquartered in Japan, and has subsidiaries in 20 countries worldwide. Renesas is a dynamic, multi‑cultural technology company where employees learn, mentor, innovate and thrive. Renesas is extending our share in fast‑growing data economy‑related markets such as infrastructure and data center and strengthening our presence the industrial/IOT and automotive segments. Our solutions drive products developed by major innovators around the world. Join us and build your future by being part of what's next in electronics. Additional Information This position is subject to the Collective Agreement of the Electrical and Electronics Industry, employment group H (******************************************************************************* The monthly salary is paid 14 times a year. However, we offer a higher salary depending on your experience and qualifications. Renesas is an embedded semiconductor solution provider driven by its Purpose ‘To Make Our Lives Easier.' As the industry's leading expert in embedded processing with unmatched quality and system‑level know‑how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power‑efficient solutions today that help people and communities thrive tomorrow, ‘To Make Our Lives Easier.' At Renesas, you can: Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people's lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people‑first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let's Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement. We have adopted a hybrid model that gives employees the ability to work remotely two days a week while ensuring that we come together as a team in the office the rest of the time. The designated in-office days are Tuesday through Thursday for innovation, collaboration and continuous learning. #J-18808-Ljbffr

A leading tech company is seeking an RTL Design Engineer in Sunnyvale, CA to shape the future of AI/ML hardware acceleration. The ideal candidate will work on cutting-edge TPU technology, taking part in ASIC development to enhance computational efficiency in data centers. Responsibilities include defining project scope, design, and documentation of next-generation data center accelerators, alongside collaborative efforts with cross-functional teams to drive innovations that empower billions of users globally. Comprehensive education and experience in relevant engineering fields are essential. #J-18808-Ljbffr

A leading tech company in Sunnyvale seeks a Physical Design Engineer to contribute to the development of cutting-edge TPU technology. You will collaborate with various teams to enhance design processes, focusing on innovative solutions for AI/ML applications. Candidates should have relevant experience in physical design, strong qualifications in Electrical Engineering, and skills in scripting languages like Python. The role offers a competitive salary range and numerous benefits, with a strong emphasis on diversity and inclusion. #J-18808-Ljbffr

A global semiconductor company in San Jose is seeking a Principal Power Module Design Engineer. This role involves new product development in power electronics, requiring at least a master's or Ph.D. in Power Electronics and 5+ years of experience in related design. Applicants should possess strong skills in switching power converter design and analog circuit design. The position offers competitive compensation, a collaborative environment, and opportunities for professional growth. #J-18808-Ljbffr

Please note this posting is to advertise potential job opportunities. This exact role may not be open today but could open in the near future. When you apply, a Cisco representative may contact you directly if a relevant position opens. Applications are accepted until further notice. Please note this posting is to advertise potential job opportunities. This exact role may not be open today but could open in the near future. When you apply, a Cisco representative may contact you directly if a relevant position opens. *Meet the Team* Engineering: Open-minded, driven, diverse and deeply creative people at Cisco design the hardware that makes the internet work. Bring your knowledge of computers and networking and take it to a new level in any one of the following product categories including: cloud, social, mobile/wireless, video, VoIP, big data, collaboration, web, Internet of Things, routing, switching, IPv6, data center, HPC, Telepresence and many more. Your work will impact billions globally. Supply Chain Operations: Collaborate with peers on projects that have a real-world impact. From our processes to manufacturing, you'll deliver a standout customer experience of Cisco products and services. Take your creative ideas from the drawing board to deliver powerful solutions. You'll collaborate with multi-functional teams to determine our infrastructural needs and product specifications. *Your Impact* Join our Creative Hardware Engineering team and make a tangible impact across the full product development cycle-from foundational circuit design to large system integration-seeing your contributions realized in high-volume manufacturing. Shape the product lifecycle by managing multiple priorities and advancing both immediate and long-term hardware goals. Build and sustain strong relationships with cross-functional teams while collaborating on ASIC Design and Verification for reliable, high-performance products. Drive innovation in System/Board Design, leveraging excellent communication skills to align and deliver robust hardware solutions. Apply your collaborative spirit and technical expertise to optimize Circuit Board Layout for efficiency, manufacturability, and quality. Champion Hardware Automation initiatives, working across business groups to streamline development and testing processes. Lead Validation and Test activities by fostering positive team dynamics and ensuring product excellence. Enhance Signal Integrity, coordinating with extended teams to achieve optimal speed and data fidelity in complex systems. Advance Power Design strategies, contributing to energy-efficient and sustainable hardware solutions as a trusted team player. Minimum Qualifications Currently enrolled in an undergraduate degree program in Electrical Engineering, Computer Engineering, or a related field. Foundational understanding of hardware engineering principles, including experience with hardware design and tools (e.g., Altium, Cadence, Mentor Graphics) and simulation software. Familiarity with hardware testing and debugging techniques using lab equipment such as oscilloscopes, logic analyzers, and multimeters. Strong grasp of engineering fundamentals and technical problem-solving abilities. Able to commit to a 6-month co-op program. Able to legally live and work in the country for which you're applying, without visa support or sponsorship *Preferred Qualifications* Ability to lead multiple tasks, prioritize effectively, and work toward both short- and long-term goals. Experience building and maintaining positive working relationships within diverse and extended teams. Excellent written and verbal communication skills. Proven ability to work collaboratively across business groups and teams (hardware, software, manufacturing, etc.). Why Cisco? At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. Message to applicants applying to work in the U.S. and/or Canada: Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process. U.S. employees are offered benefits, subject to Cisco's plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time. U.S. employees are eligible for paid time away as described below, subject to Cisco's policies: 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees 1 paid day off for employee's birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco Non-exempt employees receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees Exempt employees participate in Cisco's flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations) 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next Additional paid time away may be requested to deal with critical or emergency issues for family members Optional 10 paid days per full calendar year to volunteer For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco's policies. Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows: .75% of incentive target for each 1% of revenue attainment up to 50% of quota; 1.5% of incentive target for each 1% of attainment between 50% and 75%; 1% of incentive target for each 1% of attainment between 75% and 100%; and Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation. For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid. The applicable full salary ranges for this position, by specific state, are listed below: New York City Metro Area: $44,000.00 - $185,000.00 Non-Metro New York state & Washington state: $44,000.00 - $185,000.00 For quota-based sales roles on Cisco's sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined. ** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements. Cisco is an Aff... (EOE statement continues) #J-18808-Ljbffr

A leading technology company is seeking a skilled Design Verification Engineer to focus on functional and performance verification of GPU designs in San Jose, California. This role involves developing verification plans, maintaining UVM-based environments, and collaborating with multiple teams to ensure adherence to specifications. The ideal candidate should have a Bachelor's degree and significant experience in ASIC/SoC/GPU/CPU development, particularly in verification processes. It is a 6-month onsite contract position. #J-18808-Ljbffr

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. The Role AMD is looking for an ASIC Design STA engineer to contribute to the development of large SoCs, featuring multiple physical blocks and over 300 clock domains. The candidate\'s responsibilities will include building and verifying timing constraints for intricate SoC designs. This role demands a combination of SDC expertise, EDA tool proficiency, and TCL-based scripting abilities. The candidate should possess extensive experience in SDC development and debugging, be familiar with enhancing various RTL quality metrics for complex, hierarchical designs, and be able to automate these processes for increased efficiency. Proficiency in both front-end (RTL) processes and back-end (Synthesis and P&R) processes is preferred. The Person High energy candidates with strong written and verbal communication skills, and structured, well-organized work habits will be successful. Team and goal oriented are essential. Key Responsibilities Responsible for the development of complex multi-mode / multi-corner timing constraints that are compatible for RTL and signoff Lead the effort to maintain RTL quality metrics in complex, hierarchical designs, while automating the process for increased efficiency. Implement the pre-route timing checks and QoR clean up to eliminate timing constraints issues and ensure a quality handoff for STA checks. Collaborate with CAD on the development of pre-production synthesis (Design Compiler) and STA (Primetime) work flows. Require a blend of SDC expertise, proficiency in EDA tools, and Tcl based scripting abilities (in both EDA environment and standalone Linux Tcl shell scripts) Preferred Experience Worked with EDA tools that enable RTL quality checks Hands on experience in building the timing constraints for IPs, blocks and Full-chip implementation in both flat/hierarchical flows. Experience with analyzing the timing reports and identifying both the design and constraints related issues. Ability to multitask, grasp new flows/tools/ideas. Experience in improving the methodologies. Preferred EDA tool experience: Synopsys Design Compiler/Primetime, Spyglass, Fishtail etc. Prior experience developing complex TCL scripts in Synopsys Design Compiler (DC) and PrimeTime (PT) Writing custom TCL QC and QoR checks using DC/PT object attributes queries and filters Strong analytical and problem-solving skills Academic Credentials Bachelors or Masters degree in computer engineering/Electrical Engineering Location: San Jose, CA #LI-DW1 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. #J-18808-Ljbffr

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: As a member of the front-end verification team you will be part of a multi-site team to help drive successful verification execution and prove the functional correctness of the next generation of AMD/Xilinx programmable devices. THE PERSON: You have a passion for digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Collaborate with architects, hardware and firmware engineers to understand the new features to be verified Take ownership of block level verification tasks Define test plans, test benches, and tests using System Verilog and UVM Debug RTL and Gate simulations and work with HW and SW development teams to verify fixes Review functional and code coverage metrics to meet the coverage requirements Develop and improve existing verification flows and environments PREFERRED EXPERIENCE: Strong understanding of computer architecture and logic design Knowledge of Verilog, system Verilog and UVM is a must Strong understanding of state of the art verification techniques, including assertion and constraint-random metric-driven verification Working knowledge of C/C++ and Assembly programming languages Exposure to scripting (python preferred) for post-processing and automation Experience with gate level simulation, power and reset verification ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering or a related field LOCATION: San Jose, CA #LI-DW1 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. #J-18808-Ljbffr

About JB&B JB&B's dynamic, inclusive, and collaborative culture is driven by our people. Headquartered in Manhattan's Financial District with branch offices in Boston and Philadelphia, our 400 employees are the foundation on which our global reputation for quality and innovative engineering is built. Throughout our history, JB&B's engineers have consistently made their mark on the industry. By leveraging cutting‑edge technologies with sound engineering, JB&B employees create high‑performance building designs that have transformed the skyline, reimagined healthcare, and look to transform the future by spearheading initiatives that contribute to a sustainable, low‑carbon built environment. About the Role We are seeking a Senior Engineer to join our dynamic Electrical team in our Boston office. This role is ideal for a professional with a proficient understanding of electrical design, project execution, and interdisciplinary coordination. For any inquiries about career opportunities at JB&B, please email *************. The Senior Engineer is expected to make a positive impact on the office environment by: Sharing technical knowledge and best practices with colleagues. Acting as a mentor to junior engineers, supporting their professional development. Actively participating in office initiatives, team‑building events, and knowledge‑sharing activities. Key Responsibilities Design Tenant fit‑out projects and complete specific tasks on base building/infrastructure upgrades; assemble riser diagrams, schedules, and floor plans. Plan and coordinate routing of major distribution, main equipment rooms, closets, shafts, and risers. Lead design tasks that support the overall trade system (e.g., branch circuiting, duct work distribution, piping distribution, etc.). Review shop drawings, perform site visits and punch‑lists with limited supervision to verify that designs are being implemented accurately. Understand documentation requirements and develop relevant content for each deliverable phase (e.g., SD, DD, CD and specifications). Understand and implement office procedures related to both design (archiving drawings, filing drawings and forms, etc.) and construction administration (updating shop drawing log, updating RFI log, etc.). Benefits Hybrid workplace offering the flexibility to work both from home and the office. Comprehensive benefits package including 401(k) employer match and stock options. Paid time off (PTO), volunteer program and employee resource groups. Training and professional development courses through JB&B University. Estimated Compensation $85,000-$93,000 annual salary. Equal Opportunity Employer Jaros, Baum & Bolles is an equal opportunity employer. All qualified candidates will receive consideration for employment without regard to race, ethnicity, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, marital status, military veteran status, unemployment status, or any other status protected by law. #J-18808-Ljbffr

BKF is a multi-service infrastructure consulting firm providing civil engineering and surveying services across California, the Pacific Northwest, and beyond. With offices throughout California and the Portland area, BKF has served transportation, water resources, land development, government, and federal clients for over 110 years. At BKF, you'll find a unique opportunity to grow your career with intention. Our culture values professional autonomy, innovation, and meaningful collaboration across offices. We are proud to be recognized with the Great Place to Work certification for the second year in a row. We're seeking Transportation Project Engineers to join our Bay Area offices. The ideal candidate will bring a few years of experience and a strong technical foundation in transportation design and civil engineering. This role involves independently applying standard engineering principles to a variety of transportation projects, including roadway improvements, intersection design, transit infrastructure, and multimodal corridors. Candidates should be confident performing geometric design, grading, and alignment tasks with minimal supervision. The position also offers opportunities for professional development, mentoring junior staff, and providing technical support throughout all phases of project deliver - from planning and design through construction support. Responsibilities Design and coordination of transportation infrastructure projects including roadways, corridors, roundabouts, curbs, retaining walls, overpasses, transit facilities, and wildlife crossings Preparation of geometric design plans and profiles in compliance with Caltrans, local, and regional standards Development of grading, drainage, and stormwater management plans for transportation corridors Design of transportation-related utility systems and coordination with public agencies and utility providers Preparation of technical reports, feasibility studies, and environmental documentation to support transportation projects Development of construction specifications, quantity takeoffs, and cost estimates for transportation infrastructure Integration of multimodal and sustainable design elements such as complete streets, green infrastructure, and ADA compliance Application of Federal, State, City, and County codes, including permitting and regulatory requirements for transportation projects Preparation of conceptual design studies and alternatives analyses for roadway and transit improvements Collaboration across departments and with external stakeholders, including transportation agencies, consultants, and community groups throughout the project lifecycle Qualifications 3+ years of experience in transportation engineering, with a focus on the design and development of roadway systems, multimodal corridors, roundabouts, curbs, retaining walls, overpasses, transit facilities, wildlife crossings, etc. B.S. in Civil Engineering or a related field from an ABET-accredited program is required Must be proficient in AutoCAD Civil 3D EIT certification highly preferred (candidates with EIT will be prioritized) Strong written and verbal communication skills Ability to collaborate effectively with internal teams and external partners, including public agencies, consultants, and community stakeholders Physical Demands: Must be able to regularly talk, hear and operate a computer, keyboard and mouse and occasionally lift, pull/push and carry up to 20 pounds with accommodations. Work Conditions: Exposure to constant or intermittent sounds at a low or moderate level consistent with an office setting. Exposure to high-stress, fast-paced, deadline-oriented environment. Travel to other BKF locations and client sites may be required. The typical base salary range for this position is $99,500.00 - $135,000.00, annualized depending upon skills, experience, education, and geographical location. This is a salary position paid biweekly. Competitive salaries, end of year bonuses, profit sharing, and 401k. BKF pays 100% of the premiums for medical, dental, and vision coverage and 50% for your dependents. Generous vacation and sick time packages. 8 Paid Holidays. Flexible schedules. Education reimbursement, Paid annual dues for professional and societal organizations. BKF offers competitive and award-winning benefits and perks. To learn more click here. BKF Engineers provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state or local laws. BKF Engineers does not accept unsolicited resumes from recruiters or employment agencies. In the event a recruiter or agency submits a resume or candidate without a previously signed agreement and a specific solicitation for the position or other approved engagement request for the position with BKF Engineers, BKF Engineers reserves the right to pursue and hire those candidate(s) without any financial obligation to the recruiter or agency. Any unsolicited submittals are done at the risk of the recruiter. #LI-Hybrid #J-18808-Ljbffr

we are seeking a skilled Power Electronics Engineer with strong experience in power electronics design, inverters, and motor control systems. The ideal candidate will have hands-on expertise in hardware design, simulation, prototyping, and testing of power electronic circuits, with a solid understanding of thermal performance and diagnostic instrumentation. Key Responsibilities: Design and develop power electronics front-end circuits and inverter systems Work on IPM motor control and associated power stages Perform simulations and analytical modeling of power electronic circuits Develop and support Hardware-in-the-Loop (HIL) platforms for power electronics validation Design, prototype, and test hardware assemblies Analyze and select inverter switching devices (IGBTs, MOSFETs, etc.) Perform thermal calculations, characterization, and reliability analysis of power structures Conduct hands-on testing using measurement and diagnostic instrumentation Collaborate with cross-functional teams including firmware, mechanical, and systems engineering Support troubleshooting, validation, and design optimization activities Required Qualifications: Bachelor's degree in Electrical Engineering, Electronics Engineering, or a related field 5+ years of experience in power electronics design and development Strong knowledge of inverters, switching devices, and power stages Experience with IPM motor control systems Proficiency in power circuit simulation and analysis Hands-on experience in hardware design, prototyping, and testing Experience using measurement and diagnostic instruments (oscilloscopes, power analyzers, multimeters, etc.) Understanding of thermal design, calculations, and characterization Preferred Skills (Nice to Have): Experience with HIL platforms and validation environments Familiarity with automotive, HVAC, or industrial power electronics systems Knowledge of relevant safety and compliance standards Work Environment: Onsite role based in New Freedom, PA Hands-on engineering lab and prototype development environment

A leading AI research company in San Francisco is seeking a Software Engineer for the Fleet Hardware team. This role focuses on ensuring the reliability and uptime of compute fleets, minimizing hardware failures. Responsibilities include building automation systems, collaborating with various technical teams, and developing monitoring tools. Ideal candidates have experience with large-scale server environments and proficiency in languages like Python or Go. OpenAI values safety and seeks individuals who can navigate complex hardware systems. #J-18808-Ljbffr