Senior engineer jobs in Salinas, CA - 4,065 jobs

A leading semiconductor company in San Jose is seeking a Staff Power Module Design Engineer. You'll develop innovative power module products and collaborate with industry experts. The role requires a strong educational background in Power Electronics and significant experience in switching power converter design. This position offers competitive pay within a vibrant engineering team, fostering professional growth and mentorship opportunities. #J-18808-Ljbffr

Meet the Team Join the Campus Connectivity & Competitive Technical Marketing team-an elite group of engineers committed to shaping Cisco's competitive strategy and driving product excellence. We are looking for driven, curious, and highly technical individuals who thrive at the intersection of cutting-edge networking technologies, market dynamics, and customer impact. This role provides a unique opportunity to influence Cisco's portfolio by deeply understanding competitor offerings and helping define what the next generation of enterprise networking should look like. Your impact As a Competitive Technical Marketing Engineer, you will strengthen Cisco's position across Campus Switching, Routing, Wireless, Security, and Cloud-managed solutions by conducting in-depth competitor research and comparisons with Tier 1 vendors across campus networking. You will perform hands-on competitive testing and validation on Cisco platforms versus multi-vendor alternatives, and analyze industry trends and emerging technologies to guide product strategy. In collaboration with Product Management, Engineering, UX, CX, and Sales, you will define customer needs and influence product roadmaps. You will participate in architectural reviews and provide strategic recommendations based on competitive insights, validate early product concepts with customers, and advocate for their requirements throughout the product lifecycle. You will develop technical content including whitepapers, playbooks, test reports, demos, benchmark studies, deployment guides, and sales materials. Additionally, you will deliver technical training globally through webinars, workshops, recorded sessions, and events, and represent Cisco at major industry events such as CiscoLive, GSX, and partner conferences. Finally, you will provide technical leadership and escalation support for strategic competitive opportunities via the Cisco Global Win Center. You will lead technical discussions with customers and partners to educate on Cisco architectures and guide network design, serving as a trusted expert on competitor capabilities and market positioning. Minimum Qualifications Bachelors + 8 years related experience, OR Masters + 6 years, OR PhD + 2 year. Strong foundational expertise in enterprise networking-including switching, routing, wireless, and network security fundamentals. Hands-on experience with production network designs and/or multi-vendor campus infrastructures. Demonstrated ability to perform technical research, competitive analysis, or solution testing. Strong presentation, communication, and technical writing skills. Proficiency with content development tools (PowerPoint, Word, Camtasia, or similar). Ability to work independently in a fast-paced environment. Preferred Qualifications CCNP-level knowledge; CCIE-level expertise strongly preferred. Experience with network policy, identity solutions, and campus network automation or management platforms. Familiarity with Spirent Test Center, IXIA BreakingPoint, or similar test/validation tools. Experience with Meraki, Cisco Catalyst Center, or multi-vendor cloud management platforms. Prior experience in Technical Marketing, Sales Engineering, Customer Experience, or Product Management. Ability to travel up to ~10% Why Cisco? At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. Message to applicants applying to work in the U.S. and/or Canada The starting salary range posted for this position is $168,800.00 to $241,200.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits. Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process. U.S. employees are offered benefits, subject to Cisco's plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time. U.S. employees are eligible for paid time away as described below, subject to Cisco's policies: 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees 1 paid day off for employee's birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees Exempt employees participate in Cisco's flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations) 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next Additional paid time away may be requested to deal with critical or emergency issues for family members Optional 10 paid days per full calendar year to volunteer For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco's policies. Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows: .75% of incentive target for each 1% of revenue attainment up to 50% of quota; 1.5% of incentive target for each 1% of attainment between 50% and 75%; 1% of incentive target for each 1% of attainment between 75% and 100%; and Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation. For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid. The applicable full salary ranges for this position, by specific state, are listed below: New York City Metro Area: $168,800.00 - $277,400.00 Non-Metro New York state & Washington state: $148,800.00 - $248,200.00 For quota-based sales roles on Cisco's sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined. ** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements. Cisco is an Affirmative Action and Equal Opportunity Employer and all qualified applicants will receive consideration for employment without regard to race, color, religion, gender, sexual orientation, national origin, genetic information, age, disability, veteran status, or any other legally protected basis. Cisco will consider for employment, on a case by case basis, qualified applicants with arrest and conviction records. #J-18808-Ljbffr

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE We are seeking a Senior Member of Technical Staff (SMTS) SoC Architect to join our SoC Architecture team. In this role, you will define and drive architecture for critical SoC functions across roadmap and custom devices. You will focus on chip pervasive components, while ensuring seamless integration with processor subsystems, interconnect, AI accelerators, and memory systems. THE PERSON You are passionate about complex SoC architecture and thrive in cross-functional environments. You have deep technical expertise, strong analytical skills, and the ability to balance performance, power, and area trade-offs. You communicate effectively across teams and are comfortable influencing architecture decisions for next-generation silicon. KEY RESPONSIBILITIES Define and develop SoC architecture for CPF components, including Analog IPs, clocking/reset, and silicon monitors. Collaborate with processor, interconnect, AI, and memory subsystem architects to ensure cohesive system-level design. Specify architecture requirements, conduct early-stage analysis, and create detailed specifications. Drive PPA optimization and ensure scalability across roadmap and custom devices. Partner with design, verification, and physical implementation teams to ensure functional correctness and timing closure. Analyze trade-offs for performance, power, reliability, and manufacturability. Influence strategies for security, safety, and reliability across CPF domains. Strong communication and leadership skills to influence cross-functional teams. PREFERRED EXPERIENCE Strong background in SoC architecture, including processor subsystems, interconnect, memory systems, and AI accelerators. Expertise in Analog IPs (IOs, PLLs, eFuses, monitors), clocking/reset architecture, and silicon lifecycle management. Familiarity with SoC on-chip protocols (e.g., AXI) and system-level QoS. Experience with low-power design techniques, boot/reset flows, and power management. Knowledge of design methodologies, advanced process technologies, and associated challenges. Proficiency in modeling and automation using Python, SystemC, or similar languages. ACADEMIC & EXPERIENCE REQUIREMENTS BS or MS or PhD in Electrical/Computer Engineering or related field. Proven track record in delivering architecture for high-performance, low-power SoCs. LOCATION: San Jose, California Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. #J-18808-Ljbffr

Senior Test Engineer A fantastic career opportunity for an experienced Test Engineer to join a Global Technology Company company, specialising in Semiconductor Design. Here you'll collaborate with some of the brightest minds in the industry. In this highly visible role, you'll play a key part in defining and designing next-generation products that power the world's most advanced systems. Responsibilities: Driving Innovation in Test Engineering . You will lead the development of comprehensive test strategies by collaborating closely with design teams to ensure robust test coverage and product reliability. Communicate effectively across cross-functional teams, customers, and suppliers to align on quality and performance goals. ATE Hardware Design for NPI Success. You will design advanced Automated Test Equipment (ATE) hardware-including load boards, probe cards, and interfaces-to support New Product Introduction (NPI) and accelerate time-to-market. End-to-End Product Lifecycle Ownership. You will manage the full product lifecycle from initial design and prototyping through high-volume manufacturing and sustaining/RMA support, ensuring seamless transitions and long-term product success. Yield & Efficiency Optimization. You will continuously improve test yield, reduce test time, and scale multi-site testing to enhance throughput and cost-efficiency in production environments. Qualifications: B.S./M.S. in Electrical Engineering or equivalent experience 4+ years of Industry Experience Experience and in-depth knowledge of Advantest V93k required Experience with Test coverage and DFT (Scan/ATPG/JTAG/BIST) Experience working with Local and offshore OSAT's Experience on Smartest, Redhat and GIT/SVN Ability to independently learn and problem solve Comfort with collaboration, open communication and reaching across functional borders By applying to this role you understand that we may collect your personal data and store and process it on our systems. For more information please see our Privacy Notice (*************************************************

A leading IoT solutions company in San Jose is seeking a Sr. Staff PHY Design Engineer to join their innovative team focusing on wireless semiconductor RF technology. In this role, you will be responsible for defining, developing, and refining hierarchical UVM testbench for verification of wireless PHY and MAC layers. The position offers a competitive salary range of $216,091 - $220,000 per year and a collaborative work environment that encourages growth and diversity. #J-18808-Ljbffr

Select how often (in days) to receive an alert: Senior Staff Engineer, Hardware Design TPL Senior Staff Engineer, Hardware Design Band: 11 Region: Americas Country: USA State/Province: California City: San Jose Summary As a Technical Product Leader within Celestica's Hardware Platform Solutions design team, you'll play a pivotal strategic role, acting as the crucial link between engineering innovation and business objectives. You'll be instrumental in defining the product vision, strategy, and roadmap for our hardware platforms. This involves expertly translating complex user needs and market demands into precise technical requirements, and then meticulously overseeing the entire product development lifecycle. This position demands a robust technical background in hardware, proven leadership skills, and an exceptional ability to collaborate seamlessly with diverse cross-functional teams to ensure the successful delivery of our cutting-edge hardware products. Detailed Description Performs tasks such as, but not limited to, the following: Lead and participate in ideation and concept design; creating new and reusable hardware architectures for current and new product categories Engage with strategic customers to represent our hardware products at a deep technical level Provide strategic direction for the planning, design, and architecture of high quality, complex hardware systems Work with different constituencies including Product Group Technology Leads, Product Managers, Marketing, Sales/SEs to define technology roadmap Understand compute industry trends and in partnership with senior leadership assisting in developing the strategic direction for innovative technology initiatives Work closely with the product teams (engineers and product line managers) to bridge this technology roadmap into hardware products Subject Matter Expert (SME) with ability to impart industry trends through sharing knowledge and mentoring across Hardware Product Solutions (HPS) Selection of key components for optimal design and cost efficiency for successful market adoption Review and analyze new technologies and trends, and summarize results for presentation to technical and non-technical audiences Engage with strategic customers to represent our hardware products at a deep technical level Understand the customer use case to drive internal innovation 12+ years experience Proficient in all compute hardware architectures including datacenter, telecommunication, enterprise and service provider. A strong understanding of compute components and protocols Experience with AMD and Intel GPU, Broadcom DNX, Intel/AMO processor, hard disk, SSD, SAS/SATA, PCIE, CXL, Ax86 Excellent interpersonal skills, well organized, self-motivated person, strong customer service, project, and analytical skills Experience in early product concepts and hardware architecture development through prototyping, evaluation of new designs and system architecture and debug Solid understanding of security elements Strong communication and presentation skills Ability to create and analyze architectural and product specifications enabling hardware product development Physical Demands Duties of this position are performed in a normal office environment. Duties may require extended periods of sitting and sustained visual concentration on a computer monitor or on numbers and other detailed data. Repetitive manual movements (e.g., data entry, using a computer mouse, using a calculator, etc.) are frequently required. Occasional travel may be required. Typical Experience 12+ years' experience Typical Education Bachelor's degree in Electrical/ Computer Engineering/ Physics Educational Requirements may vary by Geography Salary Range The salary range described in this posting is an estimate by the Company, and may change based on several factors, including by not limited to a change in the duties covered by the job posting, or the credentials, experience or geographic jurisdiction of the successful candidate. Salary Range: $150,735-236,250 Notes This job description is not intended to be an exhaustive list of all duties and responsibilities of the position. Employees are held accountable for all duties of the job. Job duties and the % of time identified for any function are subject to change at any time. Celestica is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, pregnancy, genetic information, disability, status as a protected veteran, or any other protected category under applicable federal, state, and local laws. This policy applies to hiring, promotion, discharge, pay, fringe benefits, job training, classification, referral and other aspects of employment and also states that retaliation against a person who files a charge of discrimination, participates in a discrimination proceeding, or otherwise opposes an unlawful employment practice will not be tolerated. All information will be kept confidential according to EEO guidelines. Celestica is an E-Verify employer. COMPANY OVERVIEW: Celestica (NYSE, TSX: CLS) enables the world's best brands. Through our recognized customer-centric approach, we partner with leading companies in Aerospace and Defense, Communications, Enterprise, HealthTech, Industrial, Capital Equipment and Energy to deliver solutions for their most complex challenges. As a leader in design, manufacturing, hardware platform and supply chain solutions, Celestica brings global expertise and insight at every stage of product development - from drawing board to full-scale production and after-market services for products from advanced medical devices, to highly engineered aviation systems, to next-generation hardware platform solutions for the Cloud.Headquartered in Toronto, with talented teams spanning 40+ locations in 13 countries across the Americas, Europe and Asia, we imagine, develop and deliver a better future with our customers. Celestica would like to thank all applicants, however, only qualified applicants will be contacted. Celestica does not accept unsolicited resumes from recruitment agencies or fee based recruitment services. Nearest Major Market: San Jose Nearest Secondary Market: Palo Alto #J-18808-Ljbffr

Altera .# **Job Details:**### ## **Job Description:****About the Role:**For decades, Altera has been at the forefront of programmable logic technology. Our commitment to innovation has empowered countless customers to create groundbreaking solutions that have transformed industries.Join us in our journey to becoming the world's #1 FPGA company!Altera is seeking a **Senior Design Automation Engineer** to join our Design Methodology Automation and Infrastructure Team.The Design Methodology Automation and Infrastructure Team is responsible for building and maintaining the core automation infrastructure that supports Altera's FPGA design flows-from RTL to GDSII. In this senior role, you will drive the architecture, development, and optimization of highly automated, reliable, and scalable flow systems that enhance design productivity and accelerate development cycles for next-generation FPGA products. You will influence technical direction, mentor junior engineers, and collaborate closely with cross-functional teams to deliver world-class automation solutions.**Key Responsibilities:*** Architect next-generation unified FPGA/SoC design methodologies spanning Front-End, handoff to Backend, Design Verification, Design-For-Test (DFT), Design Data Management/Release flows, and FPGA-specific flows such as Design Intent and Configuration Management.* Develop and integrate state-of-the-art EDA solutions, including ML/AI-enhanced tools, flows, and methodologies-sourced externally or developed internally-to create sustainable, scalable automation solutions for multiple chip design programs.* Collaborate with design automation technical leads, design domain leads, and domain managers to define and drive new design automation architectures from concept through full production deployment across upcoming product programs.* Partner with EDA vendors to evaluate, explore, and extend tool capabilities that improve design quality, shorten turn-around time, and enhance design optimization.* Architect, develop, deploy, and maintain advanced design automation flows and methodologies for digital and/or analog design at scale.* Lead evaluation, integration, and enhancement of EDA tools, driving improvements in design productivity, efficiency, and quality across multiple design teams.* Design and implement robust automation frameworks that reduce manual effort, increase reproducibility, and improve overall design throughput.* Identify workflow bottlenecks across design, verification, CAD, and methodology teams and lead cross-functional initiatives to streamline FPGA design execution.* Provide deep technical expertise in scripting, tool customization, and flow development for advanced semiconductor design needs.* Drive continuous innovation in design automation infrastructure through adoption of new methodologies, technologies, and optimizations.* Collaborate with internal and external EDA vendors, owning issue resolution, feature requests, and deployment of next-generation capabilities.* Mentor and provide technical leadership to junior engineers within the Design Automation organization.#LI-MD1**Salary Range**The pay range below is for Bay Area California only. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance.$142,600 - $206,500 USDWe use artificial intelligence to screen, assess, or select applicants for the position.### ## **Qualifications:****Minimum Qualifications:**Bachelor's or Master's in Computer Science, Electrical Engineering, or equivalent, with a minimum of 10 years of experience in IC Design or Design Automation and experience in the following:* Extensive experience with industry-standard EDA tools and hands-on expertise in design methodologies across multiple domains, such as Front-End Logic Design flows, Design Intent and FPGA-specific flows, Design Verification flows, and Design-for-Test (DFT) flows (with Back-End flow knowledge considered a plus).* Strong programming skills in Python, Tcl, C-shell, C, C++, or similar languages.* Familiarity with ML/AI applications and algorithms and their use in EDA or design methodology optimizations.* Proven leadership skills for driving collaborative, cross-functional projects, with strong communication and influencing abilities### ## **Job Type:**Regular### ## **Shift:**Shift 1 (United States of America)### ## **Primary Location:**San Jose, California, United States### ## **Additional Locations:**### ## **Posting Statement:**All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. #J-18808-Ljbffr

A leading electronic design automation company in San Jose seeks a Principal Field Service Engineer to install, troubleshoot, and maintain hardware emulation platforms. The role involves providing technical support at customer sites, primarily in the eastern US. Candidates should have a strong background in hardware troubleshooting, excellent communication skills, and a willingness to travel. Experience with Linux/Unix systems and various debugging tools is preferred. Join a company that values innovation and equal opportunity. #J-18808-Ljbffr

A leading semiconductor company in San Jose is seeking a Senior High-Speed Mixed-Signal Layout/Analog Engineer. In this role, you will collaborate with circuit designers, optimize performance for SERDES analog PHY, and utilize tools like Virtuoso and Calibre. Ideal candidates have a Bachelor's with extensive experience in RF/analog design. The position offers a competitive salary ranging from $180,950 to $289,050 USD and comprehensive benefits including medical, dental, and flexible work options. #J-18808-Ljbffr

A global travel technology firm in San Jose seeks a Machine Learning Engineer III to enhance CRM personalization efforts. You will design robust ML pipelines for real-time personalization and operationalize ML models for marketing integration. Ideal candidates will have strong experience with Python, big data technologies, and containerization. This role offers competitive compensation within a thriving tech environment, accompanied by excellent travel perks and benefits. #J-18808-Ljbffr

Physical Design Engineer Job at Apple, Cupertino, CAJob Description Physical Design Engineer Department: Hardware Imagine what you can do here. Apple is a place where extraordinary people gather to do their best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do. Description Apple Inc. has the following available in Cupertino, California, and various unanticipated locations throughout the USA. Responsible for physical design and implementation of partitions. Build partition architecture and drive physical aspects early in the design cycle. Physically implement design partitions (from netlist to tape-out) for a highly complex System-on-Chip (SoC) utilizing state-of-the-art process technology. Work on partition-level place and route (P&R) implementation, including floor planning, clock and power distribution, timing closure, physical and electrical verification. Complete netlist to GDSII implementation for partitions meeting schedule and design goals. Oversee timing, physical, and electrical verification, and drive the signoff closure for the partitions. Resolve design and flow issues related to physical design, identify potential solutions, and drive execution. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. The base pay range for this role is between $151,091 - $214,500/year, depending on skills, qualifications, experience, and location. PAY & BENEFITS: Apple employees have the opportunity to participate in Apple's stock programs, receive benefits including medical and dental coverage, retirement benefits, discounts, free services, educational reimbursement, and potential bonuses or relocation assistance. Learn more about Apple Benefits. Minimum Qualifications Master's degree or foreign equivalent in Electrical Engineering or related field. 2 years of relevant experience. 1 year of experience with each of the following: Encounter Design System tool, QRC, Calibre, Voltus, Primetime. Preferred Qualifications N/A Apple is an equal opportunity employer committed to inclusion and diversity. We promote equal opportunity for all applicants regardless of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or other protected characteristics. Note: Apple benefits, compensation, and employee stock programs are subject to eligibility and other terms. This job posting appears to be active and does not indicate it is expired. #J-18808-Ljbffr

A leading tech company invites applications for a Machine Learning Engineer to advance AI research in California. The role focuses on Generative AI and requires a PhD or Master's degree, with a minimum of 3 publications in AI. The candidate will collaborate across teams and publish findings, contributing to networking solutions and AI innovations. This full-time position offers a competitive salary and benefits, fostering an inclusive workplace culture. #J-18808-Ljbffr

Credo is engineering the future of high-speed connectivity for the AI-driven world. With a deeply rooted legacy of innovation and a passion for solving the most complex networking challenges, we deliver industry-leading solutions that power the next generation of cloud, AI, and hyperscale data centers. Credo is pioneering a systems-level approach to connectivity, integrating hardware, software, and architecture to deliver holistic solutions. This strategy not only differentiates us in the market but also creates significant value for our customers by accelerating deployment, improving performance, and reducing complexity across their infrastructure. At Credo, you'll be part of a team of world-class technologists and engineers that thrive on pushing the limits of what's possible for some of the world's most important companies. Our portfolio includes cutting edge solutions including our software, optical DSPs, PCIe/CXL products, SerDes IP, and advanced Active Electrical Cables (AECs) all designed for maximum performance, energy efficiency, and scalability. We foster a culture of technical excellence, collaboration, and continuous learning, where your ideas can shape the future of connectivity. From silicon architects to systems engineers, every role at Credo contributes to solving real-world problems at scale. Join us and help us architect the next generation of disruptive networking technologies - because at Credo, We Connect. About the Role As a Senior Physical Design Engineer, you will manage all aspects of physical design and implementation for Credo SoC designs. This role involves close collaboration with the local frontend team and PD/integration teams in China and Taiwan to ensure successful tapeouts. Responsibilities Lead and drive top-level, IP, and block-level physical implementation from RTL to GDSII. Focus on timing, power, and area (PPA) optimization for high-speed SerDes and interconnect subsystems. Establish and maintain physical design methodologies, flow automation, chip floorplanning, power/clock distribution, chip assembly, P&R, and timing closure. Perform static timing analysis, power and noise analysis, and physical verification. Collaborate closely with frontend and integration teams to ensure successful tapeouts. Basic Qualifications BS/MS in EE/CS with 10+ years of hands-on experience in back-end physical design and verification. Familiar with hierarchical physical design strategies, methodologies. Proven track records of handling chip level P&R independently and taping out complex SOC chips under tight schedule pressure. Experience with 5nm and lower technology nodes. Strong proficiency with EDA tools such as Cadence Innovus and Synopsys Fusipn Compiler. Solid knowledge on static timing analysis (PrimeTime/Tempus), EM/IR-Drop/crosstalk analysis (PTSI/Voltus/Redhawk), extraction (Quantus/StarRC). Preferred Qualifications Familiarity with DRC, Antenna, LVS, ERC tools like Calibre. The base salary range for this position is $140,000 - $170,000 a year. The base salary ultimately offered is determined through a review of education, experience, training, skills, qualifications, and location. This position is also eligible for a discretionary bonus, equity and a full range of medical and other benefits. Credo is an Equal Opportunity Employer. We are committed to creating an inclusive environment for all employees and welcome applicants from diverse backgrounds without regard to race, color, religion, gender, sex, sexual orientation, national origin, genetic information, age, disability, veteran status, or any other legally protected basis. If you have a disability or special need that requires accommodation to navigate our website or complete the application process, email ********************. #J-18808-Ljbffr

A leading network and security company is seeking an Engineering Sr Manager to lead a team building and operating distributed cloud services. The role requires over 10 years of software engineering experience, including significant leadership experience. The successful candidate will drive engineering best practices, ensure secure and scalable solutions, and collaborate across teams. This position is hybrid, allowing flexibility in work location, and offers an attractive salary range between $216,800 and $325,200, complemented by various benefits. #J-18808-Ljbffr

Project programme and commercial management, Structural, Bridges At Mott MacDonald, we trust our brilliant people to do brilliant things in engineering, management, and development services, supporting multisector project work in over 150 countries. As one of the largest employee‑owned companies in the world, we pride ourselves on our ability to deliver exceptional outcomes through our network of 20,000+ talented consultants. With sustainability and innovation at the heart of all our sectors in North America, including, Buildings, Energy, Transportation, and Water. We believe in empowering our people to excel, learn, and grow, offering diverse opportunities to contribute to career‑defining work. Join us and be part of a collaborative environment where your ambitions are united with ours, and you can truly shape your story. Mott MacDonald's transportation and infrastructure teams work on some of the largest and most challenging projects across the US. We've completed and are currently involved in a number of complex projects incorporating our values of technical excellence, sustainability, and improving communities. Based in one of our Bay Area offices, the Senior Engineer will provide a lead technical role in developing projects. Typical transportation related projects include bridges (rail/LRT/road), retaining walls, underground and buried structures, transit station structures, and miscellaneous civil structures. Responsibilities will include, but may not be limited to: Developing conceptual, preliminary, and detailed final designs using industry‑standard analysis and design software. Actively participating in project, client, and team meetings. Assisting and mentoring junior staff. Reviewing, preparing, and modifying designs. Analyzing and preparing type studies, reports, specifications, quantities, and estimates. Interacting with team members and assisting in the coordination of work with technicians and design professional from other disciplines. Gaining exposure to project, commercial, and client management. Undertaking a ‘digital by default' approach in deliverables. Supporting our ‘Purpose' in everything you do. Candidate Specification The ideal candidate will have the following experience: A bachelor's degree in civil or structural engineering from an ABET accredited university. Must possess 8 years of structural engineering experience. Experience working with AASHTO, Caltrans, AREMA, ASCE, and CBC design codes and standards. Experience with California seismic analysis and design. Proficient in the design of structures and foundations using cast‑in‑place reinforced concrete, precast/prestressed concrete, post‑tensioned concrete, and structural steel. Methodical approach to problem solving to undertake tasks efficiently and independently. Excellent verbal communication skills, which allow you to confidently liaise with clients and team members. Excellent technical written communication and attention to detail, with an ability to demonstrate accurate technical drawings and good report writing. Excellent teamwork skills, to collaborate effectively with colleagues. A California Professional Engineer (PE) license or ability to obtain one within one year. A positive attitude, strong commitment for technical excellence, high ethical standards, and an eagerness to learn and perform a wide variety of tasks are a must. Our teams are comprised of bright and enthusiastic people who wish to make a difference to the world that we live in. If you share that vision and don't have all the experience outlined in this posting, we still want to hear from you! Let's discuss how we can help you take the next step in your career and how you can participate in an exciting new chapter for Mott MacDonald in North America. At Mott MacDonald, we provide a comprehensive benefit package that includes 401k, medical, dental and vision insurance, short‑term/long‑term disability, paid holidays, PTO, parental leave and company paid life insurance. The expected salary for this position is $148,000-$182,000. Individual pay is determined based on several factors such as work location, education, experience, and unique skills. Equal opportunity is the law. We seek to promote fair employment procedures and practices to ensure equal opportunities for all. We encourage individual expression in our workplace and are committed to creating an inclusive environment where everyone feels they have the opportunity to contribute. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, age, protected veteran status, creed, marital status, sexual orientation, gender identity, citizenship status or disability status. At Mott MacDonald, we believe it makes business sense for you and your manager to choose how you can work most effectively to meet your client, team, and personal commitments. We offer a hybrid working policy that embraces your well‑being, flexibility, and trust. #J-18808-Ljbffr

As a Senior Physical Design Engineer, you will be responsible for the physical design implementation PnR run, Performance/Power/Area (PPA) comparison, congestion & DRC analysis, and design optimization. You may also do synthesis, debugging & data analysis, scripting, STA or timing analysis. You will be reporting to Manager of Advanced Chip implementation team at its San Jose Design Center, California and joining a team of engineers dedicated to pushing the envelope for the world's leading semiconductor company. We are currently operating in a hybrid work schedule with 4 days in office. Responsibilities Responsible for the physical implementation on TSMC's most advanced process nodes. Netlist-to-GDS flow including block/soc-level placement, clock tree synthesis, routing, and design optimization. Evaluate flow and methodologies to optimize power, performance, and area (PPA). Analyze standard cell library utilization and route congestion data. CAD development including customizing design flows and creating comparison tables using scripting language such as TCL, Python, Perl and Shell. Minimum Qualifications Master's degree in Electrical Engineering or Computer Science with a minimum of 4 years of relevant industry experience. In depth knowledge of hardware design courses including VLSI design, digital integrated circuits, logic design, design for testing, computer architecture, and digital design automation. Knowledge on physical design implementation flows, auto placement and routing (APR), static timing analysis (STA), layout design, physical design verification (PDV), IREM signoff, and CAD development. Experiences in research projects or internship related to RTL coding, synthesis, digital design and testing, physical implementation or design verification. In depth knowledge of major EDA tools/design flows. Experience in Python/Perl/TCL language programming and CSH script. Ability to work regularly at a customer site in the South Bay area. Preferred Qualifications Able to independently complete Netlist-GDS P&R. Excellent communication skills and strong problem-solving skills. Positive, Active, Collaborative, Self-motivated, Adaptable and Flexible. TSMC N16 and below technology. Experience in software programming is a plus. Company Description As a trusted technology and capacity provider, TSMC is driven by the desire to be: The world's leading dedicated semiconductor foundry. The technology leader with a strong reputation for manufacturing excellence. Advancing semiconductor manufacturing innovations to enable the future of technology. TSMC pioneered the pure-play foundry business model when it was founded in 1987 and has been the world's leading dedicated semiconductor foundry ever since. The Company supports a thriving ecosystem of global customers and partners with the industry's leading process technologies and a portfolio of design enablement solutions to unleash innovation for the global semiconductor industry. With global operations spanning Asia, Europe, and North America, TSMC serves as a committed corporate citizen around the world. In North America, TSMC has a strong sales and service organization that works with customers by helping them achieve silicon success with cutting‑edge technologies and manufacturing excellence. The Company has continued to accelerate its R&D investment and staffing in recent years and is expanding its manufacturing footprint to support customer innovation with 3D IC technologies and optimal manufacturing capacity. Diversity statement TSMC Technology, Inc. is committed to employing a diverse workforce and provides Equal Employment Opportunity for all individuals regardless of race, color, religion, gender, age, national origin, marital status, sexual orientation, gender identity, status as a protected veteran, genetic information, or any other characteristic protected by applicable law. TSMC is an equal opportunity employer prizing diversity and inclusion. We are committed to treating all employees and applicants for employment with respect and dignity. If you require reasonable accommodation due to a disability during the application or the recruiting process, please feel free to notify us at G_Accommodations@tsmc.com. TSMC confirms to all applicants its commitment to meet TSMC's obligations under applicable employment law. Reasonable accommodations will be determined on a case‑by‑case basis. For positions requiring access to technical data subject to export control regulations, including Export Administration Regulations, TSMC Technology, Inc. may have to obtain export licensing approval from the U.S. Government for certain individuals. All employment is contingent upon TSMC Technology, Inc. obtaining any export license or other approval that may be required by the U.S. Government. Pay Transparency Statement At TSMC, your base pay is only part of your overall total compensation package. At the time of this posting, this role typically pays a base salary between $108,000/yr and $167,500/yr. The range displayed reflects the minimum and maximum target for new hires. Actual pay may be more or less than the posted range. Factors that influence pay include the individual's skills, qualifications, education, experience and the position level and location. TSMC's total compensation package consists of market competitive pay, allowances, bonuses and comprehensive benefits. We also offer extensive development opportunities and programs. #J-18808-Ljbffr

TENEX is an AI-native, automation-first, built-for-scale Managed Detection and Response (MDR) provider. We are a force multiplier for defenders, helping organizations enhance their cybersecurity posture through advanced threat detection, rapid response, and continuous protection. Our team is composed of industry experts with deep experience in cybersecurity, automation, and AI-driven solutions. Backed by leading investors, we are rapidly growing and seeking top talent to join our mission of revolutionizing the MDR landscape. As a Head of Platform Engineering at TENEX, you will be a strategic leader responsible for defining the technical vision, architecture, and execution strategy for our core, high-performance cybersecurity platform. You will be accountable for the scalability, reliability, security, and operational excellence of the platform that powers our AI-driven MDR services, leading the teams that build and maintain our foundational infrastructure, data pipelines, and engineering standards. Culture is one of the most important things at TENEX.AI - dive into our culture deck at culture.tenex.ai to see how we live it every day, with a deep emphasis on the collaboration and community that only in-person work delivers. Job Responsibilities Define Platform Strategy & Architecture: Overview the entire service platform, overseeing architectural design, technology selection, and strategic planning to ensure the platform can scale to petabytes of security data and billions of daily events. Own the Platform Engineering Roadmap: Prioritize initiatives that maximize reliability, performance, security, and developer efficiency across our core systems. Lead Site Reliability Engineering (SRE): Define and driving adherence to critical Service Level Objectives (SLOs) and Service Level Indicators (SLIs), managing on-call rotations, and minimizing toil through automation. Drive Operational Excellence: Drive the platform, implementing advanced monitoring, observability (logs, metrics, tracing), automated provisioning, and disaster recovery strategies. Lead & Mentor Platform Engineering Team: Engineering managers and a diverse team of platform, data, and infrastructure engineers. Drive a culture of engineering rigor, operational ownership, and continuous improvement. Collaborate with Product Management & Security Operations: Translate new product requirements and operational needs into robust, scalable, and cost-effective platform solutions. Establish and Enforce DevSecOps Practices: Standarize CI/CD pipelines, infrastructure-as-code (IaC), security testing, and deployment mechanisms to ensure rapid, secure, and reliable software delivery. Foster Innovation: Identify and driving the adoption of new engineering methodologies and infrastructure technologies. Push the frontier-leverage cloud-native patterns, advanced data stores, and distributed computing frameworks to maintain a competitive advantage. Required Skills & Qualifications Platform & Engineering Leadership Expertise 8+ years of progressive experience in Software or Platform Engineering, including 3+ years managing multiple engineering teams or a significant platform portfolio. Proven track record of architecting, building, and operating highly scalable, distributed, and secure enterprise-grade SaaS platforms. Expertise in Site Reliability Engineering (SRE) principles, cloud-native architecture, and driving organizational process improvements in large-scale engineering environments. Security & Technical Acumen 10+ years of experience in the cybersecurity, enterprise SaaS, or B2B technology industry. Deep expertise in scalable, distributed system architecture, microservices, and containerization (Docker, Kubernetes) in a production environment. Strong understanding of modern security technologies such as SIEM, EDR, Threat Intelligence, and the challenges of processing high-volume, real-time security event data at scale. Strong fundamentals in cloud infrastructure (AWS, GCP, or Azure), networking, and building secure and compliant (e.g., SOC 2, ISO 27001) environments. Data & AI/ML Platform Expertise Deep understanding of modern data architecture, including real-time data pipelines, stream processing, and large-scale data warehousing/lakehouse technologies (e.g., Kafka, Spark, Flink). Experience in defining and building the underlying infrastructure to support AI/ML model training, deployment, and monitoring (MLOps), including vector databases and feature stores. Nice-to-have Prior experience in a Managed Security Service Provider (MSSP) or Managed Detection and Response (MDR) setting. Experience with graph databases or security-focused knowledge graphs. Background leading teams in high-growth startups or enterprise SaaS. Soft Skills Exceptional communication, presentation, and negotiation skills, with the ability to articulate technical strategy to executive leadership, product teams, and external partners. Strong strategic thinking and analytical skills to solve complex engineering and operational problems. Proven ability to mentor, inspire, and grow senior technical talent and leadership within the organization. A strong passion for cybersecurity and a commitment to building security-first platforms and automation. Clear, concise communication skills and a bias for collaborative problem-solving. Education & Certifications Bachelor's or Master's degree in Computer Science, Engineering, or a related field. Relevant certifications (e.g., cloud architecture, SRE, or security-related credentials) are a plus. #J-18808-Ljbffr

A leading financial technology firm in San Jose seeks a Staff Machine Learning Engineer to develop and implement production-scale machine learning solutions that enhance product experiences. The ideal candidate will have over 8 years of experience in machine learning, strong Python skills, and proficiency with major ML libraries. Responsibilities include designing models for personalization and managing data science projects while collaborating closely with different teams and mentoring junior staff. The role offers competitive remuneration and various benefits associated with a hybrid work model. #J-18808-Ljbffr

About us: FLINT focuses on the design-build and design-assist delivery methods, producing the highest quality of projects and yielding the greatest value to our clients. Our employees and industry partners are truly some of the best people you will ever work with. FLINT is built on values, ethics, quality design, and exceptional construction. Our “master builder” approach to design and construction is the hallmark of our firm. FLINT is honored to be selected as the General Contractor of the Year by the Associated Subcontractors Alliance of Sacramento for five consecutive years. One of the key attributes to the success of FLINT is the employment and retention of highly talented individuals. From this, FLINT has established itself as one of the preeminent Design-Builders in the western region. Our relationships and experiences have shaped our purpose: to create an extraordinary building experience through collaboration with passionate professionals. Who we are seeking: » 3+ years of experience, capable of performing project management functions on small projects ($2-$5M) with minor Project Management oversight. Essential job functions: » Manage overall project administration and ensure compliance with all project requirements. » Engage with architects and owners for business development. » Draft and review subcontracts and purchase orders to ensure the scope of work is accurately defined. » Review project documents and familiarize with project participants. » Determine submittal requirements and maintain the submittal log. » Develop and maintain overall project schedules and short-term schedules. » Conduct regular site visits to ensure proper construction and adherence to schedule. » Obtain necessary permits and ensure timely receipt of recorded documents. » Strong grasp of construction terminology and activities. » Basic understanding of all trades including MEP and building permit process. » Ability to estimate CORs, assist in bidding, and assemble project estimates. » Proficiency in cost control types and delivery methods. » Skills in project documentation, scheduling, safety practices, and technology tools (Fieldview, Viewpoint, Team VPT1, Bluebeam, Pype, GCPay, P6, and Vista). » Business development skills with the ability to maintain customer relations. » Understanding of fee enhancement, risk mitigation, and client management. » Ability to mentor team members and promote teamwork and cooperation.