Senior verification engineer jobs in Colorado - 378 jobs

We are partnering with a leading innovator in sustainable cloud and data center infrastructure to identify a BMS Automation and Controls Engineer who will help shape the next generation of intelligent, energy-efficient facilities. This individual will lead the design and deployment of advanced Building Management System (BMS) and Electrical Power Monitoring System (EPMS) solutions that enable seamless automation, monitoring, and optimization of mission critical environments. This is an opportunity to work at the forefront of technology, building systems that combine reliability, efficiency, and sustainability while supporting the rapidly expanding world of artificial intelligence infrastructure. Key Responsibilities • Lead the design and development of automation and visualization solutions for BMS and EPMS platforms across large scale data center projects • Create intuitive dashboards, HMIs, and operator workflows that simplify the control of complex building and power systems • Develop automation scripts, tags, templates, and reports to improve commissioning, testing, and operational efficiency • Collaborate with multidisciplinary teams including engineering, construction, and OEM partners to scope, configure, and deploy automation solutions • Integrate diverse control systems using industry standard protocols such as BACnet, Modbus, OPC UA, and MQTT • Conduct system testing, simulations, and performance validation to ensure operational accuracy and reliability • Use real time and historical data to enhance fault detection, predictive maintenance, and overall system insight • Improve user interfaces to reduce alarm fatigue, enhance operator experience, and accelerate troubleshooting • Provide clear and actionable reporting to leadership on system performance, uptime, and energy efficiency • Mentor and train technical teams in best practices for automation development, programming, and visualization Ideal Experience • Bachelor's degree in Electrical Engineering, Controls Engineering, Computer Science, or a related field (advanced degree or certifications preferred) • Deep hands on experience with BMS and EPMS platforms, programming, graphics, scripting, and SQL or data integration • Proven success designing scalable, maintainable automation systems in mission critical environments such as data centers or industrial facilities • Familiarity with HVAC, electrical systems, PLC and DDC logic, and industrial automation • Strong understanding of control protocols including BACnet, Modbus, OPC UA, and MQTT • Ability to transform operational needs into user friendly automation and visualization solutions • Excellent collaboration and communication skills for engaging both technical teams and executive stakeholders • Passion for using data visualization and automation to improve efficiency, sustainability, and user experience

Join SEAKR Engineering, a leading-edge provider of advanced electronics for space applications. Pushing the boundaries of technology on a mission to change the world for the better from space. Job Description SEAKR is currently seeking a Verification Engineer who is responsible for developing verification and simulation strategies, conducting design reviews, creating a digital test plan and providing coverage metrics. The Engineer is responsible for the construction and maintenance of simulation environments using System Verilog with UVM (Universal Verification Methodology), and performing and evaluating regression tests for a design under test. The candidate must be able to extract and derive test requirements and sequences for an interface or interfaces based on available design documentation and requirements. Ability to architect and construct full test environments for complex devices using UVM, including coverage, is required. The candidate shall be capable of diagnosing sophisticated test failures and filing results, and be capable of analyzing code coverage to adjust agent sequence behavior. Ability to provide direction to less senior verification engineers is required. Ability to lead a team of verification engineers to fully verify a device is required. Ability to use simulation tools such as Mentor Graphics Modelsim/Questasim for simulation debug and reporting is required. Ability to analyze Verilog RTL to diagnose test failures is required. Ability to analyze VHDL is a plus. Must be able to work effectively under pressure to meet tight deadlines. Experience verifying Ethernet and PCIe designs a plus. Experience using/integrating verification IP into existing environments a plus Experience verifying DSP related designs a plus. Qualifications A Bachelors degree in Electrical Engineering or Computer Science . A Master's Degree is preferred. A minimum of 10 years of verification engineering experience are required Additional Information Compensation: Base pay range is $130,000-$165,000 per year, depending on qualifications. SEAKR has very rich medical, dental and vision insurance plans, along with a generous 401(k) retirement plan. In addition to base salary, employees are eligible for a year-end bonus. SEAKR offers a variety of paid leave, such as vacation, sick, bereavement, and FMLA. Remote work is possible, however hybird is strongly preferred. SEAKR is an Equal Opportunity Employer - All your information will be kept confidential according to EEO guidelines. US Citizenship Required Applications will be accepted until 1/30/26

Looking for new challenges? Would you like the variety of a contract position along with long term stability and benefits? Omnicom Production is currently seeking talented Verification Engineers with prior System Verilog UVM experience to work with our major clients worldwide. Opportunities span from projects in AI and Machine Learning, processor fabric subsystems, SOC/ASIC products for vision processing, aerospace FPGAs, medical electronics, RISC-V based SoC, ARM based peripherals, and mixed signal DSPs. Successful candidates for this role will support verification of advanced CPU/GPU based SOCs. Whether you are an experienced veteran looking for new challenges, or a talented engineer seeking to broaden your experience, we can offer exciting options for your career. RESPONSIBILITIES: Verify complex design blocks using equally complex SV/UVM verification environments Develop and execute pre-silicon verification test plans Develop directed and random verification tests to validate block and IP functionality Develop verification components and tools Develop verification functional coverage using industry standard coverage analysis tools/methods Debug regression fails Replicate functional issues found in external environments or post-silicon; review/enhance tests to verify bug fixes REQUIRED SKILLS AND EXPERIENCE: 3 or more years of proven verification experience in a hardware development setting Strong background in System Verilog and UVM verification methodologies Strong debug skills and experience with debug tools such as DVE/Verdi Proficiency in Object Oriented programming, computer architecture and data structures Strong analytical/problem solving skills and pronounced attention to details Strong interpersonal and communication skills Must be comfortable working across geographies DESIRED SKILLS: Experience architecting/developing verification environments and infrastructure, including scripting using Perl, Ruby, Make, or similar Experience in other related domains such as formal verification, RTL design, or software development EDUCATION: Bachelor or Master's in Electrical Engineering, Computer Engineering, or Computer Science

Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Formal Verification to build IP and System On Chip (SoC) for data center applications. As a Formal Verification Engineer, you will be part of a team working with the best in the industry, focused on developing innovative ASIC solutions for Meta's data center applications. You will be developing comprehensive formal testplans and be responsible for complete formal verification sign-off of single or multiple complex blocks. The role also provides ample opportunities to partner and collaborate with full stack software, hardware, ASIC Design, Emulation and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer, Formal Verification Responsibilities: 1. Provide technical leadership in Formal Verification 2. Propose, implement and evangelize the Formal Verification Methodology to be used across the group, both at the top level and at the block level 3. Work with Architecture and Design team to come up with formal specification and implementation 4. Define formal verification scope, create formal environment and close coverage with targeted Formal Verification Techniques at IP, Subsystem and SoC level 5. Build reusable/scalable environments for Formal Verification and deploying the tools 6. Evaluate and recommend EDA solutions for Formal Verification 7. Provide training for internal teams and mentoring engineers related to Formal Verification Technology **Minimum Qualifications:** Minimum Qualifications: 8. Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience 9. 8+ years of experience in Design Verification 10. 5+ years of experience in Formal Verification 11. Experience with Formal Verification applications including Datapath, sequential equivalence, Xprop, Clock Gating, connectivity etc 12. Proven understanding of Formal Verification methodologies, complexity reduction techniques and abstraction techniques 13. Proven analytical skills to craft novel solutions to tackle industry-level complex designs 14. Demonstrated experience with effective collaboration with cross functional teams 15. Fluency in hardware description languages, such as SystemVerilog and SVA 16. Proficiency in scripting languages such as Python, Perl, or Tcl 17. Experience with JasperGold or VC-Formal **Preferred Qualifications:** Preferred Qualifications: 18. Experience to quickly understand and interpret specifications and extract design behaviors/properties 19. Experience in formal property verification of complex compute blocks such as DSP, CPU, GPU or HW accelerators 20. Experience with complex SoCs 21. Formal verification experience in clock domain crossing, IP-XACT based register verification and low power 22. Experience with development of fully automated flows from specification to fully verified designs 23. Experience with simulators and waveform debugging tools **Public Compensation:** $178,000/year to $250,000/year + bonus + equity + benefits **Industry:** Internet **Equal Opportunity:** Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment. Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@fb.com.

A Day in Your Life at MKS: As a Principal Firmware Engineer at MKS's Indirect Pressure Measurement Group, you'll be a key member of a talented cross-functional team, developing firmware that enables technologies that transform the world. In this role, you will report to the Senior Engineering Manager. You Will Make an Impact By: * Analyzes, designs, programs, debugs and modifies software * Troubleshoots code for firmware (IC embedded code) applications * Work often involves analog and digital hardware and software operating systems * Position requires knowledge and exposure to hardware design * Typically, programs in machine language, assembly language and high-level languages (eg, C, C++) * Defining architectural design, implementation, verification and validation of firmware for embedded metrology products supporting semiconductor manufacturing and other advanced markets * Supporting the development and diagnostics of the hardware surrounding the processor * Working collaboratively with other software engineers and engineers/scientists of other disciplines to solve challenging problems. Skills You Bring: * Requires a Bachelor of Science in Engineering degree and 8+ years of related experience * At this level, graduate coursework may be preferred * Experience in the development of embedded system architecture and algorithms. * Fluency with the C and C++ programming languages * Experience with using emulators, communication bus monitoring hardware/software, oscilloscopes, and similar tools to develop and debug products. Preferred Skills: * Experience with EtherCat or comparable field buses. * Experience with Python or FreeRTOS. * Experience with the STM32 family of processors Physical Demands and Working Conditions: * Must be able to remain in a stationary position for 50% of the time * Constantly operates a computer and other office productivity machinery * This job operates in a professional office environment This position is onsite and must be within commutable distance to our location in Broomfield, CO. Relocation benefits are not available for this position. We are interested in a qualified candidates eligible to work in the United States and will not be sponsoring work visas for this position, at this time. MKS is an equal opportunity employer, including disability, veteran status and all categories protected by law. Please review our EOE statements for additional details. MKS is generally only hiring candidates who reside in states where we are registered to do business. Compensation and Benefits: * Salary Pay Range: $100,000 - $186,000 per year. This range is a good faith estimate of the expected salary range for this position, based on a wide range of factors including qualifications, experience and training, operational and business needs and other considerations permitted by law. * Bonus: This position is eligible for a discretionary annual bonus, in an amount to be determined by MKS [or as applicable]. * Benefits: MKS offers a comprehensive benefits package, including health insurance coverage (medical, dental and vision), 401(k) with company match, life and disability insurance, 12 paid holidays, sick time, 15 paid vacation days, [6 weeks fully paid] parental leave, adoption assistance and tuition reimbursement [and for participation in any stock programs, signing bonus, etc. #LI-MH1 Globally, our policy is to recruit individuals from wide and diverse backgrounds. However, certain positions require access to controlled goods and technologies subject to the International Traffic in Arms Regulations (ITAR) or Export Administration Regulations (EAR). Applicants for these positions may need to be "U.S. persons." "U.S. persons" are generally defined as U.S. citizens, noncitizen nationals, lawful permanent residents (or, green card holders), individuals granted asylum, and individuals admitted as refugees. MKS Inc. and its affiliates and subsidiaries ("MKS") is an affirmative action and equal opportunity employer: diverse candidates are encouraged to apply. We win as a team and are committed to recruiting and hiring qualified applicants regardless of race, color, national origin, sex (including pregnancy and pregnancy-related conditions), religion, age, ancestry, physical or mental disability or handicap, marital status, membership in the uniformed services, veteran status, sexual orientation, gender identity or expression, genetic information, or any other category protected by applicable law. Hiring decisions are based on merit, qualifications and business needs. We conduct background checks and drug screens, in accordance with applicable law and company policies. MKS is generally only hiring candidates who reside in states where we are registered to do business. MKS is committed to working with and providing reasonable accommodations to qualified individuals with disabilities. If you need a reasonable accommodation during the application or interview process due to a disability, please contact us at: accommodationsat *************** . If applying for a specific job, please include the requisition number (ex: RXXXX), the title and location of the role

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: AMD's Cores Organization delivers industry leading CPU's and caches that are the foundation of AMD's server, client, and gaming business. We are looking for a cache verification engineer to join this innovative team as a technical contributor. They will build their expertise as they help the team deliver cutting-edge designs in a dynamic environment. The candidate will join the team based in Fort Collins, CO. THE PERSON: The candidate should have strong analytical thinking and problem-solving skills with excellent attention to details. We work on programs with long timelines, so self-motivation and a commitment to meeting deadlines is required. We are pushing the envelope on chip performance, so the status quo must be challenged on every program. This requires creativity and innovation, but also excellent verbal and written communication skills. We work in small teams, but we are part of a large cross-site Core's organization, so teamwork is also vital our success. KEY RESPONSIBILITIES: * Perform functional verification of high-speed Microprocessor designs, including development of infrastructure, directed and random test suites at behavioral RTL and gate design levels across SoC, Core and block hierarchies. * Develop environments, infrastructure, and test plans to accommodate both full chip and stand-alone block-level verification and debug capabilities using simulation tools, debug tools and programming skills, based on in-depth understanding of the architecture and HDL/logical design of the microprocessor. * Work with RTL design team to define verification strategy for our CPU cores, caches, and system interfaces * Participate in development of formal verification techniques. * Measure and analyze coverage terms, address exposed weaknesses to meet design/project quality objectives. PREFERRED EXPERIENCE: * Programming proficiency in x86 assembly, C/C++, and Ruby languages or similar. * Understanding of modern computer architecture, especially cache design and out of order execution * Experience with Verilog HDL and System Verilog. * Knowledge of verification techniques of microprocessors/ASIC designs ACADEMIC CREDENTIALS: * BS/MS in EE, CS, CSE (or similar LOCATION: Fort Collins, Colorado, USA This role is not eligible for visa sponsorship. #LI-MR1 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here. This posting is for an existing vacancy.

Analog/Mixed-Signal Verification Engineer focusing on high-performance analog-to-digital and digital-to-analog converters. Job responsibilities include the verification of analog and mixed-signal designs for high performance data converters, behavioral modeling, and customer support.Qualifications 2+ years of experience in high-performance analog or mixed-signal IC development and verification in advanced CMOS processes Familiarity with high-speed, high-resolution analog-to-digital (ADC) or digital-to-analog (DAC) data converter design and building block circuits such as bandgap reference, op-amp, comparators, oscillators, DLL, PLL etc. Strong intuitive and analytical understanding of transistor-level circuit design including noise and mismatch analysis Experience with analog and digital behavioral modeling and familiarity with behavioral Verilog / Verilog-A code, including wreals Familiar with Cadence schematic capture, virtuoso, Spectre and/or HSPICE circuit simulation tools Must be familiar with layout parasitic extraction tools and layout dependent impairments in advanced CMOS processes Must be able to work independently, create and adhere to schedules Must possess strong written and verbal communication skills with an ability to work with teams spread across geographic locations Should be able to seek help proactively We are looking for trailblazers ... We strongly believe that the pace of the ongoing hardware revolution will be greatly accelerated by Omni Design's IP cores and the rapidly emerging semiconductor embedded design business ecosystem. At Omni Design, we have created an exciting environment with amazing talent across multiple disciplines. We like self-motivated individuals, we encourage initiative, we look for leadership qualities, we value teamwork, we like diversity, and we reward excellence. We are looking for trailblazers to bring Omni Design's vision to fruition. If you are interested in making an impact as part of a young, fast growing, cutting edge technology company, please reach out to us. Omni Design is an equal opportunity employer. We offer excellent compensation. We seek individuals that share our high standards and commitment to excellence.

**About the Role:** We are looking for a talented, curious, and highly motivated Staff Conversational AI Designer to join our Voice & Sound team. The ideal candidate will breathe design and have deep expertise in Voice and Multimodal interfaces. You will join a team of experts working on end-to-end multimodal customer experiences, driving innovation in the rapidly evolving and expanding high-tech world of AI through user-centric practices and design. In this role, you will lead with vision and collaborate with other designers, researchers, technologists, and product stakeholders to craft effective and exceptional experiences through data-driven design. **Responsibilities:** + Lead design vision and execution for AI-based conversational and multimodal experiences, advocating usability and user-centered design principles. + Develop and promote conversation design best practice standards, reusable interactional patterns, and processes. + Deliver effective design documentation to communicate experience requirements, design principles, best practices, prototypes, and multimodal flows to convey voice forward interactions that leverage AI. + Identify opportunities for usability testing and research efforts by leading and supporting the creation of prototypes, participating in clinic sessions, analyzing, brainstorming, ideating etc. + Build strong relationships with internal stakeholders to understand priorities, collaborate on actions to implement product and service solutions, and ensure a connected end-to-end user experience. + Identify, track, and monitor industry/experience trends and drivers of customer needs and satisfaction. + Lead visualization of experiences using storyboards, customer journeys, user flows, low-fidelity wireframes and voice prototypes to illustrate vision and influence impactful experiences in AI + Balance user needs, technical constraints, and product objectives to solve problems effectively, crafting world-class multimodal user experiences. **Requirements:** + 9 + years creating conversational design experiences. + Ability to combine vision with strong creative design execution. + Strong portfolio with work samples showcasing expertise, craft, aesthetics, and depth of thought. + Experience designing for Generative or Agentive AI-powered experiences + Understanding of machine learning & natural language processing (NLP) fundamentals. + Experience incorporating research into the design process. + Subjet-matter expert. Ability to work independently, be organized, self-motivated, and have attention to detail. + Excellent written, visual, and verbal communication skills. + Proficient in common design tools (e.g.Figma, VoiceFlow, ProtoPie, etc). + Demonstrated experience documenting for **voice-only, voice-forward, and multi-modal** experiences + **Demonstrated experience** **creating interactive** prototypes formultimodal experiences (voice, sound, visuals, touch, chat, etc) **Preferred** **Qualifications:** + Deep understanding of Generative AI for Conversational Experiences, foundational elements of Conversation Design, and LLMs. + Ability to communicate technical concepts to a non-technical audience (verbal and written). + Ability to work effectively within an environment that leverages robust design systems and libraries, while seeking to delight and impress users with innovative concepts and experiences. **About GM** Our vision is a world with Zero Crashes, Zero Emissions and Zero Congestion and we embrace the responsibility to lead the change that will make our world better, safer and more equitable for all. **Why Join Us** We believe we all must make a choice every day - individually and collectively - to drive meaningful change through our words, our deeds and our culture. Every day, we want every employee to feel they belong to one General Motors team. **Benefits Overview** From day one, we're looking out for your well-being-at work and at home-so you can focus on realizing your ambitions. Learn how GM supports a rewarding career that rewards you personally by visiting Total Rewards resources (************************************************************* . **Non-Discrimination and Equal Employment Opportunities (U.S.)** General Motors is committed to being a workplace that is not only free of unlawful discrimination, but one that genuinely fosters inclusion and belonging. We strongly believe that providing an inclusive workplace creates an environment in which our employees can thrive and develop better products for our customers. All employment decisions are made on a non-discriminatory basis without regard to sex, race, color, national origin, citizenship status, religion, age, disability, pregnancy or maternity status, sexual orientation, gender identity, status as a veteran or protected veteran, or any other similarly protected status in accordance with federal, state and local laws. We encourage interested candidates to review the key responsibilities and qualifications for each role and apply for any positions that match their skills and capabilities. Applicants in the recruitment process may be required, where applicable, to successfully complete a role-related assessment(s) and/or a pre-employment screening prior to beginning employment. To learn more, visit How we Hire (********************************************* . **Accommodations** General Motors offers opportunities to all job seekers including individuals with disabilities. If you need a reasonable accommodation to assist with your job search or application for employment, email (Careers.Accommodations@GM.com) us or call us at ************. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying. We are leading the change to make our world better, safer and more equitable for all through our actions and how we behave. Learn more about: **Our Company (************************************************** **Our Culture** **How we hire (************************************************ Our diverse team of employees bring their collective passion for engineering, technology and design to deliver on our vision of a world with Zero Crashes, Zero Emissions and Zero Congestion. We are looking for adventure-seekers and imaginative thought leaders to help us transform mobility. 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Job Description Please Note: To conform with the United States Government Space Technology Export Regulations, the applicant must be a U.S. citizen, lawful permanent resident of the U.S., conditional resident, asylee or refugee (protected individuals as defined by 8 U.S.C. 1324b(a)(3)), or eligible to obtain the required authorizations from the U.S. Department of State. At CesiumAstro, we are developers and pioneers of out-of-the-box communication systems for satellites, UAVs, launch vehicles, and other space and airborne platforms. We take pride in our dynamic and cross-functional work environment, which allows us to learn, develop, and engage across our organization. If you are looking for hands-on, interactive, and autonomous work, CesiumAstro is the place for you. We are actively seeking passionate, collaborative, energetic, and forward-thinking individuals to join our team. We are looking to add a Verification Engineer II to our team. If you enjoy working in a startup environment and are passionate about developing leading-edge phased arrays for satellites, spacecraft, and aerospace systems, we would like to hear from you.JOB DUTIES AND RESPONSIBILITIES Contribute to the evaluation and technical implementation of FPGA and digital design simulation, verification and emulation infrastructure. Contribute to the development, maintenance and phased deployment of continuous integration and regression testing infrastructure. Develop state-of-the-art UVMf-based top-level and module-level testbenches using block-to-top best practices for reusability, including both control and data plane stimulation using VIP & System Verilog DPI-C integration with existing MATLAB and Python numerical models. Lead the development of reusable custom VIP modules. Work closely with the engineering and senior leadership teams to train and mentor engineers at all experience levels on UVMf testbench usage and modern approaches to FPGA/digital design. Work with the modeling and scientific staff to implement DPI-C dataplane verification interfaces into existing MATLAB and Python models. Aid the Lead Verification Engineer in evaluating current processes regarding FPGA and digital design with a focus on Xilinx TLM models and QEMU-RP integration. Work closely with vendors to define requirements of future simulation model deliverables. Maintain up-to-date knowledge of industry best-practices regarding FPGA and digital design methodologies. Work closely with the engineering leadership team to evaluate and non-disruptively implement process improvements. JOB REQUIREMENTS AND MINIMUM QUALIFICATIONS A Bachelor of Science (BS) or Master of Science (MS) degree in Computer Science, Electrical Engineering, or Computer Engineering. Minimum of 2 years of industry experience in verification and automation. Knowledge of FPGA digital design verification techniques including VHDL, Verilog, SystemVerilog, C/C++, SystemC, UVM/UVMf, DPI-C, TLM, Formal CDC and functional analysis, QEMU and VIP. Understanding of digital design automation infrastructure, including CI, regression testing and HIL testing. Competency with Linux. Knowledge of vendor-provided FPGA development tools with a focus on Xilinx tools. CesiumAstro considers several factors when extending an offer, including but not limited to, the role and associated responsibilities, a candidate's work experience, education/training, and key skills. Full-time employment offers include company stock options and a generous benefits package including health, dental, vision, HSA, FSA, life, disability and retirement plans. CesiumAstro is an Equal Opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, disability, protected Veteran Status, or any other characteristic protected by applicable federal, state, or local law. Please note: CesiumAstro does not accept unsolicited resumes from contract agencies or search firms. Any unsolicited resumes submitted to our website or to CesiumAstro team members will be considered property of CesiumAstro, and we will not be obligated to pay any referral fees. We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses. These tools assist our recruitment team but do not replace human judgment. Final hiring decisions are ultimately made by humans. If you would like more information about how your data is processed, please contact us.

Responsibilities: • Analyze and understand existing Python code for electromagnetic field computations. • Translate Python code into efficient, high-performance C++ code for embedded systems. • Implement and optimize mathematical and computational algorithms to enhance performance, focusing on manipulating and analyzing data in multidimensional spaces. • Collaborate with cross-functional teams to ensure the accuracy and efficiency of the code conversion. • Optimize computation to achieve real-time processing performance on embedded platforms. • Document code and processes to facilitate future maintenance and updates. Skillsets: • 7+ years of experience and working at a Senior or Principal level • Proficiency in designing, implementing, and optimizing Digital Signal Processing algorithms and with embedded systems design. • Experience optimizing algorithms for embedded targets that are memory and CPU resource constrained with optimizing computations for real-time processing. • Experience with DSP hardware and software tools and strong debugging and troubleshooting skills with target tools and environments. • Experience with real-time operating systems (RTOS) requirements • Experience with working with C++ mathematical libraries and tools that use linear algebra: matrices, vectors, numerical solvers, and geometric transformations • Familiarity with microcontrollers, DSP processors, and interfacing to FPGA. • Experience in agile development methodologies • Languages: C++, Python, MATLAB • Familiarity with mathematical and scientific simulations software tools like MATLAB, Eigen, Boost • Experience working with Git Qualifications: • Minimum M.S. in Electrical Engineering, Computer Engineering, or Computer Science, Mathematics, or a related field. • Proven experience in C++ development with a strong understanding of Python. • Experience in embedded systems programming and development. • Familiarity with Python libraries used for scientific computations (e.g., NumPy, SciPy). • Experience with optimizing computations for real-time processing is highly desirable. Preferred Qualifications: • Background in physics or electrical engineering with a focus on electromagnetic fields. • Knowledge of electromagnetic field computations and related mathematical concepts, and experience with complex number handling. • Experience in using mathematical libraries and tools, particularly in the context of linear algebra, geometric transformations, and optimization techniques such as iterative algorithms. • Experience with software development lifecycle (SDLC) in regulated environment • Experience working with GitHub, Bitbucket, Jira, Confluence

Job Description We are seeking a highly skilled and innovative Principal Systems Engineer to join our cutting-edge New Aircraft Design Program team. This role is pivotal in shaping the future of military aviation by leading the design and development of next-generation aircraft. The ideal candidate will possess a deep understanding of aerospace engineering principles, extensive experience in aircraft design, and a passion for pushing the boundaries of technology to achieve optimal performance, safety, and efficiency. As a Senior Design Engineer, you will play a key role in the conceptualization, development, and refinement of advanced aircraft systems and structures. You will collaborate with multidisciplinary teams, including aerodynamics, propulsion, avionics, materials, and manufacturing, to ensure the successful execution of the program from concept to production. As an aerospace engineer, you will research, design, develop, test, certify, deploy and improve cutting edge products and services fot the UJTS program. These cover a very wide range from advanced mission payloads and electronic systems through highly integrated aircraft to orbital and space exploration systems. You'll develop complex aerodynamic components, structures, and systems. Your technical duties involve the design and development, analysis, and test of new products and processes throughout the product lifecycle. Working Conditions: Rarely exposed to outdoor elements (high/low temperatures, sun, rain/snow, etc.) Rarely exposed to fumes or hazardous chemicals/materials. Rarely exposed to loud noises Skills: Must-haves: Demonstrated knowledge of engineering principles and practices Progressive experience working in multi-disciplinary design and development teams Advanced understanding of requirements management, functional requirements parsing, derivation, and allocation; systems design, systems integration, technical risk identification and management strategies, and Verification and Validation (V&V) principles Preferred: Experience with requirements management and system modelling tools, such as DOORS, Rhapsody, NoMagic, MATLAB Advanced Knowledge of industry-standard mechanical design principles, to include, but not limited to requirements management, Model Based System Engineering (MBSE) Experience or certification in INCOSE standards Background in the Aerospace and Defense Industry Progressive experience leading baseline definition and maturation in a complex development setting, including the use of high impact trade studies and other measures Ability to establish and track key Technical Performance Measurements (TPM) Education: Must-haves: Bachelor's of Science degree in System Engineering or related discipline and typically 14 or more years of relevant experience

Waypoint's client is seeking a Senior Model-Based Systems Engineer (MBSE) to join their team. In this role, you will provide senior technical and advisory assistance to the Director of Modeling and Simulation (M&S) Enterprise Engineering, who is responsible for chairing design reviews, establishing architecture and design standards, managing Enterprise Integrated Product Teams (IPTs), and synchronizing M&S across the Agency. Responsibilities Perform and lead systems engineering duties to elicit stakeholder requirements and mission needs. Define requirements and perform functional analysis using Model-Based Systems Engineering (MBSE) techniques and tools. Draft and review technical documents and support technical reviews. Facilitate M&S and digital engineering transformation initiatives. Represent Enterprise Engineering in agency tiger teams and working groups. Required: Master's degree in a STEM field with 12+ years of related professional experience. Active Secret clearance. Proven experience leading MBSE activities and projects for complex systems, preferably DoD weapon systems. Extensive expertise in MBSE and Systems Modeling Language (SysML). Knowledge of architecture modeling languages such as DoD Architecture Framework (DoDAF) and Unified Architecture Framework (UAF). Mastery of MBSE tools such as IBM Rhapsody and Cameo, and integrated requirements tools such as DOORS NG. Strong ability to communicate complex technical ideas to non-technical and non-MBSE audiences. Experience applying MBSE processes such as IBM Harmony. Desired: Doctorate in a related STEM field. MBSE certifications or training (e.g., OMG, INCOSE). Ballistic Missile Defense System (MDS) domain experience within the Missile Defense Agency (MDA). Experience in definition, design, development, verification, validation, and analysis of MDS modeling and simulation (ground test, constructive, or distributed virtual simulation of MDS and its elements/components). Hands-on experience in analysis, test, and systems engineering of M&S for one or more MDS elements (e.g., Patriot, THAAD, GMD, Sensors, C2). Familiarity with MDA test events and activities supported by M&S products and services. Ability to collaborate with geographically diverse engineering teams with varied perspectives and skill sets. Energetic, motivated, and self-starting approach to problem-solving. *Waypoint Human Capital is an Equal Opportunity/Affirmative Action Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, pregnancy, sexual orientation, gender, national origin, age, protected veteran status, or disability status.

Our client's mission is to accelerate the abundance of energy and intelligence. They are crafting the engine that powers a world where people can create ambitiously with AI - without sacrificing scale, speed, or sustainability. This is your chance to be part of the AI revolution with sustainable technology. In this role, you'll drive meaningful innovation, make a tangible impact, and join a team that's setting the pace for responsible, transformative cloud infrastructure. About the Role: The BMS (Building Management System) / EPMS (Electrical Power Management System) Controls Engineer will lead the design, implementation, and management of critical control systems for next-generation data centers and infrastructure. You'll own the full lifecycle of these systems - from design through installation, optimization, and maintenance - ensuring reliable, efficient operations at scale. This role requires a deep understanding of control systems, energy optimization, and data-driven decision making, with the ability to deliver scalable, sustainable solutions. What You'll Be Working On Lead design and development of BMS/EPMS controls for data center design, commissioning, and operations Integrate controls across HVAC, electrical, and monitoring systems Collaborate with engineers, contractors, and vendors to define scope, manage deliverables, and drive successful installations Optimize BMS operations for energy efficiency and reliability Perform audits, identify performance gaps, and implement improvements Leverage system data for insights, reporting, and efficiency strategies Mentor and lead a team of engineers and technicians; create training programs to upskill the team Ensure compliance with industry standards, safety regulations, and sustainability goals Integrate renewable energy and energy-saving measures into BMS strategy What You'll Bring Experience in a hyperscale data center environment Bachelor's degree in Mechanical, Electrical, or Controls Engineering (Master's or certifications such as CEM, LEED, BAS Technician are a plus) Significant experience in BMS/EPMS, controls engineering, or critical infrastructure systems, including 3+ years in a leadership role Strong background in HVAC, electrical systems, PLCs, DDCs, and industrial controls Proficiency with platforms like Schneider Electric, Siemens, Honeywell, Tridium Niagara, or Ignition Familiarity with protocols such as BACnet, Modbus, OPC-UA, MQTT, LonWorks Demonstrated success leading technical teams and cross-functional collaboration Excellent communication skills for both technical and non-technical stakeholders Proven problem-solving skills with innovative approaches to complex challenges Passion for using data to optimize performance and efficiency Why This Role This is not just another construction management role. It's a chance to lead highly visible, mission-critical projects that will power the next generation of artificial intelligence. You'll be part of a leadership team pioneering sustainable, large-scale infrastructure with long-term impact. 🔒 This role is being managed exclusively by NuPeople. All inquiries will remain strictly confidential.

Join SEAKR Engineering, a leading-edge provider of advanced electronics for space applications. Pushing the boundaries of technology on a mission to change the world for the better from space. Job Description SEAKR is currently seeking a Verification Engineer who is responsible for developing verification and simulation strategies, conducting design reviews, creating a digital test plan and providing coverage metrics. The Engineer is responsible for the construction and maintenance of simulation environments using System Verilog with UVM (Universal Verification Methodology), and performing and evaluating regression tests for a design under test. The candidate must be able to extract and derive test requirements and sequences for an interface or interfaces based on available design documentation and requirements. Ability to architect and construct full test environments for complex devices using UVM, including coverage, is required. The candidate shall be capable of diagnosing sophisticated test failures and filing results, and be capable of analyzing code coverage to adjust agent sequence behavior. Ability to provide direction to less senior verification engineers is required. Ability to lead a team of verification engineers to fully verify a device is required. Ability to use simulation tools such as Mentor Graphics Modelsim/Questasim for simulation debug and reporting is required. Ability to analyze Verilog RTL to diagnose test failures is required. Ability to analyze VHDL is a plus. Must be able to work effectively under pressure to meet tight deadlines. Experience verifying Ethernet and PCIe designs a plus. Experience using/integrating verification IP into existing environments a plus Experience verifying DSP related designs a plus. Qualifications A Bachelors degree in Electrical Engineering or Computer Science . A Master's Degree is preferred. A minimum of 10 years of verification engineering experience are required Additional Information Compensation: Base pay range is $130,000-$165,000 per year, depending on qualifications. SEAKR has very rich medical, dental and vision insurance plans, along with a generous 401(k) retirement plan. In addition to base salary, employees are eligible for a year-end bonus. SEAKR offers a variety of paid leave, such as vacation, sick, bereavement, and FMLA. Remote work is possible, however hybird is strongly preferred. SEAKR is an Equal Opportunity Employer - All your information will be kept confidential according to EEO guidelines. US Citizenship Required Applications will be accepted until 1/30/26

A Day in Your Life at MKS: As a Principal Firmware Engineer at MKS's Indirect Pressure Measurement Group, you'll be a key member of a talented cross-functional team, developing firmware that enables technologies that transform the world. In this role, you will report to the Senior Engineering Manager. You Will Make an Impact By: Analyzes, designs, programs, debugs and modifies software Troubleshoots code for firmware (IC embedded code) applications Work often involves analog and digital hardware and software operating systems Position requires knowledge and exposure to hardware design Typically, programs in machine language, assembly language and high-level languages (eg, C, C++) Defining architectural design, implementation, verification and validation of firmware for embedded metrology products supporting semiconductor manufacturing and other advanced markets Supporting the development and diagnostics of the hardware surrounding the processor Working collaboratively with other software engineers and engineers/scientists of other disciplines to solve challenging problems. Skills You Bring: Requires a Bachelor of Science in Engineering degree and 8+ years of related experience At this level, graduate coursework may be preferred Experience in the development of embedded system architecture and algorithms. Fluency with the C and C++ programming languages Experience with using emulators, communication bus monitoring hardware/software, oscilloscopes, and similar tools to develop and debug products. Preferred Skills: Experience with EtherCat or comparable field buses. Experience with Python or FreeRTOS. Experience with the STM32 family of processors Physical Demands and Working Conditions: Must be able to remain in a stationary position for 50% of the time Constantly operates a computer and other office productivity machinery This job operates in a professional office environment This position is onsite and must be within commutable distance to our location in Broomfield, CO. Relocation benefits are not available for this position. We are interested in a qualified candidates eligible to work in the United States and will not be sponsoring work visas for this position, at this time. MKS is an equal opportunity employer, including disability, veteran status and all categories protected by law. Please review our EOE statements for additional details. MKS is generally only hiring candidates who reside in states where we are registered to do business. Compensation and Benefits: Salary Pay Range: $100,000 - $186,000 per year. This range is a good faith estimate of the expected salary range for this position, based on a wide range of factors including qualifications, experience and training, operational and business needs and other considerations permitted by law. Bonus: This position is eligible for a discretionary annual bonus, in an amount to be determined by MKS [or as applicable]. Benefits: MKS offers a comprehensive benefits package, including health insurance coverage (medical, dental and vision), 401(k) with company match, life and disability insurance, 12 paid holidays, sick time, 15 paid vacation days, [6 weeks fully paid] parental leave, adoption assistance and tuition reimbursement [and for participation in any stock programs, signing bonus, etc. #LI-MH1 Globally, our policy is to recruit individuals from wide and diverse backgrounds. However, certain positions require access to controlled goods and technologies subject to the International Traffic in Arms Regulations (ITAR) or Export Administration Regulations (EAR). Applicants for these positions may need to be “U.S. persons.” “U.S. persons” are generally defined as U.S. citizens, noncitizen nationals, lawful permanent residents (or, green card holders), individuals granted asylum, and individuals admitted as refugees. MKS Inc. and its affiliates and subsidiaries (“MKS”) is an affirmative action and equal opportunity employer: diverse candidates are encouraged to apply. We win as a team and are committed to recruiting and hiring qualified applicants regardless of race, color, national origin, sex (including pregnancy and pregnancy-related conditions), religion, age, ancestry, physical or mental disability or handicap, marital status, membership in the uniformed services, veteran status, sexual orientation, gender identity or expression, genetic information, or any other category protected by applicable law. Hiring decisions are based on merit, qualifications and business needs. We conduct background checks and drug screens, in accordance with applicable law and company policies. MKS is generally only hiring candidates who reside in states where we are registered to do business. MKS is committed to working with and providing reasonable accommodations to qualified individuals with disabilities. If you need a reasonable accommodation during the application or interview process due to a disability, please contact us at: accommodationsat *************** . If applying for a specific job, please include the requisition number (ex: RXXXX), the title and location of the role

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: You will utilize your technical expertise to assist in the verification of AMD's next-generation CPU microprocessors. You will maintain and enhance existing verification test benches to test cache functionality, including DFT features such as MBIST. You will work on related projects and/or assignments as needed, to meet team goals; you will write and execute detailed test plans; you will develop high-quality and efficient solutions, while collaborating effectively with cross-functional teams; you will interface with architects and RTL designers. Great opportunity to be involved in all phases of the project from specification to working with silicon validation teams. THE PERSON: A successful person in this role would possess good written and communication skills and would be able to work in a collaborative team environment working with architects, RTL designers, physical-design, and silicon validation teams. At this level, you would need to demonstrate ownership, initiative, and the ability to influence technical outcomes with excellent time management skills. KEY RESPONSIBILITIES: * Perform Functional and Design for Test feature verification of high-speed Microprocessor designs, including development of infrastructure, directed and random test suites at behavioral RTL and gate design levels across SoC, Core and block hierarchies. * Develop environments, infrastructure, and test plans to accommodate both full chip and stand-alone block-level verification and debug capabilities using simulation tools, debug tools and programming skills, based on in-depth understanding of the architecture and HDL/logical design of the microprocessor. * Participate in development of formal verification techniques. * Develop an automated regression infrastructure setup for functional verification of highspeed microprocessor designs. * Collaborate with a dedicated team of engineers to define and verify DFT microarchitecture for AMD CPUs. * Work with product test teams during test bring up phase of the product. * Based on thorough understanding of the design architecture, develop, run and debug x86 assembly based directed tests and random exercisers to validate functionality and testability operation of the microprocessor design leveraging C/C++/Perl/assembly programming, logic design and simulation skill set. * Resolve all simulation discrepancies and assertion responses for both behavioral and gate level logic models. * Measure and analyze coverage terms, address exposed weaknesses to meet design/project quality objectives. * Develop infrastructure for pattern generation used in post silicon device validation and characterization. * When presented with post-silicon issues, replicate design responses using presilicon infrastructure and provide debug expertise to ensure complete validation and characterization success. * Coordinate with cross-functional teams to meet project deliverables and manage dependencies with cross-discipline/site RTL, DFT and Implementation design teams along with product manufacturing teams. PREFERRED EXPERIENCE: * Prior experience with verification techniques of microprocessors/ASIC designs. * Demonstrated expertise with Verilog HDL. * Proven programming proficiency in x86 assembly, C/C++ and Perl, and Ruby languages along with strong logic simulation competence. * Demonstrated solid understanding of modern computer architecture including thorough DFT feature knowledge with JTAG -1149.x, Memory, Logic and I/O Built-In-Self-Test(BIST) and Scan design(LSSD/MuxD) structures and protocol. * Familiarity with CMOS transistor design and deep sub-micron logic and memory fault models, including fault simulation techniques. * Strong understanding of DFT concepts in areas of MBIST (Memory Built In Self Test) and other related DFT techniques for memory arrays. * Prior knowledge of formal verification tools and techniques a plus EDUCATION: BS, MS, or PhD in EE/CE preferred LOCATION: Fort Collins, Colorado #LI-MR1 #LI-Hybrid Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here. This posting is for an existing vacancy.

Job DescriptionAnalog/Mixed-Signal Verification Engineer focusing on high-performance analog-to-digital and digital-to-analog converters. Job responsibilities include the verification of analog and mixed-signal designs for high performance data converters, behavioral modeling, and customer support.Qualifications 2+ years of experience in high-performance analog or mixed-signal IC development and verification in advanced CMOS processes Familiarity with high-speed, high-resolution analog-to-digital (ADC) or digital-to-analog (DAC) data converter design and building block circuits such as bandgap reference, op-amp, comparators, oscillators, DLL, PLL etc. Strong intuitive and analytical understanding of transistor-level circuit design including noise and mismatch analysis Experience with analog and digital behavioral modeling and familiarity with behavioral Verilog / Verilog-A code, including wreals Familiar with Cadence schematic capture, virtuoso, Spectre and/or HSPICE circuit simulation tools Must be familiar with layout parasitic extraction tools and layout dependent impairments in advanced CMOS processes Must be able to work independently, create and adhere to schedules Must possess strong written and verbal communication skills with an ability to work with teams spread across geographic locations Should be able to seek help proactively We are looking for trailblazers ... We strongly believe that the pace of the ongoing hardware revolution will be greatly accelerated by Omni Design's IP cores and the rapidly emerging semiconductor embedded design business ecosystem. At Omni Design, we have created an exciting environment with amazing talent across multiple disciplines. We like self-motivated individuals, we encourage initiative, we look for leadership qualities, we value teamwork, we like diversity, and we reward excellence. We are looking for trailblazers to bring Omni Design's vision to fruition. If you are interested in making an impact as part of a young, fast growing, cutting edge technology company, please reach out to us. Omni Design is an equal opportunity employer. We offer excellent compensation. We seek individuals that share our high standards and commitment to excellence. We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses. These tools assist our recruitment team but do not replace human judgment. Final hiring decisions are ultimately made by humans. If you would like more information about how your data is processed, please contact us.

Please Note: To conform with the United States Government Space Technology Export Regulations, the applicant must be a U.S. citizen, lawful permanent resident of the U.S., conditional resident, asylee or refugee (protected individuals as defined by 8 U.S.C. 1324b(a)(3)), or eligible to obtain the required authorizations from the U.S. Department of State. At CesiumAstro, we are developers and pioneers of out-of-the-box communication systems for satellites, UAVs, launch vehicles, and other space and airborne platforms. We take pride in our dynamic and cross-functional work environment, which allows us to learn, develop, and engage across our organization. If you are looking for hands-on, interactive, and autonomous work, CesiumAstro is the place for you. We are actively seeking passionate, collaborative, energetic, and forward-thinking individuals to join our team. We are looking to add a Verification Engineer II to our team. If you enjoy working in a startup environment and are passionate about developing leading-edge phased arrays for satellites, spacecraft, and aerospace systems, we would like to hear from you.JOB DUTIES AND RESPONSIBILITIES Contribute to the evaluation and technical implementation of FPGA and digital design simulation, verification and emulation infrastructure. Contribute to the development, maintenance and phased deployment of continuous integration and regression testing infrastructure. Develop state-of-the-art UVMf-based top-level and module-level testbenches using block-to-top best practices for reusability, including both control and data plane stimulation using VIP & System Verilog DPI-C integration with existing MATLAB and Python numerical models. Lead the development of reusable custom VIP modules. Work closely with the engineering and senior leadership teams to train and mentor engineers at all experience levels on UVMf testbench usage and modern approaches to FPGA/digital design. Work with the modeling and scientific staff to implement DPI-C dataplane verification interfaces into existing MATLAB and Python models. Aid the Lead Verification Engineer in evaluating current processes regarding FPGA and digital design with a focus on Xilinx TLM models and QEMU-RP integration. Work closely with vendors to define requirements of future simulation model deliverables. Maintain up-to-date knowledge of industry best-practices regarding FPGA and digital design methodologies. Work closely with the engineering leadership team to evaluate and non-disruptively implement process improvements. JOB REQUIREMENTS AND MINIMUM QUALIFICATIONS A Bachelor of Science (BS) or Master of Science (MS) degree in Computer Science, Electrical Engineering, or Computer Engineering. Minimum of 2 years of industry experience in verification and automation. Knowledge of FPGA digital design verification techniques including VHDL, Verilog, SystemVerilog, C/C++, SystemC, UVM/UVMf, DPI-C, TLM, Formal CDC and functional analysis, QEMU and VIP. Understanding of digital design automation infrastructure, including CI, regression testing and HIL testing. Competency with Linux. Knowledge of vendor-provided FPGA development tools with a focus on Xilinx tools. $94,000 - $121,000 a year CesiumAstro considers several factors when extending an offer, including but not limited to, the role and associated responsibilities, a candidate's work experience, education/training, and key skills. Full-time employment offers include company stock options and a generous benefits package including health, dental, vision, HSA, FSA, life, disability and retirement plans. CesiumAstro is an Equal Opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, disability, protected Veteran Status, or any other characteristic protected by applicable federal, state, or local law. Please note: CesiumAstro does not accept unsolicited resumes from contract agencies or search firms. Any unsolicited resumes submitted to our website or to CesiumAstro team members will be considered property of CesiumAstro, and we will not be obligated to pay any referral fees. We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses. These tools assist our recruitment team but do not replace human judgment. Final hiring decisions are ultimately made by humans. If you would like more information about how your data is processed, please contact us.

Job Description Responsibilities: • Analyze and understand existing Python code for electromagnetic field computations. • Translate Python code into efficient, high-performance C++ code for embedded systems. • Implement and optimize mathematical and computational algorithms to enhance performance, focusing on manipulating and analyzing data in multidimensional spaces. • Collaborate with cross-functional teams to ensure the accuracy and efficiency of the code conversion. • Optimize computation to achieve real-time processing performance on embedded platforms. • Document code and processes to facilitate future maintenance and updates. Skillsets: • 7+ years of experience and working at a Senior or Principal level • Proficiency in designing, implementing, and optimizing Digital Signal Processing algorithms and with embedded systems design. • Experience optimizing algorithms for embedded targets that are memory and CPU resource constrained with optimizing computations for real-time processing. • Experience with DSP hardware and software tools and strong debugging and troubleshooting skills with target tools and environments. • Experience with real-time operating systems (RTOS) requirements • Experience with working with C++ mathematical libraries and tools that use linear algebra: matrices, vectors, numerical solvers, and geometric transformations • Familiarity with microcontrollers, DSP processors, and interfacing to FPGA. • Experience in agile development methodologies • Languages: C++, Python, MATLAB • Familiarity with mathematical and scientific simulations software tools like MATLAB, Eigen, Boost • Experience working with Git Qualifications: • Minimum M.S. in Electrical Engineering, Computer Engineering, or Computer Science, Mathematics, or a related field. • Proven experience in C++ development with a strong understanding of Python. • Experience in embedded systems programming and development. • Familiarity with Python libraries used for scientific computations (e.g., NumPy, SciPy). • Experience with optimizing computations for real-time processing is highly desirable. Preferred Qualifications: • Background in physics or electrical engineering with a focus on electromagnetic fields. • Knowledge of electromagnetic field computations and related mathematical concepts, and experience with complex number handling. • Experience in using mathematical libraries and tools, particularly in the context of linear algebra, geometric transformations, and optimization techniques such as iterative algorithms. • Experience with software development lifecycle (SDLC) in regulated environment • Experience working with GitHub, Bitbucket, Jira, Confluence