FPGA Verification Engineer
Senior verification engineer job in Mountain View, CA
We are seeking a highly motivated and skilled FPGA Verification Engineer to join our dynamic team. In this role, you will be responsible for the verification of complex FPGA designs, ensuring their functionality, performance, and reliability.
You will work closely with design engineers to develop and execute verification plans, identify and debug issues, and contribute to the overall quality of our products.
Key Responsibilities:
Strong understanding of FPGA design principles and architectures.
Proficiency in System Verilog and UVM verification methodology.
Experience with industry-standard verification tools (e.g., QuestaSim, Synopsys VCS).
Knowledge of code coverage and functional coverage analysis.
Excellent debugging and problem-solving skills.
Strong communication and collaboration skills.
Job Requirements:
Work onsite in Mountain View, California
Bachelor's or master's degree in electrical engineering, Computer Engineering, or a related field.
Experience in FPGA verification.
Experience with scripting languages (e.g., Python, Perl).
Familiarity with hardware description languages (e.g., VHDL, Verilog).
We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform crucial job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.
Senior Agent Systems Engineer
Senior verification engineer job in Redwood City, CA
We're representing a frontier AI research group building autonomous systems that can reason, plan, and operate complex real-world engineering workflows. This is a core engineering role shaping how intelligent agents interact with tools, data, and long-horizon tasks.
⭐ The Opportunity
Join a small, high-performing team designing the orchestration, planning, and execution layer that enables LLM-driven agents to reliably complete multi-step engineering processes.
What You'll Do
Build agent planning and orchestration systems that coordinate tool calls, workflows, and long-horizon tasks
Design schemas, action interfaces, and deterministic execution flows
Implement robust error-handling, rollback, retry, and reproducibility strategies
Own the tooling logic that connects agents to real engineering stacks
Partner with ML researchers, infra teams, and domain experts to deliver production-grade agent systems
What You Bring
Experience building agent systems, orchestrators, tool-use frameworks, or structured LLM pipelines
Strong systems-engineering fundamentals - deterministic thinking, reliability, and failure-mode awareness
Comfort designing workflows that integrate with complex real-world tools
Ability to work in a fast, experimental environment where robustness matters
Why This Role Excites People
Build agent systems that control real physical-world workflows, not just simulations
Huge scope for technical ownership and creative problem-solving
Mission-driven environment focused on breakthrough autonomy
Competitive salary + strong equity in a fast-scaling AI organization
Interested?
If you're passionate about building reliable, intelligent agent systems at the cutting edge of AI and autonomy, we'd love to speak.
Senior Embedded Software Engineer
Senior verification engineer job in Palo Alto, CA
We are looking for a Sr. Embedded Software Engineer to join a small team responsible for energy management and control applications. We are looking for candidates experienced with embedded Linux such as new hardware bring-up, bootloaders, porting drivers for various peripherals, and general system software for telemetry and connectivity management. Background in low-latency and real-time systems is particularly interesting, but most of all we're looking for people with high capacity and ability to ramp up in whatever topic is needed. Strong C knowledge and excellent debugging skills are critical to be successful in this role.
What You'll Do
Deliver high quality system-level software for various embedded Linux controllers to manage connectivity, telemetry, OTA updates, etc.
Bootloader development, board bring-up, and porting of new drivers for hardware enablement on Linux platforms
Packaging and build system integration of various software components
Define new hardware requirements
Closely work with teams across the company, Hardware, Applications, QA, Validation and Manufacturing
Collaborate with validation teams to develop test strategies and test plans
Skills Required:
5+ years' experience building, debugging, and shipping embedded systems using Linux
Experience developing system software on embedded Linux platforms for connectivity, telemetry, and OTA update management
Comfortable with debugging hardware issues
Familiar with SoC level software development (ARM Cortex-A, PPC, x86 or other architectures)
Can read and interpret system schematics
Proficient in C and/or C++
Working knowledge of embedded networking protocols such as CAN, RS-485, ModBus, and Ethernet
Working knowledge of wireless communication standards such as WiFi, ZigBee, Thread, BLE, LTE
Familiarity with embedded Linux security fundamentals such as secure boot, PKI, hardware key storage
Experience writing and understanding technical specifications
Benefits:
The Company offers the following benefits for this position, subject to applicable eligibility requirements: medical insurance, dental insurance, vision insurance, 401(k) retirement plan, life insurance, long-term disability insurance, short-term disability insurance, paid parking/public transportation, (paid time , paid sick and safe time , hours of paid vacation time, weeks of paid parental leave, paid holidays annually - AS Applicable)
Senior Embedded Software Engineer
Senior verification engineer job in Palo Alto, CA
Source One is a consulting services company and we're currently looking for the following individual to work as a consultant with our direct client, an autonomous mobility solutions company in Palo Alto, CA.
No Third-Party, No Corp to Corp, No Sponsorship
Title: Vehicle Software Platform Engineer
Location: Palo Alto, CA
Onsite: Mon-Fri, 40 hours
Contract Duration: 6 months with likely extension
Pay Rate: $120 - $140 hourly (w2)
Job description
Our partner is helping our client find an experienced Vehicle Software Platform Engineer to join its team developing a scalable, data-driven approach to autonomous and assisted driving.
In this role, you will focus on developing robust, sophisticated software platforms and tooling that underpin the functionality of modern vehicles.
We're looking for a candidate with a strong software development background in embedded, robotics, or automotive systems and the ability to work hands-on in a fast-paced, collaborative, and intercultural environment.
As a Vehicle Software Platform Engineer, you'll:
Work with the team to design, implement, test, and integrate features into the AD/ADAS vehicle platform.
Set up or adapt build flows and other relevant tooling.
Be excited about working hands-on in a fast-paced environment on software closely connected to operating systems, compute hardware, sensors, and vehicles.
Be ready to dive in and learn across the technology stack and leverage experience to develop solutions with sound design principles, extensibility, with safety in mind.
Ideal candidate profile
Excellent understanding of embedded software and systems (automotive, aerospace, robotics, etc.) and related interfaces (Ethernet, CAN, etc.).
Experience with system software development (e.g. drivers, filesystems, sockets) on Linux and/or QNX.
Daily tasks
Work with the team to design, implement, test, and integrate features into the AD/ADAS vehicle platform.
Set up or adapt build flows, and other relevant tooling.
Be excited about working hands-on in a fast-paced environment on software closely connected to operating systems, compute hardware, sensors, and vehicles.
Be ready to dive-in and learn across the technology stack and leverage experience to develop solutions with sound design principles, extensibility, and safety in mind.
Required skills
Bachelor's or Master's degree in Computer Science, Engineering, or a related field highly preferred
3-5+ years of relevant work experience
Proven track record of shipping software to production in our or a nearby domain (e.g., automotive, aerospace, defense, robotics)
Strong C++ and Python programming skills
Strong debugging and troubleshooting skills
Generalist attitude with proven ability to dive deep fast and willingness to learn continuously
Senior Embedded Software Engineer
Senior verification engineer job in Palo Alto, CA
We are looking for a Senior Software Embedded Engineer with strong experience in developing and debugging embedded software on Linux and RTOS platforms.
Mandatory:
Bachelor's or Master's degree in Computer Science/Engineering or related field
7+ years of Embedded Software Development experience
Strong hands-on programming skills in C/C++
Strong understanding of Linux and/or RTOS fundamentals
Experience with Linux build systems, device trees, kernel driver development
Real-time debugging experience across software and hardware layers
Experience using Lauterbach, Oscilloscope, JTAG, Flashing Tools
Belcan is an equal opportunity employer. Your application and candidacy will not be considered based on race, colour, sex, religion, creed, sexual orientation, gender identity, national origin, disability, genetic information, pregnancy, veteran status or any other characteristic protected by federal, state or local laws.
Embedded GUI Engineer
Senior verification engineer job in Palo Alto, CA
Job Title: Embedded GUI Engineer
Duration: 6-12+ months Contract-to-Hire (C2H)
Role Summary: Embedded GUI Engineer
Seeking an experienced Embedded GUI Engineer to design, develop, and optimize graphical user interfaces for next-generation embedded devices. The role requires strong hands-on expertise with LVGL, Zephyr RTOS, and embedded graphics stacks, working closely with UX, platform, and hardware teams.
Key Responsibilities
Design and develop embedded GUIs using LVGL and Zephyr RTOS.
Collaborate with UX teams to evaluate design concepts, build prototypes, and assess feasibility.
Develop UI assets and workflows using tools such as Figma, ProtoPie, FreeType, em Win, etc.
Optimize graphics pipelines considering memory, performance, and system constraints.
Interface with embedded platform software engineers and silicon vendor graphics stacks (e.g., OpenGL, Skia, TouchGFX, VGLite).
Provide input on component and hardware selection related to 2D/3D graphics performance.
Participate in system-level architecture, design reviews, and product definition.
Ensure alignment between development, testing, documentation, and delivery milestones.
Communicate progress, risks, and dependencies to stakeholders.
Contribute to continuous improvements in development processes, tooling, and methodologies.
Required Skills & Qualifications
Bachelor's/Master's degree in Computer Science, Electrical Engineering, Embedded Systems, or related field.
5+ years of experience in embedded software, GUI development, or HMI engineering.
Strong hands-on experience with LVGL and embedded UI frameworks.
Experience working with Zephyr RTOS or similar real-time operating systems.
Solid understanding of embedded platforms, compilers, build systems, and version control.
Experience with GUI/UX workflows, validation, and performance optimization.
Strong communication, documentation, and cross-functional collaboration skills.
Ability to manage tasks, timelines, and deliverables in fast-paced environments.
Good-to-Have
Experience designing complete GUI development pipelines (asset creation → build → deployment → automated testing).
Familiarity with GPU/graphics accelerators and hardware bring-up.
Exposure to automotive, consumer electronics, medical devices, or IoT products.
Experience with C/C++, Python, or shell scripting.
Knowledge of Jira, Confluence, Microsoft Project, or similar PM tools.
Distributed Systems Engineer / AI Workloads
Senior verification engineer job in San Francisco, CA
We are actively searching for a Distributed Systems Engineer to join our team on a permanent basis. In this founding engineer role you will focus on building next-generation data infrastructure for our AI platform. If you have a passion for distributed systems, unified storage, orchestration, and retrieval for AI workloads we would love to speak with you. Our office is located in downtown SF and we collaborate two days a week onsite.
Your Rhythm:
Design, build, and maintain data infrastructure systems such as distributed compute, data orchestration, distributed storage, streaming infrastructure, machine learning infrastructure while ensuring scalability, reliability, and security
Ensure our data platform can scale by orders of magnitude while remaining reliable and efficient
Tackle complex challenges in distributed systems, databases, and AI infrastructure
Collaborate with technical leadership to define and refine the product roadmap
Write high-quality, well-tested, and maintainable code
Contribute to the open-source community and engage with developers in the space
Your Vibe:
3+ years of professional distributed database systems experience
Expertise in building and operating scalable, reliable and secure database infrastructure systems
Strong knowledge around distributed compute, data orchestration, distributed storage, streaming infrastructure
Strong knowledge of SQL and NoSQL databases, such as MySQL, Postgres, and MongoDB.
Programming skills in Python
Passion for building developer tools and scalable infrastructure
Available to collaborate onsite 2 days a week
Our Vibe:
Relaxed work environment
100% paid top of the line health care benefits
Full ownership, no micro management
Strong equity package
401K
Unlimited vacation
An actual work/life balance, we aren't trying to run you into the ground. We have families and enjoy life too!
AI Embedded Engineer
Senior verification engineer job in Sunnyvale, CA
Responsibilities
Design and develop high-performance AI frameworks for large-scale distributed computation
Optimize scalability and efficiency using Nvidia Dynamo Framework
Work with distributed dataflow programming to orchestrate GPU workloads using Python and Kubernetes
Integrate advanced LLMs into real-world applications, shaping the future of AI-driven software
Contribute to building test-automation infrastructure for Kubernetes on large-scale GPU clusters.
Help develop detailed test plans for different milestones and operationalize them in test-automation infrastructure.
Own and conduct end-end system, scale and stress testing.
Working together with SW leads and Technical Program Manager, qualify the releases.
Attract and help build downstream production engineering talent.
Role model and foster a culture of humility and innovation for product delivery.
Experience:
3-8+ years of experience in software engineering, ideally at a staff level
Strong expertise in distributed dataflow programming and distributed systems
Hands-on experience with LLMs and AI frameworks
Proficiency in Python, with experience orchestrating GPU workloads
Experience with Kubernetes for containerized application deployment and orchestration
Experience working in systems & systems SW, Cloud and Kubernetes.
Experience with production-testing and automation of Kubernetes deployments.
Preferred Qualifications:
Master's or similar qualification in a relevant field.
Experience with scalable test and automation infrastructure to productionize workloads.
Experience with GPU platforms (e.g., Nvidia DGX, H100) and high-performance computing environments.
Experience triaging customer bugs, prioritizing, and resolving issues in production.
Familiarity with AI developer frameworks, tools, and automation systems
Sr Staff IT Systems Engineer
Senior verification engineer job in Santa Clara, CA
Our Mission At Palo Alto Networks everything starts and ends with our mission: Being the cybersecurity partner of choice, protecting our digital way of life. Our vision is a world where each day is safer and more secure than the one before. We are a company built on the foundation of challenging and disrupting the way things are done, and we're looking for innovators who are as committed to shaping the future of cybersecurity as we are.
Who We Are
We believe collaboration thrives in person. That's why most of our teams work from the office full time, with flexibility when it's needed. This model supports real-time problem-solving, stronger relationships, and the kind of precision that drives great outcomes.
Job Description
Your Career
As our IT Systems Engineer, you will be a critical part of our Information Technology team. This is more than just a support role; you are the backbone of our corporate systems. You will have ownership over key platforms that our entire organization relies on daily. You'll be challenged to not only maintain but also to enhance our systems, automate processes, and strengthen our security posture. This role provides a unique opportunity to work cross-functionally, particularly with our Information Security team, placing you at the center of critical IT operations and strategy.
Your Impact
Master of Google Workspace: You will have administrative management of our Google Workspace environment, managing everything from user lifecycle and group policies to application settings for Gmail, Drive, Calendar, and Gemini.
Guardian of Email Integrity: You will manage and secure all company email channels. This includes administering our primary Google Workspace email, our security gateway, and our transactional email service. Your expertise will ensure our communications are secure, reliable, and protected from threats.
Frontline Problem-Solver: You will be a key responder to IT issues, managing and resolving tickets through ServiceNow. You will be responsible for providing timely and effective solutions to your colleagues, ensuring minimal disruption to their work.
Security Collaborator: You will act as a crucial liaison to the Information Security team. This involves proactively implementing security configurations, responding to InfoSec requests, and integrating security best practices into all our systems.
Champion the strategic use of AI to enhance outcome: identify opportunities to introduce AI and self-service solutions that enhance infrastructure efficiency and empower users. prioritizing activities where these technologies can drive efficiencies and cost savings. Seek advanced solutions in this space and implement predictive analytics.
Qualifications
Your Experience
BS/MS degree in Computer Science, Engineering, or a related subject, or equivalent experience.
Proven experience in a Systems Engineer or similar role, with a strong background in IT infrastructure and support.
Google Workspace Expertise: Deep, hands-on experience administering Google Workspace (formerly G Suite) at an enterprise level.
Managed or led and executed the full lifecycle of Microsoft 365 to Google Workspace migrations, including data transfer, user provisioning, and post-migration support
Email Systems Proficiency: Solid experience with email security gateways (Proofpoint is a strong plus) and familiarity with mail routing, SPF, DKIM, and DMARC. Experience with transactional email platforms like SendGrid is highly desirable.
ITSM Knowledge: Demonstrable experience using ITSM tools, with a strong preference for ServiceNow.
Security Mindset: A fundamental understanding of information security principles and experience working collaboratively with security teams.
Scripting & Automation: Solid scripting skills (e.g., Javascript, Python, GAM) to automate tasks and improve efficiency.
Communication & Collaboration: Excellent communication skills, with the ability to articulate technical issues to both technical and non-technical audiences and to work effectively across teams.
Personal Attributes: Highly self-motivated, AI evangelist, possessing an energetic disposition and a positive attitude, geared towards data-driven decisions and focusing on high-impact outcomes.
Change/Incident Management - This position plays a key role in maintaining our service level agreements. The successful applicant will have a track record of applying formal change management procedures to minimize risk and disruption. They will also lead incident response efforts, coordinating with cross-functional teams to quickly diagnose and resolve service outages and major incidents
Autonomous - The successful candidate will be a true owner, capable of single-handedly driving initiatives forward. This includes defining requirements, building out the project plan, and independently managing all necessary resources and tasks to deliver a successful outcome. Your success will be measured by your ability to deliver results with minimal direction
Innovation Readiness Continuously embrace emerging technologies, including AI-powered tools, to enhance service delivery, drive automation, and stay adaptive in a fast-evolving IT landscape
Additional Information
The Team
Being in End User Engineering at Palo Alto Networks means that you will be in the midst of the changes impacting our cybersecurity industry, helping our internal teams, customers, and partners address the ever-changing threats we all face daily. Making, doing, building, and rebuilding, leading initiatives that have never been done before. We solve real problems with new ideas, striving tirelessly for simplicity.
We are disruptors; we challenge entrenched beliefs and look to the future of what's possible. We like our work to answer big questions and drive the business ahead. How do we enable more productivity and strengthen our ability to scale? How do we fuel our culture of learning, experimentation, trust, and continuous improvement? And how do we show up and collaborate with one another every day in ways that invite us to do our best work?
Compensation Disclosure
The compensation offered for this position will depend on qualifications, experience, and work location. For candidates who receive an offer at the posted level, the starting base salary (for non-sales roles) or base salary + commission target (for sales/commissioned roles) is expected to be between $131000 - $213500/YR. The offered compensation may also include restricted stock units and a bonus. A description of our employee benefits may be found here.
Our Commitment
We're problem solvers that take risks and challenge cybersecurity's status quo. It's simple: we can't accomplish our mission without diverse teams innovating, together.
We are committed to providing reasonable accommodations for all qualified individuals with a disability. If you require assistance or accommodation due to a disability or special need, please contact us at accommodations@paloaltonetworks.com.
Palo Alto Networks is an equal opportunity employer. We celebrate diversity in our workplace, and all qualified applicants will receive consideration for employment without regard to age, ancestry, color, family or medical care leave, gender identity or expression, genetic information, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran status, race, religion, sex (including pregnancy), sexual orientation, or other legally protected characteristics.
All your information will be kept confidential according to EEO guidelines.
Is role eligible for Immigration Sponsorship? No. Please note that we will not sponsor applicants for work visas for this position.
Senior Embedded Software Engineer
Senior verification engineer job in Palo Alto, CA
We're looking for a Staff level Embedded Software Engineer to join our team, focusing on the software stack for Design Verification of PCBAs & ECUs (Electronic Component Units) in current and next-gen vehicle platforms primarily The Connectivity & Vehicle Access Segment. You'll develop device drivers for PCBA components, create software prototypes for early "h/w + s/w co-designs," build validation test cases in Python/C, and much more. This role offers a chance to collaborate with some of the brightest minds in developing embedded h/w + s/w stacks for the rapidly evolving EV industry.
Responsibilities
- Work with h/w and s/w architects to collaborate on next-gen platform architecture with various SoCs and the software stack.
- Design, develop, and deploy embedded software on Linux and/or RTOS for board bring-up, verification, and debugging of automotive electronics.
- Collaborate across multiple disciplines to deliver quality code, debug complex problems, prioritize, and get things done with high efficiency and urgency.
- Ability to debug in real-time across the s/w and h/w stack to understand the real issue and provide solutions, working and collaborating with multiple teams if needed.
- Familiarity with Linux build systems, device trees, and kernel driver development is essential.
- Ability to crisply communicate with peers, stakeholders, customers, technical leaders, and OEMs/ODMs.
Qualifications
Bachelor's or Master's degree in Computer Science/Engineering or related field.
7+ years' experience in Embedded Software Development.
Experience with Automotive Infotainment/Connectivity platforms preferably working with GNSS, UWB, RF, A2B, BT Audio
Good coding skills on C/C++.
Good understanding of Linux and/or RTOS fundamentals, Board Support Packages, kernel configuration, device driver interfaces, debugging tools, etc.
Excellent debugging skills with an ability to work across organizations/teams.
Experience using Lauterbach, Oscilloscope, JTAG, Flashing Tools, etc.
BIOS Firmware Engineer
Senior verification engineer job in Fremont, CA
Job Title: BIOS Firmware Engineer
Job Type: Fulltime
Work Schedule: Onsite
Salary: 120000 - 150000/Yearly
The BIOS/UEFI Firmware Engineer is responsible for the architecture, design, development, and debugging of UEFI (Unified Extensible Firmware Interface) and BIOS (Basic Input/Output System) firmware for computer systems. This role focuses exclusively on the firmware that initializes hardware and boots the operating system, ensuring compatibility, security, and performance from power-on. It emphasizes not only hands-on technical expertise but also leadership in guiding projects and supporting team members.
This position is part of the Engineering Services team, which works across departments to support the engineering and operation teams with technical expertise in electronics, operational software, and systems integration.
Responsibilities:
Design, develop, and maintain UEFI/BIOS firmware using C and C++.
Contribute to all phases of the UEFI boot process, including Security (SEC), Pre-EFI Initialization (PEI), and Driver Execution Environment (DXE).
Lead effort in hardware bring-up for new platforms, debugging complex hardware-firmware interactions across CPU, memory, and peripheral devices.
Ensure correct initialization of key system hardware such as DDR memory, PCIe, SATA, USB, and other interfaces.
Optimize boot performance and implement firmware security measures such as Secure Boot, Intel Boot Guard, and Trusted Platform Module (TPM) integration.
Collaborate with hardware engineers to interpret schematics and datasheets and ensure accurate hardware configuration.
Use debugging tools (e.g., JTAG, in-circuit emulators, logic analyzers) for troubleshooting.
Participate in and provide leadership during code reviews, write technical documentation, and mentor junior engineers.
Work cross-functionally with hardware, operating system, and security teams to ensure system compatibility and reliability.
Qualifications:
Strong proficiency in C/C++ programming for embedded systems.
In-depth knowledge of UEFI architecture (EDK2 framework), x86 architecture, and system boot processes.
Solid understanding of hardware interfaces such as PCIe, SPI, I2C, and USB.
Strong analytical and problem-solving skills.
Excellent communication and collaboration skills, with demonstrated ability to work independently.
Proven leadership skills, including mentoring, guiding projects, or leading initiatives.
Experience with scripting languages such as Python for automation.
Knowledge of firmware security standards (e.g., NIST SP 800-193, Secure Boot).
Experience with low-level debugging of boot-related issues.
Understanding of System Management Mode (SMM), Advanced Configuration and Power Interface (ACPI), Intel Firmware Support Package (FSP), or Intel Firmware Image (IFWI).
Bachelor's or Master's degree in Computer Engineering, Electrical Engineering, or related field.
Minimum of 2+ years of BIOS/UEFI firmware development experience with demonstrated leadership responsibilities.
Prolonged periods of sitting at a desk and working on a computer.
Ability to access and navigate various departments within the organization's facilities.
About Maxonic:
Since 2002 Maxonic has been at the forefront of connecting candidate strengths to client challenges. Our award winning, dedicated team of recruiting professionals are specialized by technology, are great listeners, and will seek to find a position that meets the long-term career needs of our candidates. We take pride in the over 10,000 candidates that we have placed, and the repeat business that we earn from our satisfied clients.
Interested in Applying?
Please apply with your most current resume. Feel free to contact Jhankar Chanda (******************* / ************* for more details
Distributed Systems Engineer
Senior verification engineer job in San Francisco, CA
San Francisco, CA (Onsite)
About the Company
A fast-moving AI research group is building the core video data infrastructure used by leading AI labs and major tech companies. The team is small at around fifteen people, nearly all engineers, and recently pivoted to focus exclusively on high-quality video data at massive scale.
The shift has driven significant revenue growth, and they are now planning to expand the team steadily over the next few months.
The culture is straightforward: engineering led, product focused, low ego, and built around people who enjoy ownership. They work in person five days a week in their San Francisco office, moving quickly, solving hard problems, and avoiding micromanagement.
The Role
This position focuses on designing and scaling distributed systems that support huge ML and ETL workloads across petabytes of video. You will own core infrastructure: compute scheduling, orchestration, throughput, reliability, cost efficiency, and the internal tooling that keeps the entire engineering group moving at pace.
The company is beginning to scale its infrastructure footprint aggressively, and this role will become central to that growth. It is a hands-on IC position suited to someone who has operated critical systems before and wants to shape the foundation of a rapidly expanding platform.
What You'll Work On
• Architect and scale distributed systems for large-scale ML and ETL workloads
• Build compute orchestration and scheduling across thousands of GPUs
• Improve uptime, resilience, and execution speed of high-volume data pipelines
• Design pipelines capable of handling petabyte-level video datasets
• Lead the development of CI/CD and internal tooling for fast iteration
• Partner closely with research engineers delivering new video models and algorithms
• Operate in a high-trust environment with strong autonomy and clear ownership
Requirements
• 3+ years building foundational distributed systems or data infrastructure
• Experience running critical systems at significant scale
• Proficient across cloud architectures
• Strong coding experience with Go (preferred) and Python
• Background building or maintaining large-scale pipelines
• Experience with ML-focused CI/CD and automation
• Video domain experience is not required
• Operates as a strong IC who leads through action
• Fully onsite in San Francisco, Monday to Friday
Culture Fit
• Enjoys ambiguity, problem discovery, and self-direction
• Communicates clearly and concisely
• Shows strong intellectual curiosity
• Low ego, collaborative mindset
• Motivated by building core systems in a small, high-caliber team
Red flags include weak communication, low curiosity, or unclear motivation for the domain.
Interview Process
Intro call focused on culture, curiosity, and communication
Technical discussion on background and complexity of past work
Problem-solving session with a research engineer
Onsite research problem and collaboration exercise
RTL Engineer : System Verilog , UVM
Senior verification engineer job in Sunnyvale, CA
RTL Engineer
Fulltime
We are urgently seeking experienced RTL Engineers to join our team. The selected candidates will be responsible for developing and executing verification plans, building robust verification environments, and collaborating closely with design teams to ensure high-quality deliverables.
Responsibilities
Plan: Develop comprehensive Core Verification Plans based on micro-architecture and design specifications.
Develop: Architect and implement reusable, scalable verification environments using System Verilog/UVM.
Test: Create and run constrained-random and directed tests to achieve high functional and code coverage.
Debug: Analyze simulation results, root-cause complex failures, and work with design teams to resolve issues.
Automate: Build and maintain automation scripts (Python/Perl) to enhance verification workflows and regression management.
Requirements
Mandatory expertise in System Verilog and UVM.
Minimum 7 years of hands-on verification experience.
Strong understanding of digital logic design and verification methodologies.
Experience verifying digital systems using standard IP components/interconnects (e.g., microprocessor cores, hierarchical memory subsystems).
Ability to work independently and provide technical feedback to FE RTL design teams and CPU/IP micro-architects.
Proficiency with industry-standard EDA simulation and debug tools.
Strong debugging and root-cause analysis skills.
Scripting experience (Python, Perl).
Excellent written and verbal communication skills in English.
Added keywords for additional candidates.
HBM
Memory Controller
SoC
DRAM
TPU
ARM Cortex
ARM M7
There are three core expectations:
Strong, independent leads
Engineers who can operate with confidence, reduce dependency on the client's thin internal team, and take real ownership of blocks.
Consistency and continuity
We cannot afford churn - selected leads must be stable, reliable long-term contributors.
Ability to scale with the program
Additional phases may spin up quickly; leads should be capable of mentoring and guiding expansion teams.
Thanks and Regards,
Manisha Dabral
Signature IT World Inc.
*********************
Design Verification Engineer
Senior verification engineer job in San Francisco, CA
About the Team: OpenAI's Hardware organization develops silicon and system-level solutions designed for the unique demands of advanced AI workloads. The team is responsible for building the next generation of AI-native silicon while working closely with software and research partners to co-design hardware tightly integrated with AI models. In addition to delivering production-grade silicon for OpenAI's supercomputing infrastructure, the team also creates custom design tools and methodologies that accelerate innovation and enable hardware optimized specifically for AI.
About the Role
OpenAI is developing custom silicon to power the next generation of frontier AI models. We're looking for experienced Design Verification (DV) Engineers to ensure functional correctness and robust design for our cutting-edge ML accelerators. You will play a key role in verifying complex hardware systems-ranging from individual IP blocks to subsystems and full SoC-working closely with architecture, RTL, software, and systems teams to deliver reliable silicon at scale.
Key Responsibilities
* Own the verification of one or more of: custom IP blocks, subsystems (compute, interconnect, memory, etc.), or full-chip SoC-level functionality.
* Define verification plans based on architecture and microarchitecture specs.
* Develop constrained-random, directed, and system-level testbenches using SystemVerilog/UVM or equivalent methodologies.
* Build and maintain stimulus generators, checkers, monitors, and scoreboards to ensure high coverage and correctness.
* Drive bug triage, root cause analysis, and work closely with design teams on resolution.
* Contribute to regression infrastructure, coverage analysis, and closure for both block- and top-level environments.
Qualifications
* BS/MS in EE/CE/CS or equivalent with 3+ years of experience in hardware verification.
* Proven success verifying complex IP or SoC designs in industry-standard flows
* Proficient in SystemVerilog, UVM, and common simulation and debug tools (e.g., VCS, Questa, Verdi).
* Strong knowledge of computer architecture concepts, memory and cache systems, coherency, interconnects, and/or ML compute primitives.
* Familiarity with performance modeling, formal verification, or emulation is a plus.
* Experience working in fast-paced, cross-disciplinary teams with a passion for building reliable hardware.
To comply with U.S. export control laws and regulations, candidates for this role may need to meet certain legal status requirements as provided in those laws and regulations.
About OpenAI
OpenAI is an AI research and deployment company dedicated to ensuring that general-purpose artificial intelligence benefits all of humanity. We push the boundaries of the capabilities of AI systems and seek to safely deploy them to the world through our products. AI is an extremely powerful tool that must be created with safety and human needs at its core, and to achieve our mission, we must encompass and value the many different perspectives, voices, and experiences that form the full spectrum of humanity.
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At OpenAI, we believe artificial intelligence has the potential to help people solve immense global challenges, and we want the upside of AI to be widely shared. Join us in shaping the future of technology.
Physical Design and Verification Engineer
Senior verification engineer job in Fremont, CA
We are creating devices that enable a bi-directional interface with the brain. These devices allow us to restore movement to the paralyzed, restore sight to the blind, and revolutionize how humans interact with their digital world.
Team Description:
The Brain Interfaces Soc Department delivers chip architecture and silicon implementation of neural recording and stimulation system-on-chip (SoC) for high-bandwidth brain-machine interface applications. We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is possible today and define the future.
Job Responsibilities and Description:
The Physical Design and Verification Engineer will be responsible for RTL to GDSII Physical Design Implementation, including Synthesis, Placement, Clock Tree Synthesis, Detailed Routing and Optimization, in addition to Physical Signoff Verification.
Required Qualifications:
Bachelor of Science (B.S.) degree in Electrical Engineering and/or Computer Science or a related field, or equivalent experience.
Minimum 5 years of experience in digital physical design and verification.
Excellence in complete RTL to GDSII flow with strong experience in the usage of industry-standard Electronic Design Automation (EDA) tools for both physical design and timing signoff.
Deep knowledge on industry standards and practices in physical design including physically-aware synthesis flow, floor-planning, and place & route, metal fill, chip finishing, signal integrity checks, and dynamic EMIR-Drop analysis, and formal ESD verification.
Experience in Signoff ECO flow to fix timing, noise, IR-Drop and EMIR violations.
Experience in physical design verification to debug LVS/DRC/PERC issues at the chip/block level using industry standard tools.
Experience in developing automation flow and scripts using Python, Perl, Makefile, Tcl and UNIX shell.
Preferred Qualifications:
Master of Science (M.S.) degree in Electrical Engineering and/or Computer Science or a related field, or equivalent experience.
Experience working on physical design and implementation of complex ASIC systems at advanced technology nodes, preferably 16nm and below.
Experience in DFT (Design For Test) flows and ATPG.
Experience in I/O design flow in multi-voltage power domain.
Experience in building chip floor-plan including pin placement, partitions and power grid.
Experience in hierarchical synthesis, place-and-route and design closure to meet timing, area, and UPF-driven low power constraints.
Experience with build tools such as CMake and Bazel.
Experience with code coverage and regression setup.
Expected Compensation:
The anticipated base salary for this position is expected to be within the following range. Your actual base pay will be determined by your job-related skills, experience, and relevant education or training. We also believe in aligning our employees' success with the company's long-term growth. As such, in addition to base salary, Neuralink offers equity compensation (in the form of Restricted Stock Units (RSU)) for all full-time employees.
Base Salary Range:$158,000-$243,000 USD
What We Offer:
Full-time employees are eligible for the following benefits listed below.
An opportunity to change the world and work with some of the smartest and most talented experts from different fields
Growth potential; we rapidly advance team members who have an outsized impact
Excellent medical, dental, and vision insurance through a PPO plan
Paid holidays
Commuter benefits
Meals provided
Equity (RSUs)
*Temporary Employees & Interns excluded
401(k) plan
*Interns initially excluded until they work 1,000 hours
Parental leave
*Temporary Employees & Interns excluded
Flexible time off
*Temporary Employees & Interns excluded
Auto-ApplyDistributed Systems Engineer / AI Workloads
Senior verification engineer job in Fremont, CA
We are actively searching for a Distributed Systems Engineer to join our team on a permanent basis. In this founding engineer role you will focus on building next-generation data infrastructure for our AI platform. If you have a passion for distributed systems, unified storage, orchestration, and retrieval for AI workloads we would love to speak with you. Our office is located in downtown SF and we collaborate two days a week onsite.
Your Rhythm:
Design, build, and maintain data infrastructure systems such as distributed compute, data orchestration, distributed storage, streaming infrastructure, machine learning infrastructure while ensuring scalability, reliability, and security
Ensure our data platform can scale by orders of magnitude while remaining reliable and efficient
Tackle complex challenges in distributed systems, databases, and AI infrastructure
Collaborate with technical leadership to define and refine the product roadmap
Write high-quality, well-tested, and maintainable code
Contribute to the open-source community and engage with developers in the space
Your Vibe:
3+ years of professional distributed database systems experience
Expertise in building and operating scalable, reliable and secure database infrastructure systems
Strong knowledge around distributed compute, data orchestration, distributed storage, streaming infrastructure
Strong knowledge of SQL and NoSQL databases, such as MySQL, Postgres, and MongoDB.
Programming skills in Python
Passion for building developer tools and scalable infrastructure
Available to collaborate onsite 2 days a week
Our Vibe:
Relaxed work environment
100% paid top of the line health care benefits
Full ownership, no micro management
Strong equity package
401K
Unlimited vacation
An actual work/life balance, we aren't trying to run you into the ground. We have families and enjoy life too!
System Engineer
Senior verification engineer job in Fremont, CA
Systems Engineer - Video Intelligence Infrastructure - San Francisco
About the Company
A Series A Funded start-up who already have millions in recurring revenue are building next-generation AI infrastructure for video intelligence are looking for a Systems Engineer to join their team.
What You'll Be Doing:
Design and engineer systems that handle compute, scheduling, and orchestration of complex ML + ETL pipelines
Optimize hyper-fast distributed systems running at the scale of thousands of GPUs
Build systems that process video data quickly, reliably, and cost-effectively at internet scale
Develop robust internal tooling and CI/CD pipelines for rapid ML team iteration
Focus on system uptime and performance optimization for mission-critical infrastructure
What We're Looking For:
3+ years building foundational data infrastructure
Experience designing and maintaining pipelines that process petabytes of data
Strong background developing CI/CD pipelines for ML-focused teams
Excellent coding skills in Go and Python
Independent contributor who leads by example
What's In It For You
Competitive salary up to $250k
Small, high-impact team with significant growth trajectory
Opportunity to work with top AI video labs and collect world-class datasets
Apply now for immediate consideration!
Firmware Engineer (Multiple Openings)
Senior verification engineer job in Fremont, CA
Maxonic maintains a close and long-term relationship with our direct client. In support of their needs, we are looking for:
Job Title 1: BMC Firmware Engineer x 15 Openings
Job Title 2: BIOS Firmware Engineer x 15 Openings
Job Type: Fulltime
Job Location: Fremont, CA or Nashville, TN
Work Schedule: Onsite
Job Title 1: BMC Firmware Engineer
Responsibilities:
Design, develop, and maintain BMC firmware solutions using embedded C and C++ in a Linux based environment.
Implement industry specifications and protocols such as OpenBMC, Redfish, IPMI, and other Distributed Management Task Force (DMTF) standards.
Develop firmware to interface with server hardware components, including sensors (voltage, temperature, fan speed), power supplies, and peripherals, using protocols such as I²C, SPI, and UART.
Implement key BMC features including remote monitoring, power management, event logging (System Event Log/SEL), and remote keyboard-video-mouse (KVM) access.
Collaborate with hardware design and platform architecture teams to ensure proper BMC integration during hardware bring-up and validation.
Maintain security measures for BMC access, including user authentication, secure firmware updates, and vulnerability prevention.
Use debugging tools and methodologies to diagnose and resolve system-level issues related to BMC and hardware interaction.
Prepare and maintain technical documentation, including design specifications, test plans, and release notes.
Provide guidance to junior engineers and take ownership of small to mid-sized projects.
Qualifications:
Proficiency in C and C++ programming for embedded systems.
Hands-on experience with embedded Linux and OpenBMC framework.
Strong understanding of server hardware architecture and communication protocols (I²C, SPI, UART, PCIe).
Ability to troubleshoot and debug complex system-level interactions.
Effective communication skills for cross-functional collaboration.
Ability to work independently on most assignments and provide technical leadership on smaller projects
Preferred qualifications:
Familiarity with DMTF standards such as Redfish, MCTP (Management Component Transport Protocol), PLDM (Platform Level Data Model), and SPDM (Security Protocol and Data Model).
Experience with System-on-a-Chip (SoC) architectures, particularly ARM-based systems.
Knowledge of scripting languages (e.g., Python, Shell) for automation and testing.
Exposure to Agile development methodologies.
Understanding firmware security principles.
Bachelor's or Master's degree in Computer Engineering, Electrical Engineering, or a related technical field.
2-5 years of hands-on embedded firmware development experience, specifically with BMC
systems.
Demonstrated ability to lead tasks or small projects with limited supervision.
Prolonged periods of sitting at a desk and working on a computer.
Ability to access and navigate various departments within the organization's facilities.
Job Title 2: BIOS Firmware Engineer
The BIOS/UEFI Firmware Engineer will design, develop, and debug system firmware that initializes hardware and boots operating systems. This role focuses on UEFI and BIOS development, ensuring optimal system performance, security, and hardware compatibility from power-on. The engineer will also provide technical leadership, mentor junior engineers, and collaborate across hardware, software, and security teams as part of the Engineering Services organization.
Key Responsibilities
Design, develop, and maintain UEFI/BIOS firmware using C/C++.
Contribute to all stages of the UEFI boot process, including SEC, PEI, and DXE phases.
Lead hardware bring-up for new platforms and debug hardware-firmware interactions across CPU, memory, and peripheral devices.
Ensure correct initialization of key system components such as DDR, PCIe, SATA, USB, and other interfaces.
Optimize boot performance and implement firmware security measures (e.g., Secure Boot, Intel Boot Guard, TPM integration).
Collaborate with hardware teams to interpret schematics, datasheets, and ensure accurate hardware configuration.
Use advanced debugging tools (JTAG, logic analyzers, in-circuit emulators) to troubleshoot complex issues.
Participate in and lead code reviews, author technical documentation, and mentor junior team members.
Partner cross-functionally with hardware, OS, and security teams to ensure system compatibility and reliability.
Qualifications
Strong proficiency in C/C++ programming for embedded systems.
Deep understanding of UEFI architecture (EDK2 framework), x86 architecture, and system boot processes.
Experience with hardware interfaces such as PCIe, SPI, I2C, and USB.
Skilled in low-level debugging of boot and hardware initialization issues.
Familiarity with System Management Mode (SMM), ACPI, Intel FSP, or IFWI.
Knowledge of firmware security standards (e.g., NIST SP 800-193, Secure Boot).
Experience with Python or other scripting languages for automation.
Proven leadership skills-guiding projects, mentoring engineers, or leading technical initiatives.
Excellent analytical, problem-solving, and communication skills.
Bachelor's or Master's degree in Computer Engineering, Electrical Engineering, or related field.
Minimum 2+ years of BIOS/UEFI firmware development experience with demonstrated leadership responsibilities.
About Maxonic:
Since 2002 Maxonic has been at the forefront of connecting candidate strengths to client challenges. Our award winning, dedicated team of recruiting professionals are specialized by technology, are great listeners, and will seek to find a position that meets the long-term career needs of our candidates. We take pride in the over 10,000 candidates that we have placed, and the repeat business that we earn from our satisfied clients.
Interested in Applying?
Please apply with your most current resume. Feel free to contact Saurav Kumar (****************** / *************** for more details.
Distributed Systems Engineer
Senior verification engineer job in San Jose, CA
San Francisco, CA (Onsite)
About the Company
A fast-moving AI research group is building the core video data infrastructure used by leading AI labs and major tech companies. The team is small at around fifteen people, nearly all engineers, and recently pivoted to focus exclusively on high-quality video data at massive scale.
The shift has driven significant revenue growth, and they are now planning to expand the team steadily over the next few months.
The culture is straightforward: engineering led, product focused, low ego, and built around people who enjoy ownership. They work in person five days a week in their San Francisco office, moving quickly, solving hard problems, and avoiding micromanagement.
The Role
This position focuses on designing and scaling distributed systems that support huge ML and ETL workloads across petabytes of video. You will own core infrastructure: compute scheduling, orchestration, throughput, reliability, cost efficiency, and the internal tooling that keeps the entire engineering group moving at pace.
The company is beginning to scale its infrastructure footprint aggressively, and this role will become central to that growth. It is a hands-on IC position suited to someone who has operated critical systems before and wants to shape the foundation of a rapidly expanding platform.
What You'll Work On
• Architect and scale distributed systems for large-scale ML and ETL workloads
• Build compute orchestration and scheduling across thousands of GPUs
• Improve uptime, resilience, and execution speed of high-volume data pipelines
• Design pipelines capable of handling petabyte-level video datasets
• Lead the development of CI/CD and internal tooling for fast iteration
• Partner closely with research engineers delivering new video models and algorithms
• Operate in a high-trust environment with strong autonomy and clear ownership
Requirements
• 3+ years building foundational distributed systems or data infrastructure
• Experience running critical systems at significant scale
• Proficient across cloud architectures
• Strong coding experience with Go (preferred) and Python
• Background building or maintaining large-scale pipelines
• Experience with ML-focused CI/CD and automation
• Video domain experience is not required
• Operates as a strong IC who leads through action
• Fully onsite in San Francisco, Monday to Friday
Culture Fit
• Enjoys ambiguity, problem discovery, and self-direction
• Communicates clearly and concisely
• Shows strong intellectual curiosity
• Low ego, collaborative mindset
• Motivated by building core systems in a small, high-caliber team
Red flags include weak communication, low curiosity, or unclear motivation for the domain.
Interview Process
Intro call focused on culture, curiosity, and communication
Technical discussion on background and complexity of past work
Problem-solving session with a research engineer
Onsite research problem and collaboration exercise
Distributed Systems Engineer / AI Workloads
Senior verification engineer job in San Jose, CA
We are actively searching for a Distributed Systems Engineer to join our team on a permanent basis. In this founding engineer role you will focus on building next-generation data infrastructure for our AI platform. If you have a passion for distributed systems, unified storage, orchestration, and retrieval for AI workloads we would love to speak with you. Our office is located in downtown SF and we collaborate two days a week onsite.
Your Rhythm:
Design, build, and maintain data infrastructure systems such as distributed compute, data orchestration, distributed storage, streaming infrastructure, machine learning infrastructure while ensuring scalability, reliability, and security
Ensure our data platform can scale by orders of magnitude while remaining reliable and efficient
Tackle complex challenges in distributed systems, databases, and AI infrastructure
Collaborate with technical leadership to define and refine the product roadmap
Write high-quality, well-tested, and maintainable code
Contribute to the open-source community and engage with developers in the space
Your Vibe:
3+ years of professional distributed database systems experience
Expertise in building and operating scalable, reliable and secure database infrastructure systems
Strong knowledge around distributed compute, data orchestration, distributed storage, streaming infrastructure
Strong knowledge of SQL and NoSQL databases, such as MySQL, Postgres, and MongoDB.
Programming skills in Python
Passion for building developer tools and scalable infrastructure
Available to collaborate onsite 2 days a week
Our Vibe:
Relaxed work environment
100% paid top of the line health care benefits
Full ownership, no micro management
Strong equity package
401K
Unlimited vacation
An actual work/life balance, we aren't trying to run you into the ground. We have families and enjoy life too!