Senior Staff Engineer jobs at ServiceNow - 21146 jobs

Senior Software Engineer - UI
Servicenow 4.7
Senior staff engineer job at ServiceNow
It all started in sunny San Diego, California in 2004 when a visionary engineer, Fred Luddy, saw the potential to transform how we work. Fast forward to today - ServiceNow stands as a global market leader, bringing innovative AI-enhanced technology to over 8,100 customers, including 85% of the Fortune 500 . Our intelligent cloud-based platform seamlessly connects people, systems, and processes to empower organizations to find smarter, faster, and better ways to work. But this is just the beginning of our journey. Join us as we pursue our purpose to make the world work better for everyone. Job Description NOTE: This position requires passing a ServiceNow background screening, USFedPASS (US Federal Personnel Authorization Screening Standards). This includes a credit check, criminal/misdemeanor check and taking a drug test. Any employment is contingent upon passing the screening. Due to Federal requirements, only US citizens, US naturalized citizens or US Permanent Residents, holding a green card, will be considered. As a Sr. Software Engineer you will be a member of our Global Cloud Services organization. In this challenging role, you will have the opportunity to build next generation customer facing cloud Observability tools. You will also work cross functionally with multiple teams on the design, architecture and implementation of our Observability platform with the focus on AI powered UX that enables self-service monitoring for our customers. This role requires the candidate to spend 90% of time on UI development and 10% on backend development. What you get to do in this role: Design and develop scalable, maintainable, and reusable software components with a strong emphasis on performance and reliability. Collaborate with product managers to translate requirements into well-architected solutions, owning features from design through delivery Build intuitive and extensible user experiences using modern UI frameworks, ensuring flexibility for customer-specific needs. Contribute to the design and implementation of new products and features while enhancing existing product capabilities. Integrate automated testing into development workflows to ensure consistent quality across releases. Participate in design and code reviews ensuring best practices in performance, maintainability, and testability. Develop comprehensive test strategies covering functional, regression, integration and performance aspects Foster a culture of continuous learning and improvement by sharing best practices in engineering and quality Promote a culture of engineering craftsmanship, knowledge-sharing, and thoughtful quality practices across the team. Develop High-Quality, Scalable, and Reusable Code Using AI-Assisted Tools Write clean, maintainable, and modular code by applying best practices in software architecture and engineering and leverage AI-assisted design and development tools to accelerate implementation and enforce consistency across the codebase. Own the End-to-End Software Development Lifecycle (SDLC) Collaborate closely with product owners to gather detailed requirements and translate them into technical solutions. Drive the full SDLC-from rapid prototyping to design, implementation, testing, and deployment-using AI-powered code generation, testing, and CI/CD tools to ensure speed and quality. Design and implement Observability products and features that are AI-native Embedding intelligent capabilities such as automation, personalization, and predictive insights into the core of the user experience. Act as a mentor to peers and junior engineers by sharing AI/ML and software engineering knowledge through code reviews, design sessions, and technical discussions. Qualifications To be successful in this role you have: Experience in leveraging or critically thinking about how to integrate AI into work processes, decision-making, or problem-solving. This may include using AI-powered tools, automating workflows, analyzing AI-driven insights, or exploring AI's potential impact on the function or industry. Proven experience designing and delivering AI-powered user experiences, including conversation design, LLM integration, prompt engineering, and retrieval-augmented generation (RAG). 1+ years of integrating Copliot/windsurf (or equivalent) 5+ years of experience in software engineering, with a track record of delivering high-quality products + reviews risks with a Bachelor's degree; or 3 years and a Master's degree; or a PhD without experience; or equivalent work experience. Strong knowledge of UX principles (human-centered design, trust, transparency, error recovery) and ability to apply them to autonomous and semi-autonomous AI agents. Deep knowledge of Javscript, AJAX, JSON, HTML, XML, CSS, REST, High charts and associated frameworks Passion for evaluating root causes with LLMs and problem solving, domain expertise preferred Strong skills in Java and related frameworks Strong skills in CI/CD pipelines, containerization (Kubernetes, Docker), and cloud-native deployments using AI-assisted tools Strong in query language - SQL, Prometheus Query Language Preferred: Experience in leveraging or critically thinking about how to integrate AI into work processes, decision-making, or problem-solving. This may include using AI-powered tools, automating workflows, analyzing AI-driven insights, or exploring AI's potential impact on the function or industry. Excellent troubleshooting, debugging, and performance optimization skills in distributed and enterprise environments. Strong collaboration and stakeholder communication skills, with the ability to influence product direction and champion AI-first design principles. Preferred: Hands-on expertise with AI orchestration frameworks and building workflows for agentic or multi-agent systems. Development experiences on the ServiceNow Platform is a big plus. Proficiency in Python, Java, or similar object-oriented languages. Experience with modern front-end frameworks such as Angular, React, or Vue. Strong knowledge of data structures, algorithms, object-oriented design, design patterns, and performance optimization Familiarity with automated testing frameworks (e.g., JUnit, Selenium, TestNG) and integrating tests into CI/CD pipelines Understanding software quality principles including reliability, observability, and production readiness. Ability to troubleshoot complex systems and optimize performance across the stack. Experience with AI-powered tools or workflows, including validation of datasets, model predictions, and inference consistency. Comfort with development tools such as IDEs, debuggers, profilers, source control, and Unix-based systems Why Join Us Build and deliver high-impact software that powers digital experiences for millions of users. Collaborate in a culture that values craftsmanship, quality, and innovation. Work symbiotically with AI and automation tools that enhance engineering excellence and drive product reliability. Be part of a culture that encourages innovation, continuous learning, and shared success. GCS-23 Additional Information Work Personas We approach our distributed world of work with flexibility and trust. Work personas (flexible, remote, or required in office) are categories that are assigned to ServiceNow employees depending on the nature of their work and their assigned work location. Learn more here . To determine eligibility for a work persona, ServiceNow may confirm the distance between your primary residence and the closest ServiceNow office using a third-party service. Equal Opportunity Employer ServiceNow is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, creed, religion, sex, sexual orientation, national origin or nationality, ancestry, age, disability, gender identity or expression, marital status, veteran status, or any other category protected by law. In addition, all qualified applicants with arrest or conviction records will be considered for employment in accordance with legal requirements. Accommodations We strive to create an accessible and inclusive experience for all candidates. If you require a reasonable accommodation to complete any part of the application process, or are unable to use this online application and need an alternative method to apply, please contact [email protected] for assistance. Export Control Regulations For positions requiring access to controlled technology subject to export control regulations, including the U.S. Export Administration Regulations (EAR), ServiceNow may be required to obtain export control approval from government authorities for certain individuals. All employment is contingent upon ServiceNow obtaining any export license or other approval that may be required by relevant export control authorities. From Fortune. ©2025 Fortune Media IP Limited. All rights reserved. Used under license.
$113k-148k yearly est. 2d ago

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Senior Opto-Mechanical Engineer
Applied Materials 4.5
Santa Clara, CA jobs
Applied Materials is a global leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. We design, build and service cutting-edge equipment that helps our customers manufacture display and semiconductor chips - the brains of devices we use every day. As the foundation of the global electronics industry, Applied enables the exciting technologies that literally connect our world - like AI and IoT. If you want to push the boundaries of materials science and engineering to create next generation technology, join us to deliver material innovation that changes the world. You'll benefit from a supportive work culture that encourages you to learn, develop, and grow your career as you take on challenges and drive innovative solutions for our customers. Visit our Careers website to learn more. At Applied Materials, we care about the health and wellbeing of our employees. We're committed to providing programs and support that encourage personal and professional growth and care for you at work, at home, or wherever you may go. Aid in the establishment and management of packaging suppliers and related processes and procedures. Develop test plans and perform laboratory testing on products, packages, and packaging materials. Support the Product Life Cycle (PLC) process by defining Design For Transportability (DFT) requirements and influencing product design. Develop and maintain global packaging standards and specifications for Applied Materials and its Supply Base. Provide advanced training and support to Packaging Engineer III. Duties will vary according to the project in progress and/or the specific goals of the department in which the incumbent works. Demonstrates depth and/or breadth of expertise in own specialized discipline or field May lead functional teams or projects with moderate resource requirements, risk, and/or complexity Impacts the achievement of customer, operational, project or service objectives; work is guided by functional policies At Applied Materials' CTO office, we are developing optical interconnect solutions for the next generation hyperscale computing and AI/ML. You will be working with a highly capable international team to develop advanced photonics packaging solution. You will lead optomechanical design, optical sub-assembly design, micro optics, fixture and tooling development. Those fixtures and tooling are expected to achieve micron level assembly accuracy. You are also expected to design / develop multi-fiber optical connectors and work with external vendors to develop connector eco-system. You are also expected to be familiar with various materials used in photonics industry, including but not limited to: glass, epoxy, silicon and other related materials. You daily activities includes working with 3D solid models, drawings, and documentation utilizing GD&T principles; assessing designs against environmental requirements; With a product focus, the individual will actively partner with other engineering disciplines and operations personnel to develop solutions that adhere to DFT and DFM requirements. D in optics, or mechanical engineering is desired. Industrial experience in optical communication industries is required. You should have expert level knowledge on optomechanical design, Solidworks or ProE, GD&T and ASME 14.5. Understanding of FEA for stress and thermal analysis, ideally understand the use of Ansys Mechanical and Icepak simulation tools Appreciation for Structured Problem Solving Full time Travel: Relocation Eligible: The salary offered to a selected candidate will be based on multiple factors including location, hire grade, job-related knowledge, skills, experience, and with consideration of internal equity of our current team members. In addition to a comprehensive benefits package, candidates may be eligible for other forms of compensation such as participation in a bonus and a stock award program, as applicable. For all sales roles, the posted salary range is the Target Total Cash (TTC) range for the role, which is the sum of base salary and target bonus amount at 100% goal achievement. Applied Materials is an Equal Opportunity Employer. Qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, ancestry, religion, creed, sex, sexual orientation, gender identity, age, disability, veteran or military status, or any other basis prohibited by law. In addition, Applied endeavors to make our careers site accessible to all users. If you would like to contact us regarding accessibility of our website or need assistance completing the application process, please contact us via e-mail at Accommodations_****************, or by calling our HR Direct Help Line at ************, option 1, and following the prompts to speak to an HR Advisor. This contact is for accommodation requests only and cannot be used to inquire about the status of applications.
$127k-164k yearly est. 1d ago
Head of Service Engineering
Applied Materials 4.5
Round Rock, TX jobs
Applied Materials is a global leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. We design, build and service cutting-edge equipment that helps our customers manufacture display and semiconductor chips - the brains of devices we use every day. As the foundation of the global electronics industry, Applied enables the exciting technologies that literally connect our world - like AI and IoT. If you want to push the boundaries of materials science and engineering to create next generation technology, join us to deliver material innovation that changes the world. You'll benefit from a supportive work culture that encourages you to learn, develop, and grow your career as you take on challenges and drive innovative solutions for our customers. Visit our Careers website to learn more. At Applied Materials, we care about the health and wellbeing of our employees. We're committed to providing programs and support that encourage personal and professional growth and care for you at work, at home, or wherever you may go. Forecasts financial, manpower, and operational requirements for key businesses (start up, warranty, service agreements, paid service). Identifies and pursues service agreement business in conjunction with marketing and sales. Manages start ups in terms of time and cost requirements. Manages local inventories and RMA procedure. Manages systems start up and warranty cost under reserve. Ensures customer satisfaction with Company service and system performance. Interviews, hires, and trains customer engineers as necessary to support regional business establishing training and career development plans. Ensures the appropriate safety practices among customer engineers. Escalates system downs according to valid escalation procedure, to ensure earliest possible return to service. Achieves guaranteed up time and other parameters as sold to customers Promotes quality improvement processes to: - drive continuous improvement of technical performance - Responsible for following departmental procedures to safeguard the health, safety and welfare of themselves and those around them who may be affected by their acts or omissions Manages multiple related teams, sets organizational priorities and allocates resources Impacts the business results of a team or area by supporting and funding of projects, products, services and/or technologies and developing policies and plans Guided by business unit, department or sub-functional business plans Influences others internally and externally, including senior management Position requires understanding of Applied Materials global Standards of Business Conduct and compliance with these standards at all times. This includes demonstrating the highest level of ethical conduct reflecting Applied Materials' core values. #Full time Travel: Relocation Eligible: The salary offered to a selected candidate will be based on multiple factors including location, hire grade, job-related knowledge, skills, experience, and with consideration of internal equity of our current team members. In addition to a comprehensive benefits package, candidates may be eligible for other forms of compensation such as participation in a bonus and a stock award program, as applicable. For all sales roles, the posted salary range is the Target Total Cash (TTC) range for the role, which is the sum of base salary and target bonus amount at 100% goal achievement. Applied Materials is an Equal Opportunity Employer. Qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, ancestry, religion, creed, sex, sexual orientation, gender identity, age, disability, veteran or military status, or any other basis prohibited by law. In addition, Applied endeavors to make our careers site accessible to all users. If you would like to contact us regarding accessibility of our website or need assistance completing the application process, please contact us via e-mail at Accommodations_****************, or by calling our HR Direct Help Line at ************, option 1, and following the prompts to speak to an HR Advisor. This contact is for accommodation requests only and cannot be used to inquire about the status of applications.
$105k-135k yearly est. 1d ago
Principal UEFI Firmware Design Engineer
Arm Limited 4.8
San Jose, CA jobs
Arm technology is becoming the platform of choice for compute and AI. The Arm System Engineering team's mission is to architect, design, and develop server and rack-level infrastructure for at-scale datacenter deployments. The team capabilities span across system hardware, software, system interconnect, system management storage, data center infrastructure and performance engineering. The team responsibilities include customer engagements, technology selection, system design, network architecture, performance, and datacenter deployment & operations. The Arm System Engineering team is developing industry-leading technology to deliver innovative and high-performing solutions to power the data centers of the future! Job Overview: We are looking for a Principal UEFI Firmware Design Engineer to lead and drive the development of UEFI firmware across server and rack-scale platforms, primarily targeted for hyperscale data center environments. This role requires deep expertise in UEFI as applied to Servers based on ARM architecture, strong experience with CI/CD development workflows, and a proven track record of collaborating with ODM design partners to deliver high-quality, scalable firmware solutions. You will play a critical role in shaping the architecture, roadmap, and execution of next-generation platform management firmware. Responsibilities: Lead the architecture, design, development, and deployment of UEFI-based firmware for hyperscale server and rack management platforms. Define and drive BMC feature development to meet hyperscaler requirements for reliability, scale, serviceability, and automation. Collaborate closely with ODM partners through all phases of the design and development lifecycle - from concept to mass production-ensuring timely and high-quality firmware deliverables. Guide and support integration of UEFI firmware into CI/CD pipelines, including automated builds, regression testing, static analysis, and deployment workflows. Design and implement robust and scalable firmware interfaces for platform initialization (CPU, Memory, PCIe and interconnects), system firmware security (RoT, Chain-of-trust, Signed FW updates, Secure Boot, etc.), Server RAS, and firmware update infrastructure. Partner with hardware, BMC, security, systems, and validation teams to drive alignment across the entire platform stack. Lead debug efforts on complex hardware/firmware/system issues in lab and production environments. Contribute to the UEFI/EDKII upstream community and drive adoption of industry standards relevant to hyperscale firmware management. Prior experience in UEFI development for ARM Servers is a MUST. Prior development experience in EDK II codebase is a MUST. Prior development experience in AMI Aptio codebase is desired. Required Skills and Experience : Bachelor's or Master's degree or equivalent experience in Electrical Engineering, Computer Engineering, Computer Science, or a related field. 10+ years of hands-on experience in UEFI firmware development, with at least 3 years in a senior or lead engineering role. Strong expertise with UEFI, Tiano and related firmware code structures, and system firmware / software design. Experience leading UEFI firmware solutions in hyperscale environments (e.g., cloud service providers, large-scale data center infrastructure). Proficiency in C/C++, Linux / Windows kernel and userspace development, and scripting languages (Python, Bash). Deep knowledge of cache coherency protocols, DDR memory training concepts, PCIe sub-system for storage, networking, graphics controllers and accelerators. Solid understanding of server and rack-level hardware architecture (e.g., power delivery, thermal control, FRUs, sensors). Knowledge of BIOS-BMC interactions for the purposes of platform initialization, platform RAS, telemetry, firmware updates etc. Proven experience building and maintaining CI/CD pipelines (e.g., Jenkins, GitLab CI, GitHub Actions) for firmware development and validation. Experience with code static analysis tools and vulnerability scanners. Experience with system-level debug tools such as logic analyzers, JTAG, GDB. Extensive experience working with and leading ODM/JDM partners, including technical leadership, reviews, and issue triage. Nice To Have Skills and Experience : Prior contributions to the UEFI/EDK II open-source community. Familiarity with firmware security technologies (secure boot, measured boot, signed images, TPM integration). Exposure to server platform architecture (x86/ARM), PCIe, BMC SoCs, and associated peripherals. Experience with DevOps or cloud-native workflows is a plus. In Return: Be part of a groundbreaking team influencing the next generation of data center systems! Collaborate with premier engineers and vendors to develop industry-leading AI hardware. Access professional growth through sophisticated project involvement and multidisciplinary teamwork. Join a company committed to diversity and inclusion, where your work matters and drives global progress! Salary Range: $253,300-$342,700 per year We value people as individuals and our dedication is to reward people competitively and equitably for the work they do and the skills and experience they bring to Arm. Salary is only one component of Arm's offering. The total reward package will be shared with candidates during the recruitment and selection process. Accommodations at Arm Accommodations contact email: accommodations@arm.com. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process. Hybrid Working at Arm Arm's approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team's needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you. Equal Opportunities at Arm Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don't discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran. #J-18808-Ljbffr
$253.3k-342.7k yearly 1d ago
GPU Design Verification Engineer
Prodapt Solutions Private Limited 3.5
San Jose, CA jobs
Prodapt is a global technology company and the largest specialized player in the Connectedness industry. As an AI-first strategic partner, Prodapt provides consulting, business transformation, and managed services to top telecom and tech enterprises. Prodapt ASIC Services is a leading provider of SoC ASIC/FPGA and Embedded Software services. We offer turnkey solutions, Offshore Design Centers (ODCs), and staff augmentation across key areas like RTL Design, UVM Verification, Emulation, FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up. Our embedded services include firmware, device drivers, RTOS porting, and board bring-up. A “Great Place To Work Certified™” company, Prodapt employs over 6,000 technology and domain experts in 30+ countries. Prodapt is part of The Jhaver Group, which employs over 32,000 people across 80+ locations globally. Prodapt is seeking a highly skilled Design Verification Engineer to focus on functional and performance verification of cutting-edge GPU designs, ensuring they meet stringent quality and specification requirements. In this role, you will develop and execute verification plans, build and maintain UVM-based environments, and collaborate closely with design and architecture teams to drive verification closure on complex GPU blocks and subsystems. 6 month contract Onsite in Austin, TX Responsibilities Develop and execute comprehensive verification plans for GPU designs, including defining verification goals, test strategies, and coverage metrics. Design, develop, and maintain verification testbenches and environments using SystemVerilog, UVM, and C++ to verify GPU functionality, performance, and power-related features. Create complex test scenarios and test cases to achieve comprehensive functional and performance coverage of GPU features and micro-architecture. Analyze simulation and regression results, debug complex GPU designs, identify root causes, and drive bug resolution in collaboration with design and architecture engineers. Work closely with cross-functional teams, including design, architecture, and software, to align verification efforts with project milestones and product requirements. Maintain accurate and up-to-date documentation for verification plans, testbenches, test cases, and results to support traceability and reviews. Requirements Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or a related technical field; or equivalent practical experience. 10+ years of industry experience with a Bachelor's, 8+ years with a Master's, or 6+ years with a PhD in relevant domains of ASIC/SoC/GPU/CPU development. 5+ years of hands-on experience in GPU/CPU design verification or closely related IP/subsystem verification. Strong proficiency in SystemVerilog and UVM for block-level and/or subsystem-level verification. Experience with industry-standard verification tools and simulators (e.g., VCS, Xcelium, Questa, Verdi or similar) and coverage-driven verification flows. Proficiency with scripting languages such as Python and Perl for automation, regression management, and data analysis. Demonstrated strength in debugging, root-cause analysis, and driving verification closure in complex designs. Excellent communication and interpersonal skills, with the ability to work effectively in a collaborative, cross-functional environment. #J-18808-Ljbffr
$125k-166k yearly est. 3d ago
GPU Design Verification Engineer - Onsite Austin (Contract)
Prodapt Solutions Private Limited 3.5
San Jose, CA jobs
A leading technology company is seeking a skilled Design Verification Engineer to focus on functional and performance verification of GPU designs in San Jose, California. This role involves developing verification plans, maintaining UVM-based environments, and collaborating with multiple teams to ensure adherence to specifications. The ideal candidate should have a Bachelor's degree and significant experience in ASIC/SoC/GPU/CPU development, particularly in verification processes. It is a 6-month onsite contract position. #J-18808-Ljbffr
$125k-166k yearly est. 3d ago
Sr. Design Verification Engineer
Prodapt Solutions Private Limited 3.5
San Jose, CA jobs
Prodapt is a global technology company and the largest specialized player in the Connectedness industry. As an AI-first strategic partner, Prodapt provides consulting, business transformation, and managed services to top telecom and tech enterprises. Prodapt ASIC Services is a leading provider of SoC ASIC/FPGA and Embedded Software services. We offer turnkey solutions, Offshore Design Centers (ODCs), and staff augmentation across key areas like RTL Design, UVM Verification, Emulation, FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up. Our embedded services include firmware, device drivers, RTOS porting, and board bring-up. Prodapt is seeking a highly skilled and adaptable engineer to join our dynamic team, focusing on System-on-Chip (SoC) verification. In this role, you will work on complex SoC designs and collaborate with various teams to ensure the successful development and validation of our products. Sunnyvale, CA or Austin, TX 2 year Project Responsibilities Collaborate with cross-functional teams to ensure the effective verification of complex SoC designs. UVM Expertise Develop and maintain scripts using languages like Perl, Python, Unix shells, and Makefiles to automate testing and verification processes. Gain an in-depth understanding of high-speed interfaces, including PCIe, USB, NOC, NVMe, Ethernet, LPDDR5, and HBM2, to ensure seamless integration into complex SoC designs. Collaborate with lab managers to set up and manage the necessary infrastructure for emulation and verification activities. Contribute to the development of comprehensive verification plans, testbenches, and methodologies. Identify and propose improvements to streamline the emulation and verification process. Requirements Bachelor's or higher degree in Electrical Engineering, Computer Science, or a related field. ✔8+yearsof SystemVerilog/UVMexperience (IP,sub-system,or SoClevelverification) ✔Strongscriptingskills (Python,TCL,Perl,Shell)forautomationandtooldevelopment ✔EDAtoolexpertise (VCS,Xcelium,Questa,Verdi,Spyglass,etc.) ✔Experienceindebugging,root-causeanalysis,anddrivingverificationclosure ✔FamiliaritywithCPU/GPUverification,AI/ML,Networking,ormicro-architecturalperformanceverificationisaplus ✔High-speedinterfaceverification (PCIe,DDR,HBM,Ethernet,RoCE)preferred #J-18808-Ljbffr
$125k-166k yearly est. 3d ago
Silicon Design Verification Engineer.
Advanced Micro Devices 4.9
San Jose, CA jobs
WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: As a member of the front-end verification team you will be part of a multi-site team to help drive successful verification execution and prove the functional correctness of the next generation of AMD/Xilinx programmable devices. THE PERSON: You have a passion for digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Collaborate with architects, hardware and firmware engineers to understand the new features to be verified Take ownership of block level verification tasks Define test plans, test benches, and tests using System Verilog and UVM Debug RTL and Gate simulations and work with HW and SW development teams to verify fixes Review functional and code coverage metrics to meet the coverage requirements Develop and improve existing verification flows and environments PREFERRED EXPERIENCE: Strong understanding of computer architecture and logic design Knowledge of Verilog, system Verilog and UVM is a must Strong understanding of state of the art verification techniques, including assertion and constraint-random metric-driven verification Working knowledge of C/C++ and Assembly programming languages Exposure to scripting (python preferred) for post-processing and automation Experience with gate level simulation, power and reset verification ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering or a related field LOCATION: San Jose, CA #LI-DW1 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. #J-18808-Ljbffr
$118k-158k yearly est. 3d ago
Staff Silicon Design Verification Engineer
Advanced Micro Devices 4.9
San Jose, CA jobs
WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next‑generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE Adaptive and Embedded Computing Group (AECG) seeks a Staff Silicon Design Verification Engineer to provide technical leadership and expertise in the verification of high‑speed Crypto, Network‑on‑Chip (NoC), and cutting‑edge DRAM Memory Controller IPs (LPDDR6, HBM4). You will be responsible for architecting, developing, and utilizing simulation and/or formal‑based verification environments at both block and SoC‑level to achieve first‑pass silicon success. THE PERSON The ideal candidate has a proven track record in driving strategies and successfully executing verification strategies for Pre‑Silicon Design IP and/or SOC designs. They should be strong team players with excellent communication and leadership skills, capable of positively and strategically influencing design teams to improve overall product quality. Key Responsibilities Lead the verification of high‑speed Crypto, Network‑on‑Chip (NoC), cutting‑edge DRAM Memory controller (LPDDR6, HBM4) designs, ensuring the highest standards of quality and performance. Architect, develop, and use simulation and/or formal‑based verification environments at IP and SoC‑level. Lead and manage verification teams, including planning, execution, tracking, verification closure, and delivery to programs. Develop and execute comprehensive verification plans, including testbenches and test cases. Collaborate with design, architecture, and software teams to define and implement verification strategies. Utilize advanced verification methodologies, including UVM, formal verification, and assertion‑based verification. Mentor and guide junior engineers, fostering a collaborative and innovative team environment. Preferred Experience Proven track record in technical leadership of teams with 5+ engineers. This includes planning, execution, tracking, verification closure, and delivery to programs. Experience with development of UVM and System Verilog test benches and usage of simulation tools/debug environments such as Synopsys VCS or Cadence Xcelium. Strong understanding of state of the art of verification techniques, including assertion and metric‑driven verification. Experience as a verification architect, establishing the verification methodology, tools and infrastructure for high‑performance IP and/or VLSI designs is a plus. Familiarity with verification management tools as well as an understanding of database management particularly as it pertains to regression management. Experience with formal property checking tools such as VC Formal (Synopsys), JasperGold (Cadence), and Questa Formal (Mentor) is a plus. Experience with gate‑level simulation, power‑aware verification is a plus. Experience with silicon debug at the tester and board level, is a plus. Academic Credentials BS, MS or PhD in Electrical Engineering, Computer Engineering or Computer Science. This role is not eligible for visa sponsorship. #LI-CJ2 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's “Responsible AI Policy” is available here. This posting is for an existing vacancy. #J-18808-Ljbffr
$118k-158k yearly est. 1d ago
Sr. Silicon Design Verification Engineer
Advanced Micro Devices 4.9
San Jose, CA jobs
WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. THE ROLE: Adaptive and Embedded Computing Group (AECG) seeks a Senior Silicon Design Verification Engineer to provide technical leadership and expertise in the verification of high-speed Crypto, Network‑on‑Chip (NoC), and cutting‑edge DRAM Memory Controller IPs (LPDDR6, HBM4). You will be responsible for architecting, developing, and utilizing simulation and/or formal‑based verification environments at both block and SoC‑level to achieve first‑pass silicon success. THE PERSON: The ideal candidate has a proven track record in driving strategies and successfully executing verification strategies for Pre‑Silicon Design IP and/or SOC designs. They should be strong team players with excellent communication and leadership skills, capable of positively and strategically influencing design teams to improve overall product quality. Key Responsibilities: Lead the verification of high‑speed Crypto, Network‑on‑Chip (NoC), cutting‑edge DRAM Memory controller (LPDDR6, DDR5) designs, ensuring the highest standards of quality and performance. Architect, develop, and use simulation and/or formal‑based verification environments at IP and SoC‑level. Lead and manage verification teams, including planning, execution, tracking, verification closure, and delivery to programs. Develop and execute comprehensive verification plans, including testbenches and test cases. Collaborate with design, architecture, and software teams to define and implement verification strategies. Utilize advanced verification methodologies, including UVM, formal verification, and assertion‑based verification. Mentor and guide junior engineers, fostering a collaborative and innovative team environment. PREFERRED EXPERIENCE: Proven track record in technical leadership of teams with 5+ engineers. This includes planning, execution, tracking, verification closure, and delivery to programs. Proven track record on driving strategies and successful verification execution of NoC, Crossbar switches, analysed and verified system‑level Performance and QoS (Quality of Service) requirements. Experience with development of UVM and System Verilog test benches and usage of simulation tools/debug environments such as Synopsys VCS or Cadence Xcelium. Require strong understanding of state of the art of verification techniques, including assertion and coverage‑driven verification. Experience as a verification architect, establishing the verification methodology, tools and infrastructure for high‑performance IP and/or VLSI designs is a plus. Familiarity with verification management tools as well as an understanding of database management particularly as it pertains to regression management. Experience with formal property checking tools such as VC Formal (Synopsys), JasperGold (Cadence), and Questa Formal (Mentor) is a plus. Experience with gate‑level simulation, power‑aware verification is a plus. Experience with silicon debug at the tester and board level, is a plus. ACADEMIC CREDENTIALS: BS, MS or PhD in Electrical Engineering, Computer Engineering or Computer Science. This role is not eligible for visa sponsorship. Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's “Responsible AI Policy” is available here. This posting is for an existing vacancy. #J-18808-Ljbffr
$118k-158k yearly est. 3d ago
Senior Electronics Engineer - Ground Systems Integration Lead
Northrop Grumman Corp. (JP 4.7
San Diego, CA jobs
A leading aerospace and defense company is looking for a Senior Principal Electronics Engineer - Hardware and Software Integration Lead in San Diego. This role involves leading the development of next-generation ground system solutions, managing software supplier interactions, and coordinating various engineering efforts. Candidates should have a strong background in STEM, relevant work experience, and active security clearance. The position requires on-site work but could offer hybrid options in the future. #J-18808-Ljbffr
$92k-121k yearly est. 1d ago
Staff Software Engineer, Site Reliability
Asana 4.6
San Francisco, CA jobs
Asana's rapid growth brings new challenges in keeping our systems fast, reliable, and resilient. As our product evolves, we're making a major investment in reliability - and building a brand new SRE team in Warsaw is a key part of that strategy. This is your chance to help shape it from day one. This isn't a traditional “ops” role - we're looking for strong software engineers who are passionate about building reliable, distributed systems. You'll work closely with a small SRE team in San Francisco, infrastructure engineers in Reykjavik, and an established infrastructure team in Warsaw. Warsaw will be a significant hub for our future infrastructure engineering and operations. As one of the first engineers here, you'll have a real say in how we build reliable infrastructure, manage incidents, and support the rest of the company. This role is based in our Warsaw office with an office‑centric hybrid schedule - in‑office days are Monday, Tuesday, and Thursday. We offer a Contract of Employment (UoP) for our employees in Poland. What you'll do: Influence the future of Asana's SRE practice, especially as we grow the Warsaw team. Lead reliability‑focused projects across our stack - from infrastructure to tooling to incident response. Define and implement Asana's incident management process - we're investing here, and you'll help shape how it works. Build internal platforms and frameworks that help other teams improve the reliability of their services. Be part of (and help shape) a sustainable on‑call rotation - shared across teams in Warsaw, San Francisco, and Reykjavik. On average, we handle ~1 page per day, but it's not constant, and we care about keeping things sane. Work with our stack: AWS, Kubernetes (EKS), Datadog, MySQL (RDS), ElasticSearch (OpenSearch), Redis, DynamoDB, Terraform, TypeScript, Scala, Go, and Python. (Yeah, we know this sounds like buzzword bingo - but we want this post to actually show up in your searches.) About you: You're a strong and experienced software engineer who's comfortable writing and reading code - this isn't an ops role. You care about reliability, scalability, and long‑term maintainability, not just quick fixes. You might have worked as an SRE before - or maybe you were a product engineer who kept getting pulled into infra work because you cared about how systems actually run. You've seen systems at scale (or want to), and you're excited about solving infrastructure problems that have broad impact. You're curious, take initiative, and aren't afraid to work in ambiguous spaces - especially important on a brand new team. You collaborate well across teams and want to help others build more reliable systems. You don't need to know our exact stack, but you're eager to learn whatever it takes to make things better. You demonstrate curiosity about AI tools and emerging technologies, with a willingness to learn and leverage them to enhance productivity, collaboration, or decision‑making. Why this role? Founding team: You'll be one of the first SREs in Warsaw - and a key player in a growing team. Drive real change: This isn't a role where you'll just patch up legacy systems. We are expecting (and supporting) real architectural changes to improve reliability, scalability, and long‑term operability. Big impact: Our product is scaling fast, and reliability is a top company priority. Room to grow: As this team grows, so will your influence - whether you want to lead projects, mentor others, or help shape how we scale. Global collaboration: Work closely with experienced engineers in San Francisco, Reykjavik, and Warsaw, while helping build the future of SRE at Asana. What we offer: Generous, transparent and fair compensation system (base salary and generous Restricted Stock Unit for Asana Inc.). Contract of Employment (with 50% tax deductible costs for author's rights usage for Engineers). Health insurance with dental and travel coverage (Lux Med). Lunch catering on the days that you work from the office. Career growth budget. Home office setup budget. Gym/Fitness reimbursement. Fertility healthcare and family‑forming support with Carrot. Mental health support in Modern Health. Group life insurance. MacBooks with all necessary accessories. For this role, the estimated base salary range is between 23 000 and 33 000 PLN gross monthly on the contract of employment (UoP). The actual base salary will vary based on various factors and individual qualifications objectively assessed during the interview process. The listed range above is a guideline, and the base compensation range for this role may be modified. Our total compensation consists of base salary and equity (RSUs). About us Asana is a leading platform for human + AI collaboration. Millions of teams around the world rely on Asana to achieve their most important goals, faster. Asana has been named to Fortune's Best Workplaces for 7+ years and recognized by Fast Company, Forbes, and Gartner for excellence in workplace culture and innovation. We offer an exceptional office‑centric culture while adopting the best elements of hybrid models to ensure that every one of our global team members can work together effortlessly. With 13+ offices all over the world, we are always looking for individuals who care about building technology that drives positive change in the world and a culture where everyone feels that they belong. Join Asana's Talent Network to stay up to date on job opportunities and life at Asana. #J-18808-Ljbffr
$181k-242k yearly est. 5d ago
Senior Electronics Engineer - Space Systems (SkillBridge)
Northrop Grumman Corp. (Au 4.7
Baltimore, MD jobs
A leading aerospace and defense company in Baltimore is offering a SkillBridge internship for the role of Principal Electronics Engineer. This position involves the design and fabrication of Electrical Ground Support Equipment (EGSE) to support flight hardware testing. Candidates should possess a Bachelor's degree in STEM and relevant experience in hardware design. An Active Secret security clearance is also required for this role. Join us to make an impact in the defense sector. #J-18808-Ljbffr
$90k-116k yearly est. 1d ago
Senior Principal Safety Engineer
Saalex Corp 4.0
Bethesda, MD jobs
Saalex is seeking a Senior Principal Safety Engineers in Bethesda, MD to support NSWC Carderock's requirements for engineering, IT, and technical support for data analysis, software development and modifications, control system development, IT and Information assurance (IA). The work performed will be in support of various projects related to surface ships, submarines, boats and combatant craft, air vehicles, other vehicles going through air and/or water, associated trainers and simulators from any of the above, and IT infrastructure. Senior Principal Safety Engineer provides software and system safety analysis, risk assessment, and safety verification in accordance with DoD policies and procedures. Responsibilities include but not limited to preparation of system/software safety requirements and verification, execution of system/software safety analyses, safety analysis reports, development of software documentation, and planning and performance of software quality evaluation throughout the software development cycle. Position Type: Full-Time Salary:$140k - $206k annually (depending on experience) Work Location:Onsite. Candidates are required to work onsite full-time in Bethesda, MD. Required: Bachelor's Degree from an accredited institution in Computer Science, Software or IT discipline, Engineering, or Mathematics. Desired: Fifteen (15) years of experience with software and system safety analysis, risk assessment, and safety verification in accordance with the requirements of MIL-STD-882E and the Department of Defense (DOD) Joint Software System Safety Engineering Handbook (JSSSEH) on a variety of systems and producing documentation of analysis results. The fifteen (15) years of experience shall include experience in all of the following: Preparation of system/software safety requirements and verification requirements, execution of system/software safety analyses, safety analysis reports and data packages/preparation material for safety review panels (such as Weapons System Evaluation Review Board (WSERBs) and Technical Review Panel (TRP)), preparation of System Safety Program Plans (SSPPs) and System Safety Management Plans (SSMPs), Fly-By-Wire (FBW) Audits, preparation of Safety Assessment Reports (SAR), analysis and assessment of Engineering Change Proposals (ECPs), Software Trouble Reports (STRs), and Software Change Notices (SCNs and development of safety test plans and review of safety test documentation. Development of software documentation that includes preparation of Software Development Plans (SDPs), Software Requirement Specifications (SRSs), Software Configuration. Management Plans (SCMPs), Software Detailed Design Documents (SDDDs), and Interface Design Documents (IDDs); and experience in the planning and performance of software quality evaluation throughout the software development cycle. Providing safety reviews of development and design documentation, as well as hazard analyses for Lithium-Ion battery systems such as the Critical Battery Management System (CBMS). Security Clearance: Active Secret clearance required. Requirements to obtain a clearance include US Citizenship, security investigation, etc. Education/Experience: Bachelor's Degree from an accredited institution in Computer Science, Software or IT discipline, Engineering, or Mathematics. Competitive Compensation: We offer a highly competitive salary package to attract and retain top talent in the industry. Our compensation structure is designed to reward exceptional performance and provide financial stability. Comprehensive Health Coverage: We provide a comprehensive health insurance plan that covers medical, dental, and vision expenses. Our goal is to ensure that our employees have access to quality healthcare and can take care of their well-being. Retirement Savings: We offer a robust retirement savings program, including a 401(k) plan, to help our employees plan for their future. We provide matching contributions to help accelerate their savings and build a solid financial foundation. Work-Life Balance: We believe in the importance of work-life balance and understand that our employees have personal commitments and responsibilities. We offer generous paid time off to support our employees in maintaining a healthy work-life integration. Professional Development: We are committed to the growth and development of our employees. We provide various opportunities for professional development, including training programs, and tuition reimbursement, to help them expand their skills and advance in their careers. Recognition and Rewards: We value the contributions of our employees and believe in recognizing their achievements. We have a robust recognition program in place, including employee appreciation events, and employee recognition awards, to acknowledge and reward exceptional work. Positive and Inclusive Work Environment: We foster a positive and inclusive work environment where diversity is valued, and employees feel respected and empowered. We promote collaboration, open communication, and teamwork to create a supportive atmosphere that enables everyone to thrive. Saalex Solutions, a division of Saalex Corp., is an Engineering and Information Technology Services company with a focus on Test Range Operations and Management, Engineering and Logistics Services, Data Analytics and Business Intelligence Services and Information Technology Services. Founded in 1999 by Travis Mack, Saalex Solutions is a Service Disabled Veteran-Owned and Operated business with prime and subcontract expertise serving the Navy, Army, Air Force, NASA, corporate clients, and local governments. We employ a workforce of over 600 at military and NASA installations nationwide and have offices in Camarillo CA, Rockledge FL, Newport RI, Ridgecrest CA, Corona CA and Keyport WA. Equal Opportunity Employer/Veterans/Disabled Pay Transparency Nondiscriminatory Provision #J-18808-Ljbffr
$140k-206k yearly 2d ago
Principal Solutions Engineering - AI server/rack Infrastructure
Advanced Micro Devices 4.9
Seattle, WA jobs
WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next‑generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE AMD's Data Center Platform Engineering Group (DPEG) is designing, developing, and delivering innovative technology infrastructure enabling the digital world. We create cloud‑enabling server/rack solutions that help the world's leading companies turn their ideas into reality. Our customers are future‑focused and so are we, always a step ahead of the next challenge. As experts in engineering, manufacturing, and supply chain, we're the bridge between problem and solution for the world's leading OEM & ODM partners and cloud services providers. Our customers depend on us to solve their most complex server/rack design needs. Come and join our Data Center Platform Engineering Group where we are building amazing, powered products with amazing people. AMD is searching for a dynamic and experienced Principal Member of Technical Staff to own system design support, rack‑level bring‑up, and critical customer engagement for our cutting‑edge AMD Instinct™ product line. In this high‑visibility role, you will act as the technical bridge between AMD's internal system architects, platform development teams, and our OEM partners. You will not only influence the design and architecture of AI solutions but also lead hands‑on debug and validation efforts at customer locations. As a technical leader, you will drive engineering, root cause analysis, and influence future roadmap stories based on field execution. KEY RESPONSIBILITIES System Architecture & Design Support Solution Optimization: Partner deeply with customers to architect and optimize Rack‑Scale AI solution deployments using AMD Instinct GPUs. Design Reviews: Provide support of design reviews for customer platform/rack designs; proactively flag areas for modification to improve quality, performance and competitive advantage. Bring‑Up, Debug & Validation Documentation & Best Practices: Deliver comprehensive technical documentation, best practices, and reference architectures to streamline the adoption and deployment of AMD AI platforms. Hands‑on Engineering: Drive hands‑on rack, platform, and component‑level debug and validation. This includes complex stress testing, issue reproductions, and deep‑dive root cause analysis. Issue Resolution: Lead customer issue resolution efforts, gathering diagnostics, managing critical escalations, and driving long‑term process improvements to ensure customer success. System Firmware Debug & Deployment: Lead debug efforts for system firmware (BIOS, BMC) during initial bring‑up and large‑scale deployment phases. Ensure seamless integration between hardware, firmware, and software stacks, and resolve interaction issues in customer environments. End‑Customer Debug & Sustaining: Own the technical support interface for end customers, provide high‑level engineering for deployed fleets. Leadership & Strategy Cross‑Functional Alignment: Represent debug progress, technical insights, and status with clarity and impact at the leadership level, ensuring alignment and accountability across cross‑functional teams. Roadmap Influence: Provide regular, detailed technical feedback from the field to directly influence AMD's software and hardware roadmaps. Future Architecture: Drive future product architecture decisions by leveraging unique insights gained from deep customer execution engagement. Mentorship: Build a culture of ownership, accountability, and technical excellence within the team, while actively mentoring senior engineers and emerging technical leaders. PREFERRED EXPERIENCE Advanced experience in system architecture, hardware/firmware debug, and customer‑facing engineering roles (HPC or AI/ML focus preferred). Deep understanding of Server/Rack system architecture (x86, GPU, PCIe, Interconnects). Strong proficiency in System Firmware (BIOS/UEFI, BMC/OpenBMC) debug, update flows, and deployment strategies. Experience with system bring‑up and debugging tools (oscilloscopes, logic analyzers, ITP, JTAG). Knowledge of power delivery, thermal management, and mechanical form factors in datacenter environments. Leadership: Proven track record of leading technical teams through complex problem‑solving scenarios and interacting with executive leadership. Travel: Ability to travel to customer, factory and company locations. ACADEMIC CREDENTIALS Bachelors, Masters, or PhD in Electrical Engineering, Computer Engineering, or Computer Science. LOCATIONS Seattle, WA.; Austin, TX.; Secaucus, NJ.; Santa Clara, CA. This role does not support visa sponsorship. #LI-CB1 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's “Responsible AI Policy” is available here. This posting is for an existing vacancy. #J-18808-Ljbffr
$123k-159k yearly est. 1d ago
Onsite Bethesda: Senior Principal Safety Engineer - DoD Systems
Saalex Corp 4.0
Bethesda, MD jobs
A technology services company in Bethesda, MD is seeking a Senior Principal Safety Engineer to lead software and system safety analysis. Candidates must have at least 15 years of relevant experience and a Bachelor's Degree in a related field. The role involves preparing safety requirements, conducting risk assessments, and developing documentation per DoD standards. A competitive salary package and comprehensive benefits are available, promoting a healthy work-life balance and professional development opportunities. #J-18808-Ljbffr
$103k-151k yearly est. 2d ago
Principal Mechanical Engineer - Robotics Subsystems Lead
Boston Dynamics, Inc. 4.4
Waltham, MA jobs
A leading robotics company in Waltham is seeking a Principal Mechanical Engineer for its Spot robot team. You will lead cross-functional teams to develop and implement complex robotic subsystems. The ideal candidate must hold a BSME with at least 10 years of relevant experience, including advanced skills in CATIA and strong technical writing. This position offers a competitive salary range and generous benefits including medical, dental, vision, 401(k), and paid time off. #J-18808-Ljbffr
$110k-143k yearly est. 5d ago
Hardware Engineer, Principal
MacOm 4.5
Newport Beach, CA jobs
MACOM designs and manufactures semiconductor products for Data Center, Telecommunication, and Industrial and Defense applications. Headquartered in Lowell, Massachusetts, MACOM has design centers and sales offices throughout North America, Europe, and Asia. MACOM is certified to the ISO9001 international quality standard and ISO14001 environmental management standard. MACOM has more than 75 years of application expertise with multiple design centers, Si, GaAs, and InP fabrication, manufacturing, assembly, and test, and operational facilities throughout North America, Europe, and Asia. View our facilities at ********************** In addition, MACOM offers foundry services that represent a key core competency within our business. MACOM sells and distributes products globally via a sales channel comprised of a direct field sales force, authorized sales representatives, and leading industry distributors. Our sales team is trained across all of our products to give our customers insights into our entire portfolio. Hardware Engineer, Principal Job Description The Hardware Engineer, Principal designs, develops, and documents complex interconnect solutions for internal hardware needs as well as for customer hardware reference designs, identifies techniques and methodologies for modeling and measurement of devices and systems and actively participates in the evaluations of these. The interconnect solution may comprise multiple boards. The Hardware Engineer, Principal drives feasibility analyses at onset of PCB (printed circuit board) definition phase, evaluates and specifies electrical characteristics and performance of the PCB to determine compliance to appropriate regulating standards, and takes cradle-to-grave ownership of PCB according to requirements. Collects inputs from users of the PCB, including but not limited to, validation engineer, product engineer, IC design engineer, signal integrity engineer, etc. Draft a BRD (Board Required Document) / Block Diagram to clearly define what is expected of the board & review it. Consults with designers, application engineers for component selection and circuit around the device under test. Designs complex circuits as required. Captures schematic using EDA tool such as xDxDesigner. Creates electrical symbols and layout footprints for new components. Creates Bill of Material (BOM). Maintains CAD library. Creates layout of the board using EDA tools such as Siemens PADS. Interacts with external vendors as necessary. Performs Power Integrity of assigned boards using PI Analysis tools such as HyperLynx Power Integrity. Performs Signal Integrity simulations and analysis of assigned boards using tools such as Ansys SiWave or HFSS. Collaborates with PCB layout engineers to optimize routing for high-speed signals. Develops and validates models for transmission lines, connectors, vias, and IC packages. Conducts pre- and post-layout SI analysis to ensure compliance with design specifications. Supports design reviews and provides recommendations for signal integrity improvements. Works closely with cross-functional teams including electrical, mechanical, and firmware engineers. Performs lab measurements using oscilloscopes, VNAs, and TDRs to correlate with simulation results. Documents analysis results and presents findings to engineering leadership. Creates documentation for PCB fabrication and works with PCB vendors to resolve issues during manufacturing. Prepares Bonding Diagram for high-speed Optical interface and Chip on Board devices. Creates high-speed board design rules for automation and to speed up the Layout design time and effort. Organizes and drives board design reviews for assigned projects. Drives PCB verification and debug (board bring-up) covering both board functionality and performance. Provides mentorship to junior members of the team. Job Requirements PhD with 4 or more years of experience or MSEE with 6 or more years of experience or BSEE with 8 or more years of experience. 6 or more years of experience/knowledge in schematic capture, PCB Design and layout using CAD tools such as xDxDesigner, PADS, HyperLynx, Siwave, and HFSS. Strong understanding of transmission line theory, impedance control, crosstalk, and jitter. Proficiency in SI simulation tools and lab equipment. Experience with high-speed interfaces such as PCIe, DDR, USB, Ethernet, etc. Experience with CAD Library creation/maintenance is a plus. Extensive knowledge on Board Design for manufacturing (DFM), PCB Fab Process. Extensive experience with lab equipment including VNAs, BERTs. Knowledge on firmware development and microcontrollers is a plus. Excellent problem-solving and communication skills. The Salary Range for this position is $97,900 - $166,600. Actual salary offered to candidates will depend on several factors, including but not limited to, work location, relevant candidates' experience, education, and specific knowledge, skills, and abilities. EEO: MACOM is an Equal Opportunity Employer committed to a diverse workforce. MACOM will not discriminate against any worker or job applicant on the basis of race, color, religion, sex, gender identity, sexual orientation, national origin, age, disability, genetic information, veteran status, military service, marital status, or any other category protected under applicable law. Reasonable Accommodation: MACOM is committed to working with and providing reasonable accommodations to qualified individuals with physical and mental disabilities. If you have a disability and are in need of a reasonable accommodation with respect to any part of the application process, please call *************** or email HR_*************. Provide your name, phone number, and the position title and location in which you are interested, and the nature of accommodation needed, and we will get back to you. We also work with current employees who request or need reasonable accommodation in order to perform the essential functions of their jobs. Benefits Health, dental, and vision insurance. Employer-sponsored 401(k) plan. Paid time off. Professional development opportunities. #J-18808-Ljbffr
$97.9k-166.6k yearly 2d ago
Principal ML Engineer: LLMs & Production at Scale
Workday, Inc. 4.8
Seattle, WA jobs
A leading tech company in Seattle is looking for a Principal Machine Learning Engineer to enhance AI-powered contract intelligence solutions. The candidate should have over 10 years of experience in building machine learning products and at least 4 years in ML frameworks such as Pytorch and TensorFlow. This role offers a hybrid work environment promoting flexibility, teamwork, and professional growth, backed by comprehensive compensation and benefits. #J-18808-Ljbffr
$127k-164k yearly est. 1d ago
Senior Field Service Engineer - Hardware & Linux Systems
Cadence Design Systems 4.7
San Jose, CA jobs
A leading electronic design automation company is seeking a Principal Field Service Engineer to install, troubleshoot, and maintain hardware systems. This role is crucial for supporting the Atlanta data center and other locations, requiring excellent problem-solving and communication skills. Candidates should have at least 7 years of experience in a relevant field and be willing to travel. Full training provided, and experience in networking and scripting is advantageous. #J-18808-Ljbffr
$109k-144k yearly est. 3d ago