How to find a job with FPGA skills

1. FPGA Embedded Design, Part 2 - Basic FPGA Training

4.5

(208)

It's time to get your hands on an actual FPGA! In this second part of the FPGA Embedded Design series, we'll get our hands on an actual FPGA to bring our designs to life. We'll use an FPGA development board from Terasic. We'll program a Cyclone V FPGA from Altera/Intel, using their development suite Quartus Prime. This course consists of two main parts: Foundations of FPGAs, where we'll cover the essentials of FPGAs, how they work, what they can and cannot do. Hands-On Training, where we'll design some simple hardware and download it into an FPGA development board. No purchases are required for this second part, but it sure helps to have your own board to follow along, and keep on tinkering in the future with this new superpower. What are you waiting for? Let's have some fun!!!...

2. FPGA Design for Embedded Systems

The objective of this course is to acquire proficiency with Field Programmable Gate Arrays (FPGA)s for the purpose of creating prototypes or products for a variety of applications. Although FPGA design can be a complex topic, we will introduce it so that, with a little bit of effort, the basic concepts will be easily learned, while also providing a challenge for the more experienced designer. We will explore complexities, capabilities and trends of Field Programmable Gate Arrays (FPGA) and Complex Programmable Logic Devices (CPLD). Conception, design, implementation, and debugging skills will be practiced. We will learn specifics around embedded IP and processor cores, including tradeoffs between implementing versus acquiring IP. Projects will involve the latest software and FPGA development tools and hardware platforms to help develop a broad perspective of the capabilities of various Programmable SoC solutions. Topics include:\n\nVerilog, VHDL, and RTL design for FPGA and CPLD architectures\n\nFPGA development tools flow: specify, synthesize, simulate, compile, program and debug\n\nConfigurable embedded processors and embedded software\n\nUse of soft-core and hard-core processors and OS options\n\nFPGA System engineering, software-hardware integration, and testing\n\nIP development and incorporating 3rd-party IP\n\nThe capstone course will give the learner the opportunity to practice and implement the concepts covered by building FPGA systems based on low cost evaluation boards...

3. Program an Fpga for someone that has no Fpga experience

4.2

(94)

This 3 ½ hour video course is divided into sections showing 16 hardware code routines. To see the routines working, you will need a $30.00 fpga trainer board. The last lesson in  this course will show you where to buy the trainer board. You will also need to download a free software tool called the -Xilinx ISE- so you can write and test hardware code routines on your computer. If you take the hardware code for a digital circuit part and program it into an fpga, the hardware code will configure the circuit into the fpga. The best thing about an fpga is, a whole circuit board full of digital parts can be programmed into one fpga. This technology is very important and I want to show you how it is done. Reading a book is not the easiest way to learn how to program an fpga. A better way is to view step by step explanation videos. Digital circuit boards today using an fpga are less expensive, contain fewer parts, and the design process takes less time. Because hardware coding is different than conventional programming, examining working code routines is a better way to learn how to program an fpga. I have put together 16 different hardware code routines. Each routine is explained in a video lesson. Because hardware code routines can be very difficult to understand, each routine is explained by me in detail. After explaining the code, you will see a video of me testing the code on the fpga trainer board. Your computer's usb plug and cable sends the programming code to the fpga trainer board. It is a long process to learn how to program an fpga, but your effort will be rewarded if you stick with the course. When you end this course you will be one of the very few who know how to program an fpga. If you have any trouble understanding this course, or you have trouble downloading the -Xilinx ISE- or anything else, I will be glad to help you. I learned a lot making this course, I think you will too...

4. FPGA Design and VHDL

3.9

(277)

A course designed to teach the candidate the concepts of digital systems design using FPGAs. The design is taught using a Hardware Description Language (HDL) called as VHDL. The course will discuss in-depth all the components of VHDL and how different language constructs help us in designing hardware. The course will then give the student an option of doing real hardware experiments remotely or perform simulation experiments using the software that is available to download from the internet...

5. FPGA Design with MATLAB & Simulink

4.6

(176)

This Course will let you know about How to Design FPGA based Signal Processing Projects on MATLAB/Simulink. This course is on Designing FPGA based Signal Processing Projects with MATLAB/Simulink and FPGA Design Tool (Xilinx VIVADO/ISE), we are going to use Xilinx System Generator (interface between MATLAB/Simulink and VIVADO/ISE) and HDL Coder. From this two tools we can design our projects on traditional MATLAB/Sumilink design flow; using Blocks and integrating blocks in Simulink or using MATLAB codes and finally converting this two types of design in to HDL or into Bitstream so we can program FPGA from MATLAB/Simulink or VIVADO/ISE. We have session on FIR, IIR, LMS Filter Design and OFDM Modulation algorithm implementation on FPGA. MATLAB & Simulink are the best tools for Signal Processing Projects, while FPGA are best hardware platform for such type of Signal Processing Projects cause of it's flexibility and processing capabilities...

6. Introduction to FPGA Design for Embedded Systems

This course can also be taken for academic credit as ECEA 5360, part of CU Boulder’s Master of Science in Electrical Engineering degree. Programmable Logic has become more and more common as a core technology used to build electronic systems. By integrating soft-core or hardcore processors, these devices have become complete systems on a chip, steadily displacing general purpose processors and ASICs. In particular, high performance systems are now almost always implemented with FPGAs. This course will give you the foundation for FPGA design in Embedded Systems along with practical design skills. You will learn what an FPGA is and how this technology was developed, how to select the best FPGA architecture for a given application, how to use state of the art software tools for FPGA development, and solve critical digital design problems using FPGAs. You use FPGA development tools to complete several example designs, including a custom processor. If you are thinking of a career in Electronics Design or an engineer looking at a career change, this is a great course to enhance your career opportunities. Hardware Requirements: You must have access to computer resources to run the development tools, a PC running either Windows 7, 8, or 10 or a recent Linux OS which must be RHEL 6.5 or CentOS Linux 6.5 or later. Either Linux OS could be run as a virtual machine under Windows 8 or 10. The tools do not run on Apple Mac computers. Whatever the OS, the computer must have at least 8 GB of RAM. Most new laptops will have this, or it may be possible to upgrade the memory...

7. Effective Verilog Learning with Intel FPGAs

4

(70)

This course is designed to make students confident developer of Digital Systems using Verilog and Intel FPGAs(2 different boards and FPGAs). Every aspect is discussed from different angles, so that whole concept becomes clear. This course uses two cheap Intel FPGAs development boards and freely available software(Quartus Lite , ModelSim). Purchasing of boards is absolutely optional. This course can be done without development boards. Additionally FPGAs and tool chains from other vendors are also introduced briefly...

8. Developing FPGA-accelerated cloud applications with SDAccel: Practice

This course is for anyone passionate about learning how to develop FPGA-accelerated applications with SDAccel! The more general purpose you are, the more flexible you are and the more kinds of programs and algorithms you can execute on your underlying computing infrastructure. All of this is terrific, but there is no free food and this is happening, quite often, by losing in efficiency. This course will present several scenarios where the workloads require more performance than can be obtained even by using the fastest CPUs. This scenario is turning cloud and data center architectures toward accelerated computing. Within this course, we are going to show you how to gain benefits by using Xilinx SDAccel to program Amazon EC2 F1 instances. We are going to do this through a working example of an algorithm used in computational biology. The huge amount of data the algorithms need to process and their complexity raised the problem of increasing the amount of computational power needed to perform the computation. In this scenario, hardware accelerators revealed to be effective in achieving a speed-up in the computation while, at the same time, saving power consumption. Among the algorithms used in computational biology, the Smith-Waterman algorithm is a dynamic programming algorithm, guaranteed to find the optimal local alignment between two strings that could be nucleotides or proteins. In the following classes, we present an analysis and successive FPGA-based hardware acceleration of the Smith-Waterman algorithm used to perform pairwise alignment of DNA sequences. Within this context, this course is focusing on distributed, heterogeneous cloud infrastructures, providing you details on how to use Xilinx SDAccel, through working examples, to bring your solutions to life by using the Amazon EC2 F1 instances...

9. FPGA Embedded Design, Part 1 - Verilog

4.6

(922)

Do you feel you've learned enough about microcontrollers? Do you want to learn more embedded application design techniques? How about a technique that will allow you to design high-performance systems the way professional equipment designers do?If you're still interested, this curriculum is for you. The FPGA Embedded Design series will teach you the exquisite art of FPGA design. So what is an FPGA anyway?Before moving on, let me tell you that an FPGA is not a microcontroller. It's not a computer. Well, at least not if you don't want it to be a microcontroller or computer. The simplest explanation of an FPGA I've found is that it's a shape shifter! It's an integrated circuit that will behave as the logic circuit you'd like, and the way of letting it know the desired behavior is, yes, you guessed it, through programming. But you will not do this with a Programming Language, but with a Hardware Description Language! In this course, you'll learn Verilog, which is one of the most widely used Hardware Description Languages (along with VHDL). You'll learn the concurrent paradigm in the Verilog code and how to design digital systems with this powerful language. You'll also learn that there are many purposes of an HDL: System design, simulation, implementation in either a traditional chip, or the popular FPGA alternative. Don't let this opportunity pass. Take the first step into the other side of embedded systems: FPGA Embedded Design...

10. Learn FPGA Design With VHDL (Intel/Altera)

4.6

(203)

Course Audience: This course is aimed at students & engineers who want to get into the field of FPGA development using VHDL. No prior knowledge in VHDL/FPGA is assumed so we will start from the very basics. Students should have a basic knowledge of digital electronics including logic gates and flip-flops. Course Summary: This course covers the VHDL language in detail. In between lectures, we will complete a number of fun projects (please see below) with increasing complexity to consolidate the knowledge we have gained during the course. We will go through how to write Test Benches and we will implement a number of Test Benches to verify the UART project. We cover the Intel Quartus software in detail and also go through how to simulate Test Benches using using ModelSim. Projects (Implemented and Tested On a Cyclone IV Development Board):1. Reading a switch input and driving an LED output2. Simple State Machine which reacts to user input and drives a number of LEDs3. Synchronising and de-bouncing a Switch Input.4. Generating a PWM output.5. Designing a Shift Register.6. 4 Digit 7-Segment display for counting the number of push button activations7. UART module & State machine for echoing back characters received from a PC over RS232Intel Quartus Softare:1. Creating & Compiling a new project 2. Performing pin assignments.3. Basic introduction to Quartus IP Catalogue.4. Using the USB Blaster to program the FPGA via JTAG.5. Using the Quartus Net List Viewer to explore the hardware realisation of your design.6. Making sense of Quartus Fitter Reports to better understand resource allocation.7. Using the Quartus Assignment Editor.8. Overview of Quartus settings, options and optimisations.9. Basic introduction to timing analyser, timing constraints and SDC files. Intel ModelSim Starter Edition Software:1. Creating a new ModelSim Project.2. Writing & compiling Test Benches.3. Running simulations.4. Using the Waveform viewer to analyse results. Course Details: We will start by covering the basics of FPGA hardware. This hardware background is vital and as we learn how to write VHDL, we will also refer back to how our code gets implemented in hardware. In the second section of the course, we will cover the VHDL language in detail. We will cover all the aspects (Signals & Data types, VHDL Keywords & Operators, Concurrent & Sequential statements, Entity & Architecture, Process Block, Generics, Constants & Variables, Records, Component Instantiation, Procedures & Functions, Packages & Libraries and Type Conversions) that are needed to be able to develop complex and advanced FPGA designs. There will be plenty of simple examples to allow you to learn the VHDL language quickly and enable you to confidently write your own code. We will also look at how most of the VHDL language maps to hardware on the actual device. With this strong foundation in the language, we will look at how to build fundamental FPGA blocks starting from Tri-State Drivers, Registers, Comparators, Multiplexers, Shift Registers, Serialisers, RAMs & ROMs and Finite State Machines. We will look at how to code all of the above structures and also explore how these are implemented in real hardware in the FPGA. In the next section, we will look at hierarchical design with VHDL. This design practise is used when creating complex designs having more than one design unit. We will explore this concept from an example to see how design units can be joined together to form a hierarchical design. In the next section we will explore good FPGA design practise. From my experience most beginners in FPGA design make common mistakes and fall into certain traps. Some of these can lead to issues that are very difficult to debug and fix. The idea behind this section is to make you aware of these common pitfalls and explore ways in which we can circumvent these. We will talk about Latches, Generated Clocks, Clock & Data Gating, Benefits of a Register Rich Design, Benefits of Synchronous Design, Dealing With Asynchronous Inputs, Clock Domain Crossing, Designing for Reuse, Signal Initialisation, Synchronising Reset De-assertion, Routing Clocks & Resets and Using PLLs. By this stage, we would have covered a lot of the theory and also completed a number of design projects so you should have the knowledge to create your own FPGA designs independently. We will now cover design verification. This section will explore how to write test benches. We will explore aspects of VHDL coding styles for writing test benches. We will discuss how to perform file IO for creating input vectors and to store output results. We will also discuss self-checking test benches to help automate the test process. In the final section of the course, we will design a UART module controlled by a State machine. We will write VHDL code to implement the UART and state machine from scratch. We will use a hierarchical design approach where we will have a number of design units. We will write test benches for each design unit and perform simulations (using ModelSim) for verification.  We will bring all design units together into our top level VHDL module and do a system level simulation. Next, we will explore how to create & configure a project in Intel Quartus to implement our design on our FPGA development board. We will look at how to do the pin assignments and also very briefly look at applying very basic timing constraints to get our design to pass. We will then test the design on real hardware to make sure our design works as intended...

11. Synthesizable SystemVerilog for an FPGA/RTL Engineer

4.5

(56)

FPGA's are everywhere with their presence in the diverse set of the domain is increasing day by day. SystemVerilog plays the dominant role in the Verification Domain as well as RTL designing. The best part about both of them is once you know SystemVerilog you automatically understand the VHDL and then the capabilities of both worlds can be used to build complex systems. The course focus on the Synthesizable SystemVerilog constructs help to build RTL that can be tested on the FPGA Hardware. The curriculum is framed by analyzing the most common skills required by most of the firms working in this domain. Most of the concepts are explained considering practical real examples to help to build logic. The course illustrates the usage of Modeling style, Blocking and Non-blocking assignments, Synthesizable FSM, Building Memories with Block and Distribute Memory resources, Vivado IP integrator, and Hardware debugging techniques such as ILA and VIO. The course explores FPGA Design flow with the Xilinx Vivado Design suite 2020 along with a discussion on implementation strategies to achieve desired performance. Numerous projects are illustrated in detail to understand the usage of the Verilog constructs to interface real peripheral devices to the FPGA. A separate section on writing Testebench and FPGA architecture further builds an understanding of the FPGA internal resources and steps to perform verification of the design...

12. VHDL course learn from the beginning for FPGA

4.1

(108)

This VHDL Course was made by a professional electronic engineer specializes in FPGA! In this VHDL course you will learn how to write VHDL code for FPGAs/CPLDs development and become a professional FPGA developerNo prior VHDL or FPGA knowledge is needed. This VHDL course is designed from the basic elements you need to know about VHDL code. The VHDL course built in such way that you will learn first about the FPGAs and CPLDs structure so you will have a basic knowledge what are you going to do when you are writing a VHDL code. Students saying: N Venkata Bhaskar: The course is very proper to beginner level in VHDL. you can learn a lot of topics. Excellent explanation and easy to understand examples on FPGA. Umesh kumar Sharma: very well explained... covered all concepts step by step with examples. We will go through all the basic elements of the VHDL codeStarting from the VHDL code structure of a basic code to the structure of more advanced coding. After learning about the structure you will learn about the data types, VHDL basic design units, VHDL advanced design units, VHDL statements format. You will learn about the Clock and Resets of the FPGA and how to use themFPGAs/CPLDs are actual components that receiving real signals from the outside world. Some of them will be synchronized signals that has a clock. You will learn how to use the clocks and the resets to sample new data and create data/communication with the outside world. The course contains over 50 lectures that will teach you the syntax of the VHDL codeIn the end of the VHDL course we will complete together 6 ExercisesYou will learn how to code the VHDL by practice. Starting from the most basic VHDL code with Increasing task difficulty enhances I will show you in these videos how to write the code in the right way. In the end of the VHDL course I will upload the last exercise code to a real FPGA! (with my Xilinx development board)I will also show you in real-time how I can debug the code with a real time debugger which is the Integrated logic analyzer of Xilinx. This VHDL Course was made for all levels by a professional electronic and computer engineer. with a huge experience with FPGAs of all of the companies in the market...

13. Introduction to VHDL for FPGA and ASIC design

4.6

(507)

Twelve lectures, starting from the basics of VHDL, including the entity, architecture, and process.  Explanations of the difference in sequential and concurrent VHDL.  Discussions of good synchronous design methodology.  Demonstrations on how to use the Altera Modelsim and Xilinx Vivado simulators. Six lab projects for hands-on experience, with the instructor showing how he would have done each lab...

14. FPGA Embedded Design, Part 4 - Microprocessor Design

4.2

(95)

It's time to take on a Challenge! How does designing a CPU sound?In this fourth part of the FPGA Embedded Design series, we'll design a CPU from scratch to finally get it up and running on several platforms. We'll write most of the code in the Vivado Design Suite, but you'll have the chance to see it working as well in Quartus Prime, EDA Playground or LabsLand, so you can follow along with your favorite tools. The FPGA boards we'll use are the BASYS3, by Digilent (with a Xilinx FPGA), and the DE0-CV from Terasic (with an Intel FPGA). This course consists of three main parts: Foundations of Computer Architecture, where we'll cover the essentials of CPU design and jargon. Design of our own CPU, where we'll make several design decisions to come up with a soft processor that meets our needs. Hands-On Development, where we'll write the code, simulate and finally get our CPU into an FPGA board. No purchases are required for this part, but it sure helps to have your own board to follow along, and keep on tinkering in the future with your new soft processor. What are you waiting for? Let's have fun designing a CPU!!!...

15. VHDL Circuit Design and FPGAs with VIVADO and MODELSIM

4.2

(67)

In this course, we will teach VHDL circuit design. The fundamental concepts about VHDL circuit design will be provided. In addition, practical examples using FPGA development boards will be provided. Combinational and clocked logic circuit design will be explained by examples. We will use either VIVADO or MODELSIM platform for the simulation and development of VHDL designs. Some of the written codes will be loaded into FPGA cards for demonstration purposes. We use MODELSIM for simulation of the VHDL codes. In VHDL circuit design, good knowledge of signal and variable objects is necessary, and the engineer should know the differences between signal and variable objects very well. The most confusing part between the signal and variable objects is that variable objects are updated immediately whereas update of the signal objects is not immediate. Clock division operation and behavior of the signal and variable objects are explained in details using MODELSIM simulations. The behaviors of the combinational and sequential circuits are clarified using MODELSIM simulations. We use VIVADO platform for simulation and circuit synthesis of the VHDL codes. In fact, it is better to use the MODELSIM platform for simulations and VIVADO platform for circuit synthesis and FPGA programming. We indicate that a VHDL code which can be simulated may not be synthesizable,  and we explain this concept providing examples on VIVADO platform. Through the course, we provide many videos explaining VHDL language for circuit design and use of MODELSIM and VIVADO platforms for simulation and circuit synthesis...

16. SPI Interface in an FPGA in VHDL and Verilog

4.2

(57)

This course will take you through the basics of SPI communication.  I will explain how the interface works, what each signal does, and talk about how master to slave communication is possible.  I then go through both the VHDL and Verilog code for an SPI Master controller and show how to communicate with a peripheral device...

17. Embedded System Design with Xilinx Zynq FPGA and VIVADO

4.2

(185)

Note: Course is updated with HLS Design Lab & Debugging Sessions. Embedded System Design with Xilinx VIVADO Design Suit and Zynq FPGA is targeted for Hardware (FPGA) Design and Embedded enthusiast who want to upgrade and enhance their hardware(FPGA) Design Skills with State of Art Design Tools and FPGA from Xilinx. This course cover from Introduction to VIVADO, Intellectual Property (IP), IP Design Methodology, designing basic embedded system with Vivado and SDK, Creating custom AXI-4 Lite Led Controller IP, Programming Processing System (PS) of Zynq (i. e Zedboard) with Embedded Application projects from SDK , Utilizing Timer API and Debugging Features on SDK for Zynq PS, and Creating Boot Image of the Application Project for SD and QSPI flash of Zynq (ZedBoard). Finally we have included the session on Embedded Design with VIVADO HLS this session includes the HLS Design Methodology, Synthesizing HLS C/C++ Project, Generating RTL/HDL from C/C++ and Exporting C/C++ project in to IP-XACT/ Pcore/Sys Gen Format. So from this course you will able to get design/implementation skills of simple embedded system (Memory Test Application) to complex application design (utilizing Timer, Debugging etc.) and Create Bootable Image file of the application project. For more details please watch the demo video and some Free video of course...

18. VHDL for an FPGA Engineer with Vivado Design Suite

4.1

(190)

FPGA's are everywhere with their presence in the diverse set of the domain is increasing day by day. The two most popular Hardware description languages are VHDL and Verilog each having its unique advantage over the other. The best part about both of them is once you know one of them you automatically understand the other and then the capabilities of both worlds can be used to build complex systems. The course focus on the VHDL language. The curriculum is framed by analyzing the most common skills required by most of the firms working in this domain.  Most of the concepts are explained considering practical real examples to help to build logic. The course illustrates the usage of  Modeling style, Blocking and Non-blocking assignments, Synthesizable FSM, Building Memories with Block and Distribute Memory resources, Vivado IP integrator, and Hardware debugging techniques such as ILA and VIO. The course explores FPGA Design flow with the Xilinx Vivado Design suite along with a discussion on implementation strategies to achieve desired performance. Numerous projects are illustrated in detail to understand the usage of the Verilog constructs to interface real peripheral devices to the FPGA. A separate section on writing Testebench and FPGA architecture further builds an understanding of the FPGA internal resources and steps to perform verification of the design...

19. Embedded Systems Bootcamp: RTOS, IoT, AI, Vision and FPGA

4.7

(276)

No other E-learning content tried linking all digital sciences with embedded systems like we did with this 17 hours content. Starting with FPGA and the VHDL hardware design programming language. specifically from the smallest signal which we call the bit, to building simplified calculation and registration units used in microcontrollers from scratch! And what I mean by scratch is, building it out of basic Logic gates and registers. Then Moving to AVR uC and the famous Arduino, and building it up to run The famous Realtime operating system (RTOS) in order to run Multi-threading based application. Then dialing it up a notch and introducing ESP boards to run IoT applications, establishing communication to Node-red, android devices and learning about remote access control. Closing the whole thing by introducing raspberry pi and Linux. And building up with a basic Python introduction, Neural Networks, before building Embedded Deep learning image processing based models. And all of that is hands on! No plain theory, no philosophical block of texts explaining useless concepts. Getting your hands dirty, is the my main drive here. Hardware Technologies to be taught: FPGARaspberry PIArduinoESP32 (Node MCU)Programming Languages to be taught: C PythonVHDLCommunication and Cloud Technologies to be taught: UARTSPIMQTTNode-RedHivemqTechniques to be taught: Combinational Logic DesignSequential Logic DesignFSMControl UnitsTinker CADDigital and Analog SignalsInterruptsAndroid ControlRemote ControlRTOSSemaphoresMutexesSharing ResourcesQueuesParametrized TasksStructuresLinuxBasics of Artificial IntelligenceNeural Networks Deep Neural NetworksCNN...