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Minimum Qualifications (Education and Experience): Certified Photogrammetrist per ASPRS requirements: A professional who uses photogrammetric technology to extract measurements and make maps and interpret data from images. The Photogrammetrist is responsible for all phases of mapping and other mensuration requirements, which include planning and supervising survey activities for control, specifying photography or other imagery requirements, managing projects for mapping or other mensuration requirements and interpretation. · Six years of experience in photogrammetry, three years of which were in a position of professional responsibility demonstrating professional knowledge and competence. · References from four persons who are holding, or who have held, responsible positions in photogrammetry and have first-hand knowledge of the applicant's professional and personal qualifications. · Declaration of compliance with the Code of Ethics of the ASPRS Certifications: Registration as a Montana Professional Land Surveyor (PLS) is optional. Alternative qualifications include: Any combination of additional related work experience and education equivalent to the minimum qualifications. The Montana Department of Transportation (MDT) is recruiting for a Photogrammetrist Specialist II. This position is an Unmanned Ariel System Photogrammetrist Specialist (I, II) for the Montana Department of Transportation Photogrammetry and Survey Section located in Helena. The position is responsible for collecting, analyzing, and interpretating the geographic information provided by control surveys, aerial photographs, LiDAR, UAV Drone and satellite. Position is also responsible for planning and performing photogrammetric processes to develop engineering design level 3D models including DEM (Digital Elevation Models), DSM (Digital Surface Models) and DTM (Digital Terrain Models) from aerial survey data. The UAV specialist will fly a variety of field missions including Surveying & Mapping, visual inspection and as-built surveys. The position reports directly to the Photogrammetry and Survey Section Supervisor. For a full job description, please contact Shannon Carter, HR Generalist at ************** Benefits of working for MDT and the State of Montana include: · Culture of public service and a commitment to work/life balance · Potential hybrid remote work arrangement available · Health, Dental, and Vision Insurance · Access to Montana Health Centers, low-cost clinics for state employees and their families · State Retirement plan and additional savings opportunities (deferred compensation) · Employees in this position receive overtime compensation or compensatory time for all time in a pay status over 40 hours in a workweek · Paid vacation, sick leave, and holidays · Eligibility for Public Service Student Loan Forgiveness · Benefits apply on first day of employment · Relocation assistance may be offered to the successful candidate at the time of offer For information on the Montana Department of Transportation's mission, vision, and values, please visit our website\: https\://******************************** Required Application Materials: · A resume detailing your qualifications and work history. · A cover letter of no more than two pages addressing your qualifications for the position. Your online application and all required materials must be submitted before midnight on the closing date. Ensure all materials submitted are selected as “Relevant.” If you need an accommodation with the application process, please contact the HR representative listed. The State of Montana has a decentralized human resources (HR) system. Each agency is responsible for its own recruitment and selection. Anyone who needs a reasonable accommodation in the application or hiring process should contact the agency's HR staff identified on the job listing or by dialing the Montana Relay at 711. Montana Job Service Offices also offer services including assistance with submitting an online application. State government does not discriminate based on race, color, national origin, religion, sex, sexual orientation, gender identity or expression, pregnancy, childbirth or medical conditions related to pregnancy or childbirth, age, physical or mental disability, genetic information, marital status, creed, political beliefs or affiliation, veteran status, military service, retaliation, or any other factor not related to merit and qualifications of an employee or applicant.

At d-Matrix, we are focused on unleashing the potential of generative AI to power the transformation of technology. We are at the forefront of software and hardware innovation, pushing the boundaries of what is possible. Our culture is one of respect and collaboration. We value humility and believe in direct communication. Our team is inclusive, and our differing perspectives allow for better solutions. We are seeking individuals passionate about tackling challenges and are driven by execution. Ready to come find your playground? Together, we can help shape the endless possibilities of AI. Location: Hybrid, working onsite at our Santa Clara, Ca headquarters 3-5 days per week OR fully remote. The Role: Compiler Architect As a hands-on Software Compiler Architect focused on cloud-based AI inference, you will drive the design and implementation of a scalable MLIR-based compiler framework optimized for deploying large-scale NLP and transformer models in cloud environments. You will architect the end-to-end software pipeline that translates high-level AI models into efficient, low-latency executables on a distributed, multi-chiplet hardware platform featuring heterogeneous compute elements such as in-memory tensor processors, vector engines, and hierarchical memory. Your compiler designs will enable dynamic partitioning, scheduling, and deployment of inference workloads across a cloud-scale infrastructure, supporting both statically compiled and runtime-optimized execution paths. You will focus on compiler strategies that minimize inference latency, maximize throughput, and efficiently utilize compute and memory resources in data center environments, in addition to your work on developing the compiler. You will collaborate cross-functionally with systems architects, ML framework teams, runtime developers, performance engineers, and cloud orchestration groups to ensure seamless integration and optimized inference delivery at scale. What you will do: Architect the MLIR-based compiler for cloud inference workloads, focusing on efficient mapping of large-scale AI models (e.g., LLMs, Transformers, Torch-MLIR) onto distributed compute and memory hierarchies. Lead the development of compiler passes for model partitioning, operator fusion, tensor layout optimization, memory tiling, and latency-aware scheduling. Design support for hybrid offline/online compilation and deployment flows with runtime-aware mapping, allowing for adaptive resource utilization and load balancing in cloud scenarios. Define compiler abstractions that interoperate efficiently with runtime systems, orchestration layers, and cloud deployment frameworks. Drive scalability, reproducibility, and performance through well-designed IR transformations and distributed execution strategies. Mentor and guide a team of compiler engineers to deliver high-performance inference-optimized software stacks. What you will bring: BS 15+ Yrs / MS 12+ Yrs / PhD 10+ Yrs Computer Science or Electrical Engineering, with 12+ years of experience in Front End Compiler and systems software development, with a focus on ML inference. Deep experience in designing or leading compiler efforts using MLIR, LLVM, Torch-MLIR, or similar frameworks. Strong understanding of model optimization for inference: quantization, fusion, tensor layout transformation, memory hierarchy utilization, and scheduling. Expertise in deploying ML models to heterogeneous compute environments, with specific attention to latency, throughput, and resource scaling in cloud systems. Proven track record working with AI frameworks (e.g., PyTorch, TensorFlow), ONNX, and hardware backends. Experience with cloud infrastructure, including resource provisioning, distributed execution, and profiling tools. Preferred Qualifications: Experience targeting inference accelerators (AI ASICs, FPGAs, GPUs) in cloud-scale deployments. Knowledge of cloud deployment orchestration (e.g., Kubernetes, containerized AI workloads). Strong leadership skills with experience mentoring teams and collaborating with large-scale software and hardware organizations. Excellent written and verbal communication; capable of presenting complex compiler architectures and trade-offs to both technical and executive stakeholders. This role is a cornerstone of our cloud AI software strategy. You'll shape the way inference workloads are deployed, optimized, and scaled across data center infrastructure. Equal Opportunity Employment Policy d-Matrix is proud to be an equal opportunity workplace and affirmative action employer. We're committed to fostering an inclusive environment where everyone feels welcomed and empowered to do their best work. We hire the best talent for our teams, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. Our focus is on hiring teammates with humble expertise, kindness, dedication and a willingness to embrace challenges and learn together every day. d-Matrix does not accept resumes or candidate submissions from external agencies. We appreciate the interest and effort of recruitment firms, but we kindly request that individual interested in opportunities with d-Matrix apply directly through our official channels. This approach allows us to streamline our hiring processes and maintain a consistent and fair evaluation of al applicants. Thank you for your understanding and cooperation.

Ventana is building the highest-performance RISC-V CPUs on the planet-designed for data center, AI, and edge workloads, with real silicon, not slideware. Our second-generation Veyron core (V2) is on track to ship early next year, featuring an aggressive wide-issue pipeline and built in 4nm. Development on Veyron V3 is ramping now, with even greater performance and deep AI platform integration. This is your opportunity to work alongside engineers who built iconic processors like the AMD K6 and the first 64-bit ARM server processor (X-Gene at AppliedMicro)-bringing decades of CPU innovation to a clean-slate, open-standards future. You can check us out here: Ventana Micro - YouTube Locations: San Francisco Bay Area, Cupertino, or Fully Remote Position: Compiler Engineer Status: Full time with immediate start Qualifications Required: * 12+ years of software development and debugging with C/C++ * Strong background in compiler theory, algorithms, and optimization techniques * Hands-on development and performance optimization experience with GCC and LLVM compilers, debuggers like GDB, libraries like glibc, binutils and maintenance/upstream contribution of these respective tool chains * Hands-on experience analyzing, running, profiling, and performance optimization of benchmarks like Dhrystone, Coremark, LMBench, STREAM, SPECCPU2017, SPECjbb2015, EEMBC and more in a Linux environment * Hands on experience running, profiling, analyzing system bottlenecks and performance optimization of cloud workloads like Memcached, NGINX, MySQL, Redis, Cassandra, HBase etc. and associated customer workloads and benchmarks in a Linux environment * Linux application and kernel performance optimization - knowledge of perf, oprofile, flame graphs and getting visibility into performance bottlenecks * Experience in competitive benchmarking of workloads across Intel, AMD and ARM64 platforms. * Ability to work independently and across geographies with hardware, software, SQA and product management teams * Excellent problem-solving and debugging skills and good English communications skills, both verbal and writing * Bachelors or Masters degree in computer science or related engineering fields Skills Desired: * Good understanding of CPU architecture, ARM or X86. RISC-V architectural knowledge would be an added plus * Experience in JIT compiler development * Experience working in multi-core, multi-process/thread environment * Knowledge of open-source Linux, git repository maintenance and source code management BASE SALARY RANGE $105,000 TO $260,000 per year EEOE Ventana is an Equal Employment Opportunity Employer. We value diversity and uphold an inclusive environment where all people feel that they are equally respected and valued. Qualified applicants will receive consideration without regard to race, color, creed, religion, sex, sexual orientation, national origin or nationality, ancestry, age, disability, gender identity or expression, marital status, veteran status, or any other category protected by law. COVID-19 Ventana encourages all employees to be fully vaccinated (and boosted, if eligible) against COVID-19. We do require Proof of vaccination (or proof of a negative PCR test) to work in the office or meet with customers/ business partners. NOTICE: External Recruiters/ Staffing Agencies: Ventana Micro instructs agencies not to engage with its employees to present candidates. Employees are not authorized to enter into any agreement regarding the placement of candidates. All unsolicited resumes received as gratuitous submissions. We reserve the right to directly contact any candidate speculatively submitted by a third party. Such contact will not constitute acceptance of any contractual arrangement between Ventana and the agency, and Ventana will not be liable for any fees should it choose to engage the candidate's services. All external recruiters and staffing agencies are required to have a valid contract executed by Ventana's CFO. Please Note: Fraudulent job postings/job scams are increasingly common. Our open positions can be found through the careers page on our website.

About us Mythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications-whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from -40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense. We've raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets. About the role Help push the boundaries of what can run on our accelerator. You'll design compiler IRs and lowering strategies to support algorithmic workloads with irregular or dynamic control flow-loops, branches, and iterative methods-going beyond static neural networks. Working side by side with hardware engineers, you'll influence ISA and execution model co-design to unlock new algorithm classes on analog and digital subsystems. The result: a compiler that makes complex algorithms practical to deploy while staying seamless for developers.Here's what you will do Extend compiler IRs to represent algorithms not easily captured in DNN graphs including control flow and iterative computation Develop compilation strategies that unify analog compute with digital subsystems while maintaining performance and correctness Prototype and optimize algorithms with irregular or dynamic control flow in compiler IRs, applying techniques such as vectorization, predication, and scheduling Collaborate with hardware engineers to co-design ISA and features that improve support for algorithmic workloads Define a roadmap for higher-level programming abstractions that simplify prototyping and accelerate deployment Here's the background we hope you will have 3+ years of professional experience in compilers or high-performance systems software Proficiency in modern C++ (C++14/17/20) and Python Familiarity with compiler IRs (e.g., MLIR, LLVM, or equivalent) and their use representing complex program structures Solid foundation in program analysis and optimization techniques (e.g., SSA form, loop optimizations, vectorization) The following would be nice to have, but is not required Hands-on experience developing MLIR or LLVM dialects for control flow (e.g. scf, cf) or affine/polyhedral representations. Background in compiler-hardware co-design: working with hardware designers to refine ISA or execution models for efficiency Proven ability to prototype irregular or control-flow algorithms in compiler IRs and optimize them for performance and resource constraints Experience extending ML compiler stacks (ONNX, IREE, XLA, PyTorch, TVM) to support workloads beyond DNNs What we offer The opportunity to make algorithmic and control-flow-heavy workloads practical on novel accelerator hardware. A role that bridges compiler design and hardware co-design, shaping both the IR and the accelerator architecture. A collaborative, innovative team that values engineering rigor, continuous integration, and user-focused design. Competitive compensation, equity, and benefits package. At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.

Description Ventana is building the highest-performance RISC-V CPUs on the planet-designed for data center, AI, and edge workloads, with real silicon, not slideware.Our second-generation Veyron core (V2) is on track to ship early next year, featuring an aggressive wide-issue pipeline and built in 4nm. Development on Veyron V3 is ramping now, with even greater performance and deep AI platform integration. This is your opportunity to work alongside engineers who built iconic processors like the AMD K6 and the first 64-bit ARM server processor (X-Gene at AppliedMicro)-bringing decades of CPU innovation to a clean-slate, open-standards future. You can check us out here: Ventana Micro - YouTubeLocations: San Francisco Bay Area, Cupertino, or Fully RemotePosition: Compiler Engineer Status: Full time with immediate start Qualifications Required: 12+ years of software development and debugging with C/C++ Strong background in compiler theory, algorithms, and optimization techniques Hands-on development and performance optimization experience with GCC and LLVM compilers, debuggers like GDB, libraries like glibc, binutils and maintenance/upstream contribution of these respective tool chains Hands-on experience analyzing, running, profiling, and performance optimization of benchmarks like Dhrystone, Coremark, LMBench, STREAM, SPECCPU2017, SPECjbb2015, EEMBC and more in a Linux environment Hands on experience running, profiling, analyzing system bottlenecks and performance optimization of cloud workloads like Memcached, NGINX, MySQL, Redis, Cassandra, HBase etc. and associated customer workloads and benchmarks in a Linux environment Linux application and kernel performance optimization - knowledge of perf, oprofile, flame graphs and getting visibility into performance bottlenecks Experience in competitive benchmarking of workloads across Intel, AMD and ARM64 platforms. Ability to work independently and across geographies with hardware, software, SQA and product management teams Excellent problem-solving and debugging skills and good English communications skills, both verbal and writing Bachelors or Masters degree in computer science or related engineering fields Skills Desired: Good understanding of CPU architecture, ARM or X86. RISC-V architectural knowledge would be an added plus Experience in JIT compiler development Experience working in multi-core, multi-process/thread environment Knowledge of open-source Linux, git repository maintenance and source code management BASE SALARY RANGE $105,000 TO $260,000 per year EEOE Ventana is an Equal Employment Opportunity Employer. We value diversity and uphold an inclusive environment where all people feel that they are equally respected and valued. Qualified applicants will receive consideration without regard to race, color, creed, religion, sex, sexual orientation, national origin or nationality, ancestry, age, disability, gender identity or expression, marital status, veteran status, or any other category protected by law.COVID-19 Ventana encourages all employees to be fully vaccinated (and boosted, if eligible) against COVID-19. We do require Proof of vaccination (or proof of a negative PCR test) to work in the office or meet with customers/ business partners. NOTICE: External Recruiters/ Staffing Agencies: Ventana Micro instructs agencies not to engage with its employees to present candidates. Employees are not authorized to enter into any agreement regarding the placement of candidates. All unsolicited resumes received as gratuitous submissions. We reserve the right to directly contact any candidate speculatively submitted by a third party. Such contact will not constitute acceptance of any contractual arrangement between Ventana and the agency, and Ventana will not be liable for any fees should it choose to engage the candidate's services. All external recruiters and staffing agencies are required to have a valid contract executed by Ventana's CFO.Please Note: Fraudulent job postings/job scams are increasingly common. Our open positions can be found through the careers page on our website.

Kernelize builds compiler backends for AI accelerators to enable and optimize Triton kernels for broad adoption for ML training and inference. We bridge the gap (disconnect) between AI optimizers and HW vendors' custom AI accelerators through Triton. We're focused on building custom backends for IP accelerators on Triton, and I need someone who's passionate about low-level optimizations, code generation, and pushing performance to the next level. This is a chance to work on cutting-edge compiler technologies and help shape the core of our tech from the ground up. The actual offer, reflecting the total compensation package and benefits, will be at the company's sole discretion and determined by a myriad of factors, including, but not limited to, years of experience, depth of skills, and other relevant business considerations. The company also reserves the right to amend or modify employee perks and benefits. At Kernelize we consider several factors when setting each role's salary range, including the competitive benchmarking data for the market and geographic location. As this is a flexible role that must be performed remotely, this means that the salary range will vary based on geographic location. Please note that individual pay will be set within this salary range based on location as well as skills and experience related to the job. Kernelize is an Equal Employment Opportunity Employer. Qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender perception or identity, national origin, age, marital status, protected veteran status, or disability status.

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > Compiler Toolchain Software Minimum Qualifications: * Bachelor's degree in Computer Science, Engineering, Electrical Engineering, or related field and 4+ years of Software Engineering, Systems Engineering, or related work experience. OR Master's degree in Computer Science, Engineering, Electrical Engineering, or related field and 3+ years of Software Engineering, Systems Engineering, or related work experience. OR PhD in Computer Science, Engineering, Electrical Engineering, or related field and 2+ years of Software Engineering, Systems Engineering, or related work experience. * 2+ years of any combination of academic and/or work experience with compiler or tools. Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification. Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. Pay range and Other Compensation & Benefits: $141,600.00 - $212,400.00 The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer - and you can review more details about our US benefits at this link. If you would like more information about this role, please contact Qualcomm Careers.

At d-Matrix, we are focused on unleashing the potential of generative AI to power the transformation of technology. We are at the forefront of software and hardware innovation, pushing the boundaries of what is possible. Our culture is one of respect and collaboration. We value humility and believe in direct communication. Our team is inclusive, and our differing perspectives allow for better solutions. We are seeking individuals passionate about tackling challenges and are driven by execution. Ready to come find your playground? Together, we can help shape the endless possibilities of AI. Location: Hybrid, working onsite at our Santa Clara, Ca headquarters 3-5 days per week OR fully remote. The Role: Compiler Architect As a hands-on Software Compiler Architect focused on cloud-based AI inference, you will drive the design and implementation of a scalable MLIR-based compiler framework optimized for deploying large-scale NLP and transformer models in cloud environments. You will architect the end-to-end software pipeline that translates high-level AI models into efficient, low-latency executables on a distributed, multi-chiplet hardware platform featuring heterogeneous compute elements such as in-memory tensor processors, vector engines, and hierarchical memory. Your compiler designs will enable dynamic partitioning, scheduling, and deployment of inference workloads across a cloud-scale infrastructure, supporting both statically compiled and runtime-optimized execution paths. You will focus on compiler strategies that minimize inference latency, maximize throughput, and efficiently utilize compute and memory resources in data center environments, in addition to your work on developing the compiler. You will collaborate cross-functionally with systems architects, ML framework teams, runtime developers, performance engineers, and cloud orchestration groups to ensure seamless integration and optimized inference delivery at scale. What you will do: * Architect the MLIR-based compiler for cloud inference workloads, focusing on efficient mapping of large-scale AI models (e.g., LLMs, Transformers, Torch-MLIR) onto distributed compute and memory hierarchies. * Lead the development of compiler passes for model partitioning, operator fusion, tensor layout optimization, memory tiling, and latency-aware scheduling. * Design support for hybrid offline/online compilation and deployment flows with runtime-aware mapping, allowing for adaptive resource utilization and load balancing in cloud scenarios. * Define compiler abstractions that interoperate efficiently with runtime systems, orchestration layers, and cloud deployment frameworks. * Drive scalability, reproducibility, and performance through well-designed IR transformations and distributed execution strategies. * Mentor and guide a team of compiler engineers to deliver high-performance inference-optimized software stacks. What you will bring: * BS 15+ Yrs / MS 12+ Yrs / PhD 10+ Yrs Computer Science or Electrical Engineering, with 12+ years of experience in Front End Compiler and systems software development, with a focus on ML inference. * Deep experience in designing or leading compiler efforts using MLIR, LLVM, Torch-MLIR, or similar frameworks. * Strong understanding of model optimization for inference: quantization, fusion, tensor layout transformation, memory hierarchy utilization, and scheduling. * Expertise in deploying ML models to heterogeneous compute environments, with specific attention to latency, throughput, and resource scaling in cloud systems. * Proven track record working with AI frameworks (e.g., PyTorch, TensorFlow), ONNX, and hardware backends. * Experience with cloud infrastructure, including resource provisioning, distributed execution, and profiling tools. Preferred Qualifications: * Experience targeting inference accelerators (AI ASICs, FPGAs, GPUs) in cloud-scale deployments. * Knowledge of cloud deployment orchestration (e.g., Kubernetes, containerized AI workloads). * Strong leadership skills with experience mentoring teams and collaborating with large-scale software and hardware organizations. * Excellent written and verbal communication; capable of presenting complex compiler architectures and trade-offs to both technical and executive stakeholders. This role is a cornerstone of our cloud AI software strategy. You'll shape the way inference workloads are deployed, optimized, and scaled across data center infrastructure. Equal Opportunity Employment Policy d-Matrix is proud to be an equal opportunity workplace and affirmative action employer. We're committed to fostering an inclusive environment where everyone feels welcomed and empowered to do their best work. We hire the best talent for our teams, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. Our focus is on hiring teammates with humble expertise, kindness, dedication and a willingness to embrace challenges and learn together every day. d-Matrix does not accept resumes or candidate submissions from external agencies. We appreciate the interest and effort of recruitment firms, but we kindly request that individual interested in opportunities with d-Matrix apply directly through our official channels. This approach allows us to streamline our hiring processes and maintain a consistent and fair evaluation of al applicants. Thank you for your understanding and cooperation.

Ventana Micro Systems is at the forefront of the two hottest trends that are revolutionizing the semiconductor industry: RISC-V and Chiplet Architecture. Check out our CEO talking with global tech analyst Patrick Moorhead about how Ventana combines the extensibility of RISC-V with chiplet technology to create customer-driven innovation for best-in-class solutions for the data center. Ventana is well-funded and backed by some of the largest strategic investors in the industry with the goal of building best-in-class CPU cores for cloud, enterprise, 5G, and Edge computing. We invite you to join the revolution and contribute to one of the Hottest Semiconductor startups in the industry. Locations: San Francisco Bay Area, Cupertino, or Fully Remote Position: Full time with immediate start Qualifications Required: 12+ years of software development and debugging with C/C++ Strong background in compiler theory, algorithms, and optimization techniques Hands-on development and performance optimization experience with GCC and LLVM compilers, debuggers like GDB, libraries like glibc, binutils and maintenance/upstream contribution of these respective tool chains Hands-on experience analyzing, running, profiling, and performance optimization of benchmarks like Dhrystone, Coremark, LMBench, STREAM, SPECCPU2017, SPECjbb2015, EEMBC and more in a Linux environment Hands on experience running, profiling, analyzing system bottlenecks and performance optimization of cloud workloads like Memcached, NGINX, MySQL, Redis, Cassandra, HBase etc. and associated customer workloads and benchmarks in a Linux environment Linux application and kernel performance optimization - knowledge of perf, oprofile, flame graphs and getting visibility into performance bottlenecks Experience in competitive benchmarking of workloads across Intel, AMD and ARM64 platforms. Ability to work independently and across geographies with hardware, software, SQA and product management teams Excellent problem-solving and debugging skills and good English communications skills, both verbal and writing Bachelors or Masters degree in computer science or related engineering fields Skills Desired: Good understanding of CPU architecture, ARM or X86. RISC-V architectural knowledge would be an added plus Experience in JIT compiler development Experience working in multi-core, multi-process/thread environment Knowledge of open-source Linux, git repository maintenance and source code management BASE SALARY RANGE $105,000 TO $225,000 per year EEOE Ventana is an Equal Employment Opportunity Employer. We value diversity and uphold an inclusive environment where all people feel that they are equally respected and valued. Qualified applicants will receive consideration without regard to race, color, creed, religion, sex, sexual orientation, national origin or nationality, ancestry, age, disability, gender identity or expression, marital status, veteran status, or any other category protected by law. COVID-19 Ventana encourages all employees to be fully vaccinated (and boosted, if eligible) against COVID-19. We do require Proof of vaccination (or proof of a negative PCR test) to work in the office or meet with customers/ business partners. NOTICE: External Recruiters/ Staffing Agencies: Ventana Micro instructs agencies not to engage with its employees to present candidates. Employees are not authorized to enter into any agreement regarding the placement of candidates. All unsolicited resumes received as gratuitous submissions. We reserve the right to directly contact any candidate speculatively submitted by a third party. Such contact will not constitute acceptance of any contractual arrangement between Ventana and the agency, and Ventana will not be liable for any fees should it choose to engage the candidate's services. All external recruiters and staffing agencies are required to have a valid contract executed by Ventana's CFO. Please Note: Fraudulent job postings/job scams are increasingly common. Our open positions can be found through the careers page on our website.

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > GPU ASICS Engineering * Hiring for Santa Clara, San Diego, Austin and Boxborough locations. Open to hire for Remote work as well. As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm GPU Engineer, you may architect, design, implement, verify, and/or optimize the performance and power of GPU cores. Qualcomm Engineers collaborate with cross-functional teams to meet and exceed customer needs Minimum Qualifications: * Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 6+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience. OR Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 5+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience. OR PhD in Computer Engineering, Computer Science, Electrical Engineering, or related field and 4+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience. Preferred Qualifications: * Master's degree or PhD in Computer Engineering, Computer Science, Electrical Engineering, or related field. * 10+ years of compiler experience, or 10+ years of compiler + GPU related experience (e.g., driver or game experience). * 2+ years of work experience in a role requiring interaction with senior leadership (e.g., Director and above). * 1+ year in a technical leadership role with direct reports (only applies to positions with direct reports). Principal Duties and Responsibilities: * Applies GPU knowledge to assist in the architecture, design, implementation, verification, and/or optimization of the performance and power of GPU cores. * Assists in building functional model simulations, developing software, and testing for various graphics to verify correctness. * Programs and runs graphics tests using tools and methods to assess functionality, performance, and power. * Collaborates with team members to guide implementation and ensure alignment with needs and goals. * Assists in the development of driver and compiler software to support GPU products. * Writes technical documentation and feature descriptions for GPU projects. Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification. Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. Pay range and Other Compensation & Benefits: $195,200.00 - $292,800.00 The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer - and you can review more details about our US benefits at this link. If you would like more information about this role, please contact Qualcomm Careers.

At d-Matrix, we are focused on unleashing the potential of generative AI to power the transformation of technology. We are at the forefront of software and hardware innovation, pushing the boundaries of what is possible. Our culture is one of respect and collaboration. We value humility and believe in direct communication. Our team is inclusive, and our differing perspectives allow for better solutions. We are seeking individuals passionate about tackling challenges and are driven by execution. Ready to come find your playground? Together, we can help shape the endless possibilities of AI. Location: Hybrid, working onsite at our Santa Clara, Ca headquarters 3-5 days per week OR fully remote. The Role: Compiler Architect As a hands-on Software Compiler Architect focused on cloud-based AI inference, you will drive the design and implementation of a scalable MLIR-based compiler framework optimized for deploying large-scale NLP and transformer models in cloud environments. You will architect the end-to-end software pipeline that translates high-level AI models into efficient, low-latency executables on a distributed, multi-chiplet hardware platform featuring heterogeneous compute elements such as in-memory tensor processors, vector engines, and hierarchical memory. Your compiler designs will enable dynamic partitioning, scheduling, and deployment of inference workloads across a cloud-scale infrastructure, supporting both statically compiled and runtime-optimized execution paths. You will focus on compiler strategies that minimize inference latency, maximize throughput, and efficiently utilize compute and memory resources in data center environments, in addition to your work on developing the compiler. You will collaborate cross-functionally with systems architects, ML framework teams, runtime developers, performance engineers, and cloud orchestration groups to ensure seamless integration and optimized inference delivery at scale. What you will do: Architect the MLIR-based compiler for cloud inference workloads, focusing on efficient mapping of large-scale AI models (e.g., LLMs, Transformers, Torch-MLIR) onto distributed compute and memory hierarchies. Lead the development of compiler passes for model partitioning, operator fusion, tensor layout optimization, memory tiling, and latency-aware scheduling. Design support for hybrid offline/online compilation and deployment flows with runtime-aware mapping, allowing for adaptive resource utilization and load balancing in cloud scenarios. Define compiler abstractions that interoperate efficiently with runtime systems, orchestration layers, and cloud deployment frameworks. Drive scalability, reproducibility, and performance through well-designed IR transformations and distributed execution strategies. Mentor and guide a team of compiler engineers to deliver high-performance inference-optimized software stacks. What you will bring: BS 15+ Yrs / MS 12+ Yrs / PhD 10+ Yrs Computer Science or Electrical Engineering, with 12+ years of experience in Front End Compiler and systems software development, with a focus on ML inference. Deep experience in designing or leading compiler efforts using MLIR, LLVM, Torch-MLIR, or similar frameworks. Strong understanding of model optimization for inference: quantization, fusion, tensor layout transformation, memory hierarchy utilization, and scheduling. Expertise in deploying ML models to heterogeneous compute environments, with specific attention to latency, throughput, and resource scaling in cloud systems. Proven track record working with AI frameworks (e.g., PyTorch, TensorFlow), ONNX, and hardware backends. Experience with cloud infrastructure, including resource provisioning, distributed execution, and profiling tools. Preferred Qualifications: Experience targeting inference accelerators (AI ASICs, FPGAs, GPUs) in cloud-scale deployments. Knowledge of cloud deployment orchestration (e.g., Kubernetes, containerized AI workloads). Strong leadership skills with experience mentoring teams and collaborating with large-scale software and hardware organizations. Excellent written and verbal communication; capable of presenting complex compiler architectures and trade-offs to both technical and executive stakeholders. This role is a cornerstone of our cloud AI software strategy. You'll shape the way inference workloads are deployed, optimized, and scaled across data center infrastructure. Equal Opportunity Employment Policy d-Matrix is proud to be an equal opportunity workplace and affirmative action employer. We're committed to fostering an inclusive environment where everyone feels welcomed and empowered to do their best work. We hire the best talent for our teams, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. Our focus is on hiring teammates with humble expertise, kindness, dedication and a willingness to embrace challenges and learn together every day. d-Matrix does not accept resumes or candidate submissions from external agencies. We appreciate the interest and effort of recruitment firms, but we kindly request that individual interested in opportunities with d-Matrix apply directly through our official channels. This approach allows us to streamline our hiring processes and maintain a consistent and fair evaluation of al applicants. Thank you for your understanding and cooperation.

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > Machine Learning Engineering General Summary: Lead a team of engineers focused on advancing machine learning compiler technologies for cutting-edge AI accelerators for the Cloud and Datacenter market. This role combines deep technical expertise with strategic leadership to deliver high-performance compiler solutions that enable next-generation AI workloads. Key Responsibilities: Technical Leadership: * Drive innovation in ML compiler optimization algorithms, leveraging advanced mathematics, programming language theory, and modern compiler techniques. * Oversee feature design, code reviews, and integration of compiler components into the AI software stack. * Ensure robust testing, profiling, and performance tuning across diverse ML models and hardware targets. Team & Project Management: * Manage and mentor a team of engineers, fostering technical growth and collaboration. * Plan and execute projects to meet release deliverables, balancing tactical improvements with strategic roadmap goals. * Coordinate cross-functional efforts with hardware, architecture, and AI framework teams. * Strategic Vision: * Shape the evolution of ML compiler technology within the organization, aligning with industry trends and internal product strategies. Minimum Qualifications: * Bachelor's degree in Computer Science, Electrical Engineering, or related field and 10+ years of relevant experience; OR * Master's degree and 8+ years of experience; OR * Ph.D. and 6+ years of experience in compiler development, ML systems, or related areas. Preferred Skills & Experience: * Strong background in compiler design (LLVM, optimization passes, IR transformations). * Expertise in ML frameworks (PyTorch, ONNX) and graph-level optimizations. * Familiarity with ML hardware accelerators, memory hierarchies, and performance modeling. * Solid C++ programming skills * Proven ability to lead teams and deliver complex software projects in fast-paced environments Why Join Us? You'll work on state-of-the-art ML compilers, applying advanced algorithms to optimize AI workloads for next-generation hardware. If you're passionate about pushing the boundaries of compiler technology and leading impactful teams, this is the role for you. Minimum Qualifications: * Bachelor's degree in Computer Science, Engineering, Information Systems, or related field and 6+ years of Hardware Engineering, Software Engineering, Systems Engineering, or related work experience. OR Master's degree in Computer Science, Engineering, Information Systems, or related field and 5+ years of Hardware Engineering, Software Engineering, Systems Engineering, or related work experience. OR PhD in Computer Science, Engineering, Information Systems, or related field and 4+ years of Hardware Engineering, Software Engineering, Systems Engineering, or related work experience. Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification. Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. Pay range and Other Compensation & Benefits: $160,600.00 - $240,800.00 The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer - and you can review more details about our US benefits at this link. If you would like more information about this role, please contact Qualcomm Careers.