Verification engineer work from home jobs

Description Ventana is building the highest-performance RISC-V CPUs on the planet-designed for data center, AI, and edge workloads, with real silicon, not slideware.Our second-generation Veyron core (V2) is on track to ship early next year, featuring an aggressive wide-issue pipeline and built in 4nm. Development on Veyron V3 is ramping now, with even greater performance and deep AI platform integration. This is your opportunity to work alongside engineers who built iconic processors like the AMD K6 and the first 64-bit ARM server processor (X-Gene at AppliedMicro)-bringing decades of CPU innovation to a clean-slate, open-standards future. You can check us out here: Ventana Micro - YouTubePrincipal CPU Design Verification Engineer:We are seeking an experienced verification engineer to lead verification efforts of complex CPU and related subsystems based on the open-source RISC-V architecture. The right candidate will have deep technical expertise combined with exceptional leadership skills.Responsibilities: Lead end-to-end verification from complex CPU sub-units up to CPU clusters, partnering with architecture and design teams Develop verification infrastructure components including test-benches, scoreboards, and stimulus generators Develop and execute comprehensive verification plans for units and features Implement functional coverage models Debug designs in simulation, prototyping platforms, and silicon Continuously drive methodology improvements to improve efficiency Lead senior and junior engineers as a team to accomplish successful projects Minimum Qualifications: Bachelors or Masters degree in electrical, computer engineering or related field BS+10 years or MS+12 years of industry experience successfully delivering CPU implementations Skills & Qualifications Required: SystemVerilog verification development experience Testbench construction using UVM or analogous methodologies Scoreboards and stimulus generators for complex units Strong background in one or more common CPU ISAs. x86, ARM, MIPS, RISC-V, etc. Strong background in processor coherency and MP programming Project ownership throughout the project lifecycle Demonstrated team leadership experience with outstanding communication skills Highly motivated self-starter with strong execution mindset and collaborative approach Post-silicon debug experience strongly preferred BASE SALARY RANGE $105,000 TO $260,000 per year EEOE Ventana is an Equal Employment Opportunity Employer. We value diversity and uphold an inclusive environment where all people feel that they are equally respected and valued. Qualified applicants will receive consideration without regard to race, color, creed, religion, sex, sexual orientation, national origin or nationality, ancestry, age, disability, gender identity or expression, marital status, veteran status, or any other category protected by law.COVID-19 Ventana encourages all employees to be fully vaccinated (and boosted, if eligible) against COVID-19. We do require Proof of vaccination (or proof of a negative PCR test) to work in the office or meet with customers/business partners NOTICE: External Recruiters/ Staffing Agencies: Ventana Micro instructs agencies not to engage with its employees to present candidates. Employees are not authorized to enter into any agreement regarding the placement of candidates. All unsolicited resumes received as gratuitous submissions. We reserve the right to directly contact any candidate speculatively submitted by a third party. Such contact will not constitute acceptance of any contractual arrangement between Ventana and the agency, and Ventana will not be liable for any fees should it choose to engage the candidate's services. All external recruiters and staffing agencies are required to have a valid contract executed by Ventana's CFO.Please Note: Fraudulent job postings/job scams are increasingly common. Our open positions can be found through the careers page on our website.

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering As a leading technology innovator, Qualcomm pushes the boundaries to enable next generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Design Verification Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, validate digital/analog designs and develop a comprehensive validation/verification testbench environment for projects that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions that meet performance, security, technology, and feature requirements. As a Design Verification Engineer, you will work with Chip Architects to validate the concepts of core and sub-system level micro-architectures. You will work on a selected part of the subsystem Design Verification to ensure that it functions to the standards of being launch ready for the end Product. Role and Responsibilities * Work with subsystem and SOC Architects to understand the concepts and high-level system requirements. * Develop detailed Test and Coverage plans based on the Architecture and Micro-architecture. * Develop Verification Methodology, ensuring scalability and portability across environments. * Develop Verification environment, including all the respective components such as Stimulus, Checkers, Monitors Assertions, and Coverpoints. * Develop Verification Plans and Testbenches for your functional domain. * Execute Verification Plans, including Design Bring-up, DV environment Bring-up, Regressions enabling all features under your care, and Debug of the test failures. * Track and report DV progress using a variety of metrics, including Bugs and Coverage. Preferred Qualifications * Deep knowledge of APB/AXI/SPI protocols, handshake mechanisms, cross-clock domains and clock gating. * Solid understand of memory organization, fault-tolerant design, parity schemes, error detection and error correction schemes. * Advance techniques such as: Formal, Assertions, and Silicon bring-up, is helpful. * In-depth knowledge of Micro-processor functions, Network-on-Chip Architectures, and Micro-architectures. * Experience in writing Testplans, portable Testbenches, Transactors, and Assembly code. * Experience with different Verification Methodologies and Tools such as Simulators, Coverage collection, Gate-level Simulation, Waveform viewers, and Mixed signal Verification. * Ability to develop and work independently on a Block/Unit of the design. Qualifications: Minimum Experience Level should be 2+ years in SOC-level or core-level verification with good understanding of debugging either ARM-based or RISC-V based processors, good understanding of APB/AHB/AXI protocols. Must have solid understanding of SV/UVM concepts. Prior experience in any cryptographic algorithm is preferred. Must have basic understand on UNIX commands and Python/Perl scripting Minimum Qualifications: * Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification. Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. Pay range and Other Compensation & Benefits: $140,000.00 - $210,000.00 The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer - and you can review more details about our US benefits at this link. If you would like more information about this role, please contact Qualcomm Careers.

Senior Design Verification Engineer Remote / work from home US Citizen or US Permanent Resident preferred Full-time/employee + Bonus, Benefits, 401k, Stock Options Responsibilities: Develop and execute verification plans for digital designs using SystemVerilog and UVM Create and maintain testbenches, test cases, and test vectors Contribute to the development of novel methodologies and verification techniques Run simulations to verify design against specifications and analyze results, identify issues, and debug designs Implement coverage tracking and metrics Document plans, environments, test cases, and all results for a comprehensive record of all verification strategies Your primary responsibilities will include developing test plans, writing testbenches and tests, and debugging any bugs found with the RTL team. Required Skills & Experience: BSEE/MSEE with 5-15 years of hands-on experience in SoC verification using UVM Experience in Gate Level Simulation (GLS) setup and process corner failure analysis Experience with digital design concepts and ASIC development flow Experience writing and debugging RTL using SystemVerilog Programming experience using C, C++, and/or Python/Perl Ability to work collaboratively across teams and communicate effectively Experience using Synopsys verification tools such as VCS, Verdi, and Spyglass Ability to multi-task and prioritize in a fast-paced environment; managing multiple complex, multidisciplinary tasks and projects Preferred Skills: Experience verifying RISC-V based systems Experience with emulation or FPGA prototyping Experience with formal verification methodologies Experience with the Chisel hardware description language Experience verifying high-speed interfaces such as PCIe and DDR Experience with version control systems (e.g., Git) and Continuous Integration/Continuous Deployment (CI/CD) pipelines

Lattice Overview There is energy here…energy you can feel crackling at any of our international locations. It's an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality. Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you're looking for. Responsibilities & Skills Lattice Semiconductor is seeking a Design Verification Engineer to join the RnD organization. This position is an opportunity to be part of a dynamic team with ample opportunity to contribute, learn and grow. As a Verification Eng., you will work with IP architect to understand IP features, create testbench architecture plan, work with IP designers to develop testplan, perform detailed testing of IP features and ensure coverage is met. You will need to ensure the IP is compatible with industry standard synthesis & simulator tools. You will also co-ordinate with IP designer on IP release mechanism for testing. You are also expected to develop scripts in Python and other script languages to automate the soft IP development and testing process. You will create customer facing collaterals including documents, reports & example code. Key Skills At least 8 years Digital Design Verification Related Experience Bachelor or Masters Degree in Computer Science, Computer Engineering, Electronics and Electrical Engineer Skill in debugging and analyzing complex digital design Experience in HDL and HVL Languages and Methodologies Knowledge in ASIC/FPGA/SoC verification or development cycle Knowledge in simulation tools like Cadence IES/XCELIUM, Synopsys VCS or Mentor's Questa Hands-on experience in Python, Perl or Shell Scripting, TCL and Make. Strong communication, analytical and documentation skills and ability to interface with other groups/site Programming skills (e.g.: C/C++, Perl, TCL or Python) Experience in PCIE protocols Experience in hardware validation and debug is a plus Experience in Functional Safety for IP/FPGA/ASIC development is a strong plus. Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry. Lattice is an international, service-driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 800 strong, shares a total commitment to customer success and an unbending will to win. For more information about how our FPGA, CPLD and programmable power management devices help our customers unlock their innovation, visit ******************** You can also follow us via Twitter, Facebook, or RSS. At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace. Applications are welcome from all qualified candidates. Lattice Feel the energy.

Ethernovia is fundamentally changing how cars of the future are built by unifying in-vehicle networks into an end-to-end Ethernet system. Founded in 2018, we're inventing the future of automobile's communication! We are transforming automobiles' communication network to enable the autonomous driving, electrical vehicle (EV) and software defined revolutions. Our breakthrough compute, communication, and software virtualization ushers in a new era of car connectivity and capabilities. We bring together, accelerate, and unify the car's cameras/sensors, compute, and outside world to enable new advanced driver assistance features and services. Ethernovia's co-founders are serial technology entrepreneurs with multiple prior successful ventures together. We are well-funded and backed by some of the worlds' leading technology investors, having secured $64m in Series A funding. (Ethernovia Raises $64 Million to Accelerate the Revolution of Vehicle Networks | Business Wire). Our financial backers include Porsche SE, Qualcomm, AMD, and Western Digital Ethernovia has been recognized in EE Times' prestigious list of the Top 100 Startups for 2025. January 2024: Our CEO Ramin Shirani Named MotorTrend Software-Defined Vehicle Innovator Awards Winner (ethernovia.com) September 2023: Continental and Ethernovia Announce Partnership to Develop Automotive Switch in 7nm - Ethernovia Connected Car News: Helios, Continental, Ethernovia, Avanci, BMW, Mapbox, Porsche, SEMA, Honda, UltraSense, Flex Logix, Diodes Inc., Garmin, Toyota & Caruso | auto connected car news With talented employees on 4 continents, we have filed > 50 patents to date. Join Ethernovia's team to make a lasting impact on the future of mobility. Come share in our success with pre-IPO shares, competitive compensation, and great benefits while growing your knowledge and career with world class talent. We are looking for talented engineers and leaders who have an entrepreneurial spirit and want to drive their design from concept to silicon to their next car. Senior ASIC Design Verification Engineer Summary: As a Senior ASIC Design Verification Engineer, you will be responsible for all aspects of digital SoC verification. You will work the architects, designers, and SW engineers to plan and execute verification and validation of advanced automotive communication semiconductors and systems. You will contribute to a positive, trusting, and cohesive working environment based on integrity and strong work ethics. This position is located in: United States - Remote Key Qualifications: BS and/or MS in Electrical Engineering, Computer Science, or related field Minimum 10+ years of ASIC verification experience Strong understanding of ASIC verification fundamentals and industry standard methodologies Experience with Verilog/System Verilog, UVM, Python, TCL, C/C++ Experience with the full verification flow, from spec to coverage analysis to gate level sim Debugging failures in simulation to root cause problems Self-motivated and able to work effectively both independently and in a team Additional Success Factors: Experience in any of the following areas: Networking (Ethernet MAC, PHY, Switching, TCP/IP, security, PCIe and other industry standard protocols) Video standards, protocols, processing Digital signal processing filters Third party IP (SerDes, controllers, processors, etc.) Modular and Reusable Testbench architecture Design for re-use of pre and post silicon tests and infrastructure Automation of testbench creation, tests, regression, or EDA tools Knowledge of SystemC and/or DPI Personal Skills: Excellent communication/documentation skills. Attention to details. Collaboration across multidisciplinary and international teams. What You Can Expect from Ethernovia: Technology depth and breadth expansion that can't be found in a large company Opportunity to grow your career as the company grows Pre IPO stock options Cutting edge technology World class team Competitive base salary Flexible hours Medical, dental and vision insurance for employees Salary Range: The actual offered base salary for U.S. locations will vary depending on factors such as work location, individual qualifications, specializations, experience, skills, job-related knowledge, and internal equity. The annual salary range for this position is $200,000 - $300,000. The compensation package will also include incentive compensation in the form of pre-IPO ISO options, in addition to base salary and a full range of medical and other benefits. #LI-Remote

Condor Computing is a brand-new member of the RISC-V revolution. Condor is aiming to fly high by building the industry's highest performance licensable RISC-V core. Our team of highly experienced CPU designers will create a new benchmark for power efficiency in high performance open-source computing. We are pleased to announce that Condor is seeking a skilled and personable Sr. DV Engineer to become a valuable member of our team. In this position, you will have the opportunity to investigate innovative strategies to enhance the performance of our high-performance RISC-V processors, with a focus on all functions within the CPU core and memory systems. You will work collaboratively with a talented team, including engineers from RTL design, verification, and software groups, to propose enhancements, optimizations, and features based on performance assessments and PPA impact. Here is what you will do: Architect and implement testbenches utilizing UVM-based methodologies Design and develop Verification Components using UVM-based techniques Conduct block-level verification to ensure optimal block performance and compliance with requirements Generate and execute verification plans based on specifications Define, implement, and analyze coverage metrics Architect and implement Formal Verification processes Create automation tools to streamline testing Perform testing for design performance evaluation Here is the background we hope you have: A Master's or Bachelor's degree in Electronic/Electrical Engineering or Computer Science 8+ years of experience in Verification Proven industry experience in developing testbenches and verification components with SystemVerilog and UVM from inception In-depth knowledge of event-driven simulator-based modeling techniques Experience with low-power implementation (UPF) Familiarity with scripting languages such as Python, Ruby, or Perl A comprehensive understanding of chip and/or computer architecture These would be nice to have but are not required: Strong written and verbal communication abilities Exceptional collaboration skills across sites and functions Condor Computing is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law. We look forward to reviewing your application!

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking an experienced DFT/DFD Design Verification Engineer for a contract position to support the validation of cutting-edge test architectures in high-performance SoCs. In this role, you will verify Design-for-Test (DFT) and Design-for-Debug (DFD) logic-including JTAG, iJTAG, and internal scan architectures-ensuring robust manufacturability and post-silicon debuggability. You will work closely with DFT architects, RTL designers, and DV teams to develop and execute comprehensive verification plans using industry-standard tools and methodologies. This is a fixed-term contract role and the candidates can be based in the US or Canada, and we are open to remote work. Key Responsibilities: Define and execute verification plans for DFT/DFD features such as boundary scan, scan chains, and debug logic. Develop UVM-based or directed tests to validate IEEE 1149.x (JTAG), 1500 (iJTAG), and 1687 (IJTAG) compliant implementations. Verify integration and functionality of ICL (Instrument Connectivity Language) and PDL (Procedure Description Language) content for instrument and test control. Simulate and debug DFT/DFD RTL and gate-level designs using industry-standard simulators. Collaborate with DFT architecture and implementation teams to ensure functional correctness, performance, and alignment with manufacturability goals. Drive coverage closure, including code coverage and functional coverage, across all DFT/DFD blocks. Work with post-silicon validation and ATE teams to ensure test vector portability and alignment between simulation and silicon. Experience & Qualifications: Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field. Proven experience in design verification for DFT/DFD architectures in complex SoC environments. Hands-on experience with IEEE JTAG-related standards: 1149.1, 1500, and 1687. Proficiency in writing and debugging ICL and PDL files for test generation and instrumentation control. Experience using Siemens Tessent tool suite for scan insertion, ATPG, IJTAG, and pattern generation. Solid understanding of RTL verification flows and simulation methodologies. Proficiency in Verilog/SystemVerilog and scripting (Python, Perl, TCL). Strong analytical and debugging skills with attention to detail and documentation. Experience with UVM-based testbench environments for DFT/DFD verification. (preferred) Familiarity with scan compression, LBIST/MBIST, and test access architectures. (preferred) Exposure to gate-level simulations and post-silicon test bring-up workflows. (preferred) Strong collaboration skills with ability to work across architecture, design, and ATE teams. (preferred) Knowledge of scan diagnosis and failure analysis workflows is a plus. (preferred) Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.

In an increasingly connected world, the pandemic has highlighted just how essential telecom networks are to keeping society running. The Network Infrastructure group is at the heart of a revolution to connectivity, pushing the boundaries to deliver more and faster network capacity to people worldwide through our ambition, innovation, and technical expertise Join Optical Networks division, where innovation meets scale in the AI-driven data center era. With the recent acquisition of Infinera, we've united two industry leaders to create an optical networking powerhouse-combining cutting-edge technology with proven leadership to redefine the future of connectivity. The successful candidate shall possess abundant experience in designing complex DSP for communication systems. She/he shall also have decent knowledge in analog/mixed-signal circuitry to perform the modeling and optimization of the overall high-performance front ends for communication SoCs. Mandatory Knowledge/Skills/Abilities: Have prominent tracking record in modeling analog/mixed-signal IPs, including but limited to SERDES, optical links, and wireless transmission systems. Hands-on in modeling and simulating with System-Verilog (WREAL), Verilog-AMS, and/or C, C++. Have a decent understanding in CMOS analog / mixed-signal design. Preferred Knowledge/Skill/Abilities: Able to create IBIS-AMI model. Can code in System-Verilog (WREAL). Able perform .LIB generation Fluent in verbal and written communications; Independently resolves issues and conquer design challenges; Self-motivated and detail-oriented; Has the knowledge of (optical) communication theories and Matlab coding. Education and Experience Requirements: Principal Design Engineer: M.S. in E.E. with 12+ years' experience, or Ph.D. in E.E. with 8+ years' experience Model the circuit blocks and mixed-signal IPs, including but not limited to high-speed ADCs, DACs, CTLE, FFE, and PLLs, to work with the architect and designers to achieve the optimal system-level performance. Perform the functional verification and timing analysis on the IPs and the blocks. Work with the digital verification team to generate an adequate interface to ensure the robustness of the design.

JOB TITLE: FPGA Design/Verification Engineer - REMOTE PAY RATE: $87.19/hour We are a national aerospace and defense staffing agency seeking highly qualified candidates for a position with a top-tier client. Job Details: Job Type: Contract (12 months with potential for extension) Industry: Aerospace / Defense / Aviation Benefits: Medical, dental, and vision (Cigna) Perks: Bonus potential + Priority access via Tier 1 supplier Openings Nationwide: Thousands of opportunities across the U.S. Qualifying Questions: Are you a U.S. person as defined under ITAR regulations? Do you meet the educational and experience requirements for this role? Can you commute to the job location or relocate if necessary? Summary: Designing, testing, and integrating FPGA platforms, including work with COTS-based control platforms and embedded processors. Collaborate across disciplines with Software and Hardware teams to develop high-speed, cutting-edge systems for future aerospace applications. Design, simulate, and integrate FPGA/ASIC-based systems Support development with Microchip FPGAs and toolsets Automate and develop scripts to streamline FPGA development Collaborate with software and hardware engineering teams Support testing and debugging in a high-speed, space-rated environment Requirements: Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field. Note: Candidates at Level 2, 3, or 4 will be considered based on experience and skills. Microchip FPGA development Proficiency with Microchip tools and processes FPGA platform integration and testing Experience with embedded processors on FPGAs Scripting for development automation RTG4 design and debugging High-speed interface design and testing Must be a U.S. Person (as defined by ITAR). About Us: The Structures Company is a premier national aerospace and defense staffing agency specializing in contract, contract-to-hire, and direct hire placements. We deliver expert workforce solutions across engineering, IT, production, maintenance, and support roles. As trusted partners to major aerospace OEMs and Tier 1 suppliers, we connect professionals with opportunities to grow and excel in the aviation and aerospace industries. Eligibility Requirements: Must be a U.S. Citizen, lawful permanent resident, or protected individual under 8 U.S.C. 1324b(a)(3) to comply with ITAR regulations. Keywords: aerospace, aviation, engineering, maintenance, aircraft design, defense Take your career to new heights-apply today!

Reliability Analog Design Engineer ] Blue Cheetah Analog Design Inc. is a growing technology start-up headquartered in Sunnyvale, California. Our mission is to generate state-of-the-art “in package” die-to-die semiconductor IP solutions for the rapidly growing chiplet ecosystem. We accomplish this by providing high performance chiplet interface semiconductor IP to our global customers, allowing them to reshape their product roadmaps to a more agile and cost effective chiplet based approach. Join our team to help usher in the chiplet era of semiconductor-based products. We provide a professional benefits package including medical, dental, vision, 401K plan with company match as well as generous holiday & vacation leave. Join a team where your impact to the collective success will be clear and the big company politics do not exist. Job Description: ● Use your Reliability analysis skills within the Analog/Mixed Signal Design domain to ensure robustness for our differentiated die-to-die chiplet IP solutions ● Drive and own our EM/IR analysis methodology for analog/mixed signal custom circuit designs in leading edge technologies ● Work closely with the design team and the layout team to close the gap on any reliability violations ● Coordinate with CAD and PDK team members to validate that the team is using the latest foundry collateral ● Train others in ramping up on EM/IR reliability analysis ● Grow your knowledge base by working in leading edge technologies and interacting with peers within our company and other partner companies driving the state-of-the-art for next gen products General Requirements: ● BS, MS, Ph.D. in electrical/ECE engineering (MSEE+ preferred) ● Experienced expert in performing EM/IR analysis with Cadence Voltus and Voltus-XFi ● Team player with the ability to analyze and present data in a clear and meaningful manner ● Self-motivated, energetic attitude to create leading-edge production quality designs and innovate design methodologies MUST HAVE Requirements: ● Multi-year experience directly performing EM/IR reliability analysis using Cadence Voltus ● Knowledge and familiarity of fundamental analog IC circuit blocks ● CMOS design experience in 28nm and lower process technologies, ideally with finfet analysis experience ● Basic circuit and Cadence EDA simulation (Spectre) skills to understand and properly configure circuit simulation stimulus ● Comfortable with viewing and manipulating layouts in Virtuoso framework Preferred Skills: ● CMOS design experience in FinFet process technologies ● High speed datacomm design experience ● Experience with other analog IC related reliability matters such as: SOA analysis; Aging analysis, ESD fundamentals ● Experience with ParagonX EDA tool Equal Opportunity: Qualified applicants will receive consideration for employment without regard to, and will not be discriminated against based on race, sex, religion, national origin, sexual orientation, gender identity, disability, or protected veteran status. Compensation: In addition to Blue Cheetah's generous benefit package, the target base pay range for this role is between $145,000 and $225,000. Your base pay will depend on your skills, qualifications, experience, and location

Cooperidge Consulting Firm is seeking a Senior Analog/Mixed Signal ASIC Design Engineer. This position offers the opportunity to take ownership of the full lifecycle of integrated circuit design - from concept and architecture through detailed design, implementation, verification, and delivery. The engineer will contribute to innovative hardware solutions, collaborate across multiple domains, and provide technical leadership on complex projects. In this role, you will Design and simulate circuits at the transistor level Develop system-level concepts and optimize hardware for performance, power, and cost Assess feasibility of advanced requirements and algorithms Create and review design specifications and block-level implementations Guide verification, test planning, and chip-level design activities Mentor less experienced engineers and share best practices Contribute to proposals and technical development efforts Requirements Qualifications Proficiency in integrated circuit design, semiconductors, and computer architecture Hands-on experience with circuit design, simulation, and layout practices Ability to write detailed design specifications and manage small technical teams Excellent analytical and mathematical skills Strong organizational skills, attention to detail, and ability to meet deadlines Effective verbal and written communication skills Strong problem-solving skills with the ability to adapt to changing requirements Demonstrated ability to prioritize tasks and lead solutions for complex problems Education Bachelor's degree in Engineering or related field required Master's degree preferred Experience requirements: 5-7 years with BS, OR 3-5 years with MS, OR 0-2 years with PhD in ASIC Hardware Engineering or related Must be eligible to obtain and maintain a U.S. government security clearance Benefits Health Care Plan (Medical, Dental & Vision) Retirement Plan (401k, IRA) Life Insurance (Basic, Voluntary & AD&D) Paid Time Off (Vacation, Sick & Public Holidays) Family Leave (Maternity, Paternity) Short Term & Long Term Disability Training & Development Work From Home

Manager/Lead Analog/Mixed-Signal Design Engineer Location: Remote | Headquarters: Tempe, Arizona, USA Company: Alphacore Inc. About Us Alphacore Inc. is a fast-growing innovator in high-performance microelectronics, serving critical industries such as scientific research, aerospace, defense, medical imaging, and homeland security. Our cutting-edge technology powers some of the most advanced systems in the world. Recognized by Inc. 500 as one of the fastest-growing companies in the U.S., Alphacore was also ranked #6 nationwide among Top Computer Hardware Companies. 🔗Learn more about us What You'll Do As a Manager/Lead Analog/Mixed-Signal Design Engineer, you will play a leadership role in designing and implementing high-performance analog and RF circuits, with a focus on high-speed data converters. You will be a key contributor to product innovation and technical leadership within a fast-paced, collaborative team. Your Responsibilities: Lead IC design projects for high-performance analog/RF circuits and systems. Develop and verify high-speed ADC (Analog-to-Digital Converter) architectures. Work closely with cross-functional teams, including layout, verification, and system engineering. Utilize industry-standard tools such as Cadence EDA for schematic and layout design. Support silicon validation and post-silicon debugging activities. What We're Looking For Bachelor's degree in Electronics Engineering or a related field (required) Masters or Ph.D. in Electronics Engineering or related field (preferred) Proven experience in high-speed ADC design Solid knowledge of analog/mixed-signal IC design methodologies Experience using Cadence EDA tools is a plus Excellent problem-solving and communication skills Strong team leadership and project management abilities Why Join Alphacore? Be part of a rapidly growing startup making a real-world impact Remote work flexibility contribute from anywhere Collaborate with a highly experienced, innovative, and friendly team Competitive benefits include: 401(k) plan with company match Paid time off and company holidays Medical, dental, vision, and life insurance Family care and bonding leave Opportunities to volunteer and engage with the community How to Apply Send your resume to: [email protected] Use the subject line: Manager/Lead Analog Design Engineer

Hardware Design/Test Engineer, Mid-level - FAA Function: Hardware Design and Testing Remote Work Option: Yes Salary Range: $90- $130k Security Requirements Must be a US citizen or a legal resident for three of the past five years. Public Trust cannot be granted without meeting the residency requirement. Must meet eligibility requirements for a US Public Trust security clearance (moderate risk), including a soft credit check and criminal background check. Please refer to the criteria listed in 5 CFR 731.202 to understand the Public Trust suitability requirements. Culture Cobec is consistently breaking the current mold for delivering services to our government clients. What does that mean? That means believing in a “people first” mentality, building high performance teams and empowering people to make informed decisions without going through a large bureaucratic system. Cobec values the well-being of employees and bestows tremendous trust in those people to negotiate work and non-work obligations. Cobec is where someone can bring their whole self to work and be themselves, never having to compromise their authenticity just to fit in. Lastly, we believe in the work we do, the goals and missions of our customers and the interpersonal relationships we have with clients, stakeholders and our people. Values and Expectations The successful candidate for this role embodies the same values as Cobec. We realize experience is important, however; Cobec believes a person's abilities and skills that align with our values (Relationships, Leadership, Passion, Accountability, Integrity, Innovation, Quality, Teamwork, Diversity, Commitment, & Respect) are the most important drivers for success in this role. In addition to exhibiting our values, a successful candidate for this role is expected to be a high performer, organized, dynamic, and have a positive attitude. Job Summary This position will provide technical support to Federal Aviation programs through the development, validation, and deployment of mission-critical hardware systems. The role requires close coordination with engineering and operations teams to ensure designs are fully tested, field-ready, and installed without jeopardizing National Airspace System (NAS) safety or performance. Years of Relevant Experience The position requires 10+ equivalent years of experience in hardware development, implementation, configuration, installation, testing, and IT networking, preferably in FAA or aerospace environments. Essential Job Functions The following duties are normal for this position. The omission of specific statements of duties does not exclude them from this position if the work is similar, related, and/or a logical assignment for this position. Other duties may be required and assigned. Design, prototype, and validate hardware components for National Airspace System modernization efforts Develop and execute test plans to evaluate hardware performance in both lab and simulated operational settings Participate in planning discussions with FAA stakeholders to coordinate field implementation schedules that maintain NAS safety Analyze test data and provide recommendations for design refinements or field installation strategies Support configuration management processes and hardware documentation updates Advise field teams and system integrators during site deployments to ensure correct hardware implementation Individuals will be required to contribute effectively to working groups through oral and written communication and cooperative working relationships. Education Requirements Bachelor's degree required, preferably electrical, mechanical, or test engineering, or a related technical discipline. Skills Requirements Knowledge of FAA systems and requirements for field installation in operational NAS environments Strong analytical, diagnostic, and documentation skills Ability to communicate complex technical issues to multidisciplinary audiences Strong communication and reporting skills for collaboration across FAA regional teams High level of proficiency with MS Office Products. Strong analytical background and excellent communication and interpersonal skills. Travel Travel required as needed by client/s and/or company to various FAA field sites. EEO Cobec, Inc. is an Equal Opportunity Employer. Employment decisions are made without regard to race, color, religion, sex, age, sexual orientation, gender identity, national origin, disability, veteran status or any other status protected by federal, state and local law. EEO is the Law

We are seeking a highly skilled and motivated Layout Engineer to support the development of high-performance analog and mixed-signal integrated circuits. The ideal candidate will have hands-on experience in advanced CMOS technologies and a strong experience in physical layout verification and optimization of analog blocks. Responsibilities * Execute full-custom layout for analog and mixed-signal blocks including ADCs, DACs, PLLs, LDOs, comparators, and temperature sensors. * Collaborate with circuit designers to optimize layout for performance, area, and power. * Perform floorplanning, block-level routing, and macro-level assembly. * Conduct physical verification using tools like Cadence Virtuoso, Synopsys Custom Compiler, and Calibre. * Address DRC/LVS, EMIR, and DFM issues and ensure layout meets manufacturing and reliability standards. * Support tape-out activities and post-layout simulation reviews. * Document layout strategies and contribute to design reviews. Essential Skills * Minimum 4 years of experience in analog circuit layout in advanced CMOS technologies (2-3nm, gate-all-around). * Proficiency with layout tools such as Cadence Virtuoso and Calibre. * Understanding of analog layout techniques including matching, shielding, reliability, and parasitic optimization. Additional Skills & Qualifications * 5 overall years of experience in the field. * Experience with advanced FINFET and GAA is a plus. * No degree is required to be eligible for this role. * Candidates with only digital layout or older technology experience are not suitable. Work Environment The team focuses on designing and creating layouts for analog mixed signal circuits in advanced CMOS nodes (2-3nm) supporting data center processor development. The typical day involves 80% heads-down design/layout work and 20% in meetings. The environment emphasizes analog layout rather than custom digital, working on projects in advanced CMOS technology for in-house SoC designs. Job Type & Location This is a Contract position based out of Redmond, WA. Pay and Benefits The pay range for this position is $50.00 - $60.00/hr. Eligibility requirements apply to some benefits and may depend on your job classification and length of employment. Benefits are subject to change and may be subject to specific elections, plan, or program terms. If eligible, the benefits available for this temporary role may include the following: • Medical, dental & vision • Critical Illness, Accident, and Hospital • 401(k) Retirement Plan - Pre-tax and Roth post-tax contributions available • Life Insurance (Voluntary Life & AD&D for the employee and dependents) • Short and long-term disability • Health Spending Account (HSA) • Transportation benefits • Employee Assistance Program • Time Off/Leave (PTO, Vacation or Sick Leave) Workplace Type This is a fully remote position. Application Deadline This position is anticipated to close on Dec 19, 2025. About Actalent Actalent is a global leader in engineering and sciences services and talent solutions. We help visionary companies advance their engineering and science initiatives through access to specialized experts who drive scale, innovation and speed to market. With a network of almost 30,000 consultants and more than 4,500 clients across the U.S., Canada, Asia and Europe, Actalent serves many of the Fortune 500. The company is an equal opportunity employer and will consider all applications without regard to race, sex, age, color, religion, national origin, veteran status, disability, sexual orientation, gender identity, genetic information or any characteristic protected by law. If you would like to request a reasonable accommodation, such as the modification or adjustment of the job application process or interviewing due to a disability, please email actalentaccommodation@actalentservices.com for other accommodation options.

Job Description We're seeking a talented Hardware Design Engineer to contribute to the development and verification of advanced digital designs. You'll work on cutting-edge ASIC and FPGA solutions, collaborating closely with cross-functional teams to bring next-generation technology to life. The position follows a flexible hybrid schedule. Responsibilities Participate in design architecture discussions and trade-off analysis. Write and verify RTL code for high-performance hardware components. Support hardware bring-up and provide technical assistance during customer engagements. Qualifications Proficient in SystemVerilog for digital design. Familiar with verification tools such as Questa, Incisive, or VCS. Experience with scripting (Python, Perl, Tcl) for process automation. Solid understanding of ASIC or FPGA logic design. Strong self-management, communication, and organizational skills. 5+ years of logic design experience and a BSEE degree. Preferred / Plus Experience with ASIC synthesis, timing constraints, CDC/RDC flows. Exposure to verification methodologies such as UVM. Familiarity with AMBA and AXI protocols.

TAMKO Building Products LLC is seeking a Computer Vision Hardware Engineer. This role is responsible for designing, implementing, and tuning the hardware foundation of computer and machine vision systems-specifically cameras, sensors, optics, and lighting solutions-to enable high-quality imaging for automated inspection. The position is remote with up to 50% travel for scoping, installing, and commissioning systems across manufacturing facilities. Summary of Essential Functions: To perform this job successfully, an individual must be able to perform each essential function satisfactorily. Reasonable accommodations may be made to enable qualified individuals with disabilities to perform the essential functions. Additional duties may also be assigned. * Design and configure camera, lens, filter, and lighting setups to achieve robust imaging for manufacturing inspection tasks. * Conduct illumination analysis to maximize feature visibility and minimize image artifacts, using advanced techniques (e.g., backlights, dome lights, ring lights). * Select and validate cameras and image sensors (CMOS, CCD) tailored to resolution, sensitivity, and speed requirements. * Design mechanical mounts, brackets, and enclosures for cameras, lenses, and lighting to ensure stable, repeatable imaging performance in a brownfield manufacturing environment. * Create engineering-exact documents, layouts, and schematics using SolidWorks or comparable engineering drawing software. * Collaborate with PS Vision Engineers, IT controls engineers, and manufacturing plant personnel to ensure seamless integration of hardware and software. * Manage external contractors and vendors to scope, fabricate, and install cameras, lighting, and mounting solutions. * Diagnose, troubleshoot, and optimize system performance by addressing issues such as inconsistent lighting, improper focus, or sensor misconfiguration. * Lead and provide technical support during field installations, commissioning, and optimization of camera and lighting systems. * Establish hardware configuration standards, documentation, and best practices for repeatable deployments. * Develop and standardize maintenance schedules for camera and lighting systems to ensure peak performance, and coordinate with manufacturing leadership to drive consistent execution. * Develop and maintain automated systems to monitor camera and lighting performance, with defined thresholds and alerts to ensure timely corrective action and sustained peak performance. * Maintain awareness of emerging technologies in imaging hardware and illumination techniques to continually advance system capability. Preferred Qualifications * Bachelor's Degree in Electrical Engineering, Mechanical Engineering, Optical Engineering, Physics, Computer Vision, or related fields with a minimum of 3 years of relevant industrial experience (or a high school diploma/GED with a minimum of 8 years of relevant engineering experience). * Hands-on expertise with machine vision cameras, lenses, filters, and lighting equipment. * Familiarity with illumination design techniques for reflective, textured, or curved surfaces. * Proficiency in SolidWorks or other engineering drawing software for producing precise system documentation. * Mechanical engineering skills for designing mounts, fixtures, and enclosures in brownfield environments. * Experience deploying and tuning camera and lighting solutions in industrial or manufacturing environments. * Strong understanding of imaging principles, optics, and sensor characteristics. * Ability to work collaboratively with software engineers and data scientists to align imaging hardware with machine learning requirements. * Experience troubleshooting and optimizing vision hardware in field. * Demonstrated ability to coordinate and manage contractors for installation and fabrication of vision hardware solutions. Additional Qualifications * Fabrication or machining experience for custom mounting and system integration. * Experience with commercial machine vision software packages. * Familiarity with image quality metrics and measurement system analysis. * Knowledge of system integration and edge device for real-time imaging applications. * Project management experience, including scoping and execution of hardware deployments. Physical Requirements/Work Environment The physical requirements/work environment characteristics described here are representative of those an employee encounters while performing the essential functions of this job. Reasonable accommodations may be made to enable qualified individuals with disabilities to perform the essential functions. * While performing the duties of this job the employee is frequently required to remain stationary for extended periods, as well as move around inside of the office and the production floor. The employee will frequently be required to operate a computer and other office machinery, as well as operate and inspect various machinery on the production floor. In addition to competitive wages, TAMKO offers a comprehensive benefits package, including Group Health and Life Insurance, Vision and Dental Insurance, a Flexible Benefits Plan, a 401(k) Retirement Plan with company match, a Profit Sharing Retirement Plan, and other valuable benefits. This job description is intended to describe the general nature and level of work expected. It is not intended to be an exhaustive list of all responsibilities, duties, or skills required and is subject to change at any time based on business needs. TAMKO Building Products LLC is one of the nation's largest independent manufacturers of residential and commercial roofing products, waterproofing products, and related building materials. Headquartered in Galena, Kansas, TAMKO has been committed to innovation, quality, and customer service for over 80 years. Our success is driven by our people - individuals who take pride in their work, share an ownership mindset, and are dedicated to delivering excellence. At TAMKO, we strive to foster a safe, supportive, and rewarding work environment where employees can grow and succeed.

Serving Maryland and the Greater Washington D.C. area, SageCor Solutions (SageCor) is a growing company bringing complete engineering services and true full lifecycle System Engineering services to areas requiring (or desiring) nationally-recognized expertise in high performance computing, large data analytics and cutting edge information technologies. Active TS/SCI w/ Polygraph required. Qualifications: ● Must possess an active TS/SCI Clearance with Full-Scope Polygraph ● Experience using VHDL, Verilog or SystemVerilog RTL Coding (for design and/or analysis of digital circuits) ● Experience with FPGA Design, synthesis, P&R tools (ex Vivado, Quartus) ● Experience utilizing Verilog/System and Verilog test bench development ● Experience working with Linux/Windows OS ● Knowledge of design simulation tools (Mentor, Cadence, Synopsys - 1 or more) ● Strong oral/written communication ● May provide FPGA support for vulnerability assessments, circuit analysis and/or reverse engineering efforts ● Location is onsite at Fort Meade, MD ● May have up to 20 hours of remote work per week once established and approved by the Customer Desired Skills: ● Experience with C/C++, Bash, Tcl/TK, GitLab ● Experience with FPGA design using Xilinx's Vivado Tool Suite ● Experience using soft/hard IP cores in FPGAs/ASICs (ex Zynq or Microblaze or RISC processors, memories, flash/NVM) ● Exposure to embedded software development ● Exposure to PCB design and development ● Python scripting Required Experience: Multiple openings for Junior, Senior, Principal and Sr. Principal Engineers: Minimum three (3) years' experience as a Design Engineer in integrated circuit or microelectronic component design or reverse engineering of the same is required. Bachelor's degree in electrical engineering or computer engineering from an accredited college or university is required. Five (5) years of additional hardware design engineering experience may be substituted for a bachelor's degree. Consistent with federal and state law where SageCor conducts business, SageCor Solutions provides equal employment opportunities (EEO) to all employees and applicants for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability or veteran status, or any other protected class.

We are looking for a passionate and motivated Hardware Engineer eager to grow their expertise in server and network hardware components. The ideal candidate may have limited experience but a strong drive to work hands-on with hardware, performing research, testing, and troubleshooting various configurations to enhance performance and reliability. What You'll be doing Research and test different server and network hardware components and configurations Take responsibility for the technical acceptance and quality control of equipment at our global facilities Collaborate with cross-functional teams to ensure hardware meets required performance and operational standards Perform hardware diagnostics and troubleshooting Travel when needed to colocation data centers to support installations, major deployments, and maintenance tasks Document hardware test results, findings, and configurations to contribute to ongoing improvements and scaling What we look for in you: Basic understanding of server and network hardware components, with a strong enthusiasm to develop deep technical skills Proactive and curious mindset, eager to learn through hands-on experience Analytical thinking and methodical approach to hardware testing and problem-solving Ability to work independently and make technical decisions as needed Willingness and ability to travel internationally to support on-site activities Why should you join our team? A welcoming international team of highly qualified professionals Cutting-edge hardware and technology Work remotely from anywhere in the world Access any of our global offices anytime Flexible schedule 40 paid days off Competitive salary

**Country:** United States of America , Remote City, MI, 49503 USA ** Remote **U.S. Citizen, U.S. Person, or Immigration Status Requirements:** U.S. citizenship is required, as only U.S. citizens are authorized to access information under this program/contract. **Security Clearance:** None/Not Required Pratt & Whitney is working to once again transform the future of flight-designing, building and servicing engines unlike any the world has ever seen. And because transformation begins from within, we're seeking the people to drive it. So, calling all curious. Come ready to explore and you'll find a place where your talent takes flight-beyond the borders of title, a country or your comfort zone. Bring your passion and commitment and we'll welcome you into a tight-knit team that takes our mission personally. Channel your drive to make a difference into shaping an organization and an industry that's evolving fast to the future. At Pratt & Whitney, the difference you make is on display every day. Just look up. Are you ready to go beyond? **What You Will Do:** The positions primary focus is the creation and validation of a centrally operational technology, controls hardware specification for all of Pratt and Whitney to utilize. After creation, this role will be to ensure compliance with all Pratt and Whitney sites as well as machine and system suppliers. The position will also create and implement standard deliverables and buy off procedures generated as part of the hardware specification and in alignment with all company and project automation goals. **Primary Job Responsibilities:** Create and assist in the execution of standard as related to controls hardware. This includes: + Component list per application including supplier selection + Design and implementation validation + Standard control panel designs + Standard utility designs + Operational Technology network architecture + Standard engineering procedures and documentation + Standard best practices, integration procedures and documentation + Maintenance procedures and Life Cycle Cost calculations + Machine tagging standardization + Supplier hardware drawing approvals and review processes + Standardization of pneumatic safety circuits + Continuous improvement of controls hardware standards. + Interfacing with suppliers to understand potential supply chain constraints. + Support of suppliers with the approval process for hardware design. + Applying expertise to technical problem resolution for current and future projects. + Works to influence parties within and outside of department at an operational level regarding policies, practices and procedures. + Assist as resource in the capital procurement process + Provide an expert level of understanding of controls standards and execution to all levels of the organization. + Communicate with business partners both local, remote, internally, and externally + Communicating at all levels within RTX and Pratt & Whitney, as well as externally, tapping technical resources, forming teams and consulting with programs. + Meeting all Environmental Health & Safety and Preventative Maintenance requirements associated with manufacturing development. **Qualifications You Must Have:** + Bachelor's Degree or equivalent demonstrated experience in Industrial electrical engineering, Computer/ Software engineering, Engineering, Manufacturing or related discipline and/or 5+ years of experience in automated systems specifically in manufacturing environments + US Citizen due to program requirements + The ability to obtain a US Government Secret Clearance + Up to 50% travel required. **Qualifications We Prefer:** + Studio 5000 Logix designer, Factory Talk, RS Networks, AutoCAD, Eplan and MS Office Suite + Strong communication, collaboration and team building skills; ability to connect with all levels of the organization + Extensive experience with controls hardware design utilizing a broad range of components and architectures + Extensive experience troubleshooting different component manufactures and applications + Extensive experience with application of NFPA and NEC codes + Experience with system software / PLC code development, HMI development **Learn More & Apply Now:** In addition to transforming the future of flight, we are also transforming how and where we work. We've introduced role types to help you understand how you will operate in our blended work environment. This role is: Onsite: Employees who are working in Onsite roles will work primarily onsite. This includes all production and maintenance workers, as they are essential to the development of our engines. **_As part of our commitment to maintaining a secure hiring process, candidates may be asked to attend select steps of the interview process in-person at one of our office locations, regardless of whether the role is designated as on-site, hybrid or remote._** The salary range for this role is 82,000 USD - 164,000 USD. The salary range provided is a good faith estimate representative of all experience levels. RTX considers several factors when extending an offer, including but not limited to, the role, function and associated responsibilities, a candidate's work experience, location, education/training, and key skills. Hired applicants may be eligible for benefits, including but not limited to, medical, dental, vision, life insurance, short-term disability, long-term disability, 401(k) match, flexible spending accounts, flexible work schedules, employee assistance program, Employee Scholar Program, parental leave, paid time off, and holidays. Specific benefits are dependent upon the specific business unit as well as whether or not the position is covered by a collective-bargaining agreement. Hired applicants may be eligible for annual short-term and/or long-term incentive compensation programs depending on the level of the position and whether or not it is covered by a collective-bargaining agreement. Payments under these annual programs are not guaranteed and are dependent upon a variety of factors including, but not limited to, individual performance, business unit performance, and/or the company's performance. This role is a U.S.-based role. If the successful candidate resides in a U.S. territory, the appropriate pay structure and benefits will apply. RTX anticipates the application window closing approximately 40 days from the date the notice was posted. However, factors such as candidate flow and business necessity may require RTX to shorten or extend the application window. _RTX is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability or veteran status, or any other applicable state or federal protected class. RTX provides affirmative action in employment for qualified Individuals with a Disability and Protected Veterans in compliance with Section 503 of the Rehabilitation Act and the Vietnam Era Veterans' Readjustment Assistance Act._ **Privacy Policy and Terms:** Click on this link (******************************************************** to read the Policy and Terms Raytheon Technologies is An Equal Opportunity/Affirmative Action Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability or veteran status, age or any other federally protected class.