Wireless Telecom jobs

(s): 4 Duration: 10 Weeks EDUCATIONAL RECOMMENDATIONS Currently a candidate for a PhD in Computer Science, Computer Systems Engineering, Math, Artificial Intelligence, or related field at an accredited school in the USA. Expertise in deep learning fundamentals, including large language models and agent-based systems, and experience with training, deploying, and/or profiling models. Experience in principled systems design and development. Excellent communication skills, with the ability to analyze complex problems and effectively communicate findings. Strong publication record in top-tier AI and systems conferences. It would be nice if you also had: We encourage applications from candidates who have a strong foundation in one or more of the areas below, even if you don't meet every criterion. We value diverse perspectives, innovative thinking, and complementary skills. Agentic AI & Large Language Models (LLMs): Familiarity with large-scale model inference and optimization, as well as experience in LLM reasoning, prompt engineering, and resource-constrained computation. AI Systems Architecture & Optimization: Experience managing GPU or accelerator resources, optimizing performance, and benchmarking across different hardware environments. A solid understanding of AI infrastructure design and inference workflows-such as KV-cache management, batching, and offloading-is beneficial. Compilers & Hardware-Software Co-Design: Knowledge of computational graph representations (e.g., ONNX, MLIR, XLA, TorchScript) and model optimization frameworks (e.g., TensorRT, TVM). Experience working with heterogeneous accelerator ecosystems (e.g., TPUs, AMD ROCm GPUs) or parallelizing compilers is a plus. Distributed, Edge AI & Web3 Computing: Understanding of distributed or edge inference systems (e.g., Ray Serve, DeepSpeed-Inference, vLLM), with familiarity in blockchain technologies, smart contracts, or wireless networking protocols (Wi-Fi, 3GPP, Bluetooth). Are you passionate about solving problems? As part of our team, you will: Design and implement state-of-the-art AI/ML decentralized systems. Validate and evaluate your implementation in our cutting-edge labs. Interface, explore, and learn from the experts.

Digital Hardware Design Intern (s): 1 Duration: 10 weeks EDUCATIONAL RECOMMENDATIONS Currently a candidate for a Master's or bachelor's degree in Electrical Engineering, Computer Engineering, or a related field with an accredited school in the US. Career interest and Undergraduate or Graduate coursework related to Wireless Communications Systems, Analog circuit design, Digital circuit design, and RF performance testing. Experience with, or comfortable learning to use, test equipment such as Spectrum Analyzers, Signal generators, Network Analyzers, oscilloscopes, voltage meters, and power supplies, a soldering iron, and basic hand tools. Familiar with creating content in Microsoft Office apps, including Word and Excel. It would be nice if you also had: Previous work/lab experience in RF or Digital hardware circuit design development, implementation, and/or validation testing. Work/lab experience with RF and or digital test equipment and the use of RF/Analog simulation tools Experience in circuit schematic design and PCB CAD layout. Experience in the analysis and presentation of test data Familiarity with Python scripting. Component (chip) selection, drawing schematics, and soldering of electronic components Coding and running automated laboratory test scripts to test individual circuits as well as overall systems Troubleshooting design issues and brainstorming with the team to find a fix Analog circuit simulation, digital circuit simulation Reliability prediction calculations

To join the SiGe team designing Driver and TIA for coherent long-haul and metro systems as well as PAM4 data center systems, primarily using SiGe BiCMOS. This role offers the opportunity to work on cutting-edge technology that addresses the growing demands of data transmission in modern data centers, telecom networks, and beyond. Relevant experience from Research, Academia or Industry - across allied industries. Deep understanding of detailed transistor-level design, device physics. Proven experience in one or more areas: Low noise / high linear (>50GHz) broadband analog circuits for optical front-end High-precision analog circuits (e.g., linear regulators, bandgaps, DAC/ADC). Solid expertise with EDA CAD tools, custom analog layout, 3D EM modeling Experience in measuring IC performance and debug of design to correlate simulations to measurements A range of experience is needed for numerous openings: Ph.D. in Electrical Engineering, Physics or Solid State Physics, including new graduates through industry veterans will be considered for various roles up to and including leadership

This role requires a dynamic R&D professional to lead both target-oriented research and multi-disciplinary development of hardware, software, and systems, while also providing strategic management for the engineering organization. Key responsibilities include overseeing product and service development, managing budgets and schedules, optimizing product delivery, and driving innovation through technology surveillance and long-term objective setting. Educational Background: Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field. An advanced degree is a plus but not required. Experience: 10+ years of hands-on experience in hardware engineering, particularly in the telecom/datacom fields. Proven track record of leading successful Hardware engineering teams in delivering high-quality systems and products on time and within budget. Demonstration of people skills and the ability to approach every situation with compassion and forethought. Technical Expertise: Extensive experience in designing and developing hardware systems, with deep knowledge of networking, hardware architecture, and systems integration. Problem-Solving Skills: Ability to tackle technical and group challenges head-on. Collaboration: Strong interpersonal and communication skills, with the ability to work directly with cross-functional teams to achieve seamless integration and development. Adaptability: Ability to thrive in a fast-paced, dynamic environment, with a hands-on approach to adapting to changing priorities and technical demands. Design and Development: Direct manager of the local IP HW engineering staff at the Sunnyvale California site. Work with program leads to allocate design resources and eliminate roadblocks. Ensure all required resources are available to the teams and escalate when necessary to support. Drive local IP HW site specific initiatives supporting the development process. Work with program leads to drive the sites product development direction by implementing the VP / groups strategy. This position requires a broad view of the HW development process, the groups overall mission and a strong ability to build consensus across the organization. Organization: Advocate and driver of IP HW SV site career planning, compensation management and employee development. Drives the IP HW site hiring and resourcing plan. Coordinates with other site leads and manages day to day local group issues. This position requires an active knowledge of the pulse of the site, close coordination and interaction with the IP HW technical leads and day to day interaction with every member of the team. This position requires the ability to motivate and develop both managers and individual contributors reporting to it. Budgeting: Owner of the IP HW SV site engineering budget. Manages site specific travel and expense approvals in concert with the IP HW purchasing organization. Communication: As the voice of the IP HW SV site this position advocates upward and outward to advance and enable the site to perform at peak performance. This includes being a strong voice in recruiting both inside and outside the company. Infrastructure: Responsible for ensuring the SV IP HW site infrastructure, labs, ovens, office areas are maintained and receive required upgrades as required for peak team performance.

Project Management Intern (s): 1 Duration: 10 weeks Currently pursuing a degree in Project Management, Business, Engineering, or a related field at an accredited U.S. university. Computer savvy; proficient in Microsoft Office Suite (Excel, SharePoint). Strong organizational skills and attention to detail. Technical agility and a digital mindset. It would be nice if you had: Excellent verbal and written communication skills. Problem-solving and critical thinking abilities. Self-starter with a strong work ethic; motivated to learn, be challenged, and contribute to the team. Shadow Project Managers to learn project review, recognition, forecasting, and identifying scope opportunities. Gain exposure to the complete Nokia project lifecycle, including planning, execution, and acceptance. Collaborate with a Resident Engineer to understand lab certification processes and User Acceptance Test (UAT) requirements for new PON ONTs. Observe Maintenance Windows (MW) to learn the mechanics and responsibilities involved in MW activities. Monitor and engage in CARE activities to understand real-world production issues and remediation steps. Utilize Microsoft tools (Excel, SharePoint, etc.) for documentation and reporting.

(s): 1 Duration: 8-12 months Educational Recommendations: Candidate should be working towards a degree or diploma in Computer Science, Photonics and Optical Engineering, or a related field at an accredited university or college in the United States General Office suite familiarity Familiarity with general computing concepts Experience with IP networking Experience with Windows and Linux Ability to lift 50+ pounds It would be nice if you had: Experience with scripting or other programming languages such as python, go, etc Maintain inventory of equipment Maintain general Lab tidiness and organization Provide hands-on assistance to local and remote staff with Installation/removal/upgrades/reconfiguration/troubleshooting of optical transport equipment Other duties as required

Network Infrastructure IP team is seeking a highly skilled Solutions Engineer to design networking architectures and configurations that highlight the strengths of our portfolio and meet customer expectations. DCN2025 A very experienced and strong understanding of network design and architecture for IP/MPLS (Multi-Protocol Label Switching) networks is a key for this role, as well as experience with one or more of the following IP/MPLS solution architectures: Triple Play, MSE, Mobile, Data Center At least 5+ years related experience in internetworking technologies and applications Strong knowledge of L2/L3 protocols, Network Applications, QOS, MPLS and Network Security Experience with test suites, IXIA and/or Spirent and/or Viavi required Working knowledge and experience with IP/MPLS routers required. Strong interpersonal skills - work with people at all organizational levels Excellent written, communication and presentation skills Strong Knowledge of GNU/Linux, virtualization technologies, OpenStack, Kubernetes, Docker, Git, Ansible This individual will be responsible for a testing a broad range of IP/MPLS (Multi-Protocol Label Switching) solutions and feeding this back into the feature development process for the 7xx0 platforms Results of the testing will be shared with the internal Competence Centers and Sales Organizations The individual will also be responsible for in-depth and complex new product introduction and Proof of Concept testing with customers on Nokia's Service Router and Data Center product portfolio

AI/ML Architect Intern (s): 1 Duration: 10-week internship Educational Recommendations: Candidates who are actively pursuing a Bachelor's or master's degree in Computer Engineering- Computer science or Data Science in an accredited university in the U.S. Note: Only U.S. Citizens are elegible for this role, given the nature of our costumer. This role does not offer sponsorship or relocation. Familiarity with AI/ML toolkits and data-driven problem-solving. Understanding of AI model evaluation methods (e.g., confusion matrix, accuracy, precision, recall ). Strong analytical mindset and ability to interpret performance metrics. Excellent collaboration and communication skills; proactive and self-motivated. Ability to work independently and within a team environment. Strong written and oral communication skills with presentation experience. You will: Develop ML training procedures for interference detection and characterization AI models. Train an existing AI model using labeled ML data on a Near-RT RAN Intelligent Controller in a Nokia system test lab. Perform RF signal injection and evaluate AI model accuracy using established metrics. Document ML training, testing, and evaluation steps for future use by Nokia teams. Present project results, challenges, and accomplishments to Nokia Architecture Team leads at the conclusion of the internship.

Lab Support Engineer Co Op (s): 1 Duration: 4 months + EDUCATIONAL REQUIREMENTS Candidate must be enrolled in junior college or university pursuing a technical degree in hardware or software. Basic experience or interest in IP networking (a plus, not mandatory) Familiarity with Microsoft Word and Excel Currently pursuing an engineering degree (a plus) Physically capable of handling packages and equipment up to 25 lbs Strong communication skills, willingness to learn, self-starter attitude, ability to multitask, and good organizational skills Assist in lab/test equipment setup, configuration, and debugging support - fibber cabling, thermal chamber, traffic generator Support equipment installation - rack and stack, chassis install, PDU, terminal server Provide packing, shipping, and receiving support - domestic and international Support test equipment calibration Assist with lab equipment inventory and asset tagging Contribute to lab safety and audit support What you will learn: Gain hands-on experience in lab operations and technical support Develop practical skills in hardware setup and troubleshooting Learn about network infrastructure and lab safety standards Improve organizational and multitasking abilities Build communication and teamwork skills by collaborating with engineers

Number of Positions: 4 Duration: 10 weeks (Full-time) Dates: June 2026 - August 2026 EDUCATIONAL RECOMMENDATIONS Currently a candidate for a bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or a related field with an accredited school in the US. Proficiency in one or more Programming and/or Scripting languages. (i.e. C, C++, Python, Java, BASH) Interest in working closely with Hardware engineers and designing and developing low level software to support their efforts. Interest in experiencing the development of diagnostic software used for the bringup, validation and manufacturing of new Hardware It would be nice if you also had: Exposure to Computer Architecture concepts. Experience in Designing software solutions from Planning to implementation to testing in Academic projects. Work closely with Hardware and Firmware engineers to: Develop Diagnostic software for use with Hardware bringup, validation and manufacturing. Develop tools for use in Hardware bringup and verification Enhance the infrastructure used by the Bringup and diagnostics team. Learn the role bring-up and diagnostics software plays in new Hardware development and manufacturing. All tools and infrastructure in the diagnostics team is developed in Python and C++

As an R&D Optical Engineer at Nokia, you'll play a pivotal role in ensuring our next-generation Digital Signal Processing (DSP) systems deliver unparalleled performance on submarine cables, solidifying our market leadership in Submarine Line Terminal Equipment (SLTE). This unique opportunity allows you to collaborate with a talented DSP team, converting their coherent DSP code into ultra-fast GPU implementations. You'll also engage in crafting advanced nonlinear and Forward Error Correction (FEC) algorithms and have the chance to field-test and showcase groundbreaking DSP performance, directly contributing to innovative solutions and exceeding industry standards. Join us in shaping the future of connectivity! Must-Have: Exceptional coherent communications expertise with a solid understanding of optical physics Strong programming skills in Matlab and C Proven experience participating in and contributing to conferences Highly innovative mindset with a passion for solving complex challenges Nice-To-Have: Experience in GPU programming Knowledge of subsea communications technology Familiarity with recirculating loop lab environments Collaborate closely with the DSP team to translate and optimize DSP algorithms into efficient GPU code for enhanced processing capabilities. Design and develop a cutting-edge Offline Processing lab utilizing both commercial and custom coherent processing transmit and receive equipment. Validate and test DSP algorithms on innovative platforms, including recirculating loops and straight-line test beds (SLTB). Conduct field demonstrations to showcase the performance of DSP algorithms on customer subsea cable systems. Engage in problem-solving to help improve submarine cable capacity, ensuring maximum efficiency and longevity of existing infrastructure. Work alongside leading experts in optical communications and programming, fostering professional growth and knowledge sharing. Contribute to pioneering research and development projects that push the boundaries of coherent communication technologies. Be part of a dynamic, collaborative team committed to delivering impactful solutions that shape the future of submarine networking.

As a Digital Hardware Engineer at Nokia Space and Defense, you'll play a critical role in designing innovative circuit solutions that meet the stringent requirements of modern defense communications. Collaborating closely with product architects, mechanical designers, and software engineers, you'll transform complex product requirements into precise hardware designs, from block diagram to schematic level. You'll work in a dynamic environment where teamwork and creativity drive success, actively engaging with PCB layout experts to ensure seamless integration. Your contributions will be vital in reporting on program status and interfacing with supply chain representatives for prototype development. Join a passionate team dedicated to delivering exceptional networks for NATO and allied nations, fostering an atmosphere of innovation and excellence that challenges you to grow and lead within the field. You have: US Citizen or Permanent Resident Bachelor's degree in engineering 3+ years of experience in hardware electrical design for production Proficiency in simulation tools for design elements like power consumption and thermal performance Strong knowledge of the product development process Experience in managing customer and partner/vendor relationships Excellent verbal and written communication skills It would be nice if you also had: Experience with advanced PCB design and layout Familiarity with multiple hardware engineering disciplines, including mechanical design Knowledge of prototyping and factory assembly processes Experience leading projects and providing technical guidance to junior team members Lead circuit design and evaluation of third-party hardware for defense systems, ensuring compliance with stringent requirements. Collaborate with Product Architects to transform product needs into precise hardware specifications and design requirements. Develop and refine electrical designs from block diagrams to detailed schematics, ensuring optimal performance and reliability. Work closely with mechanical and software engineers to create a cohesive, multidisciplinary design solution. Engage with PCB layout specialists to translate electrical designs into practical, manufacturable products. Oversee program status reporting and communicate progress in release manager meetings, ensuring transparency and alignment with management. Coordinate with the Supply Chain team for material acquisition, prototyping, and factory testing to meet project timelines. Mentor and provide technical guidance to junior hardware team members, fostering their growth and enhancing team capabilities.

The RF Performance Test Engineer is responsible for verifying and validating the performance of RF products, ensuring compliance with industry standards (e.g., 3GPP) and Nokia-specific requirements. This role involves conducting tests at the unit and system levels, analyzing results, and collaborating with cross-functional teams to address any issues identified during testing. Required Skills and Qualifications: Knowledge of RF principles, signal processing, and wireless communication standards. Experience with RF measurement equipment Familiarity with RF product specifications and testing methodologies. Ability to analyze complex data and identify trends or anomalies. Proficiency in debugging RF hardware and software issues. Bachelor's or Master's degree in Electrical Engineering, Telecommunications, or a related field. RF Performance Testing: Execute RF performance tests using 3GPP test models and Nokia-specific configurations Conduct tests under various environmental conditions Validate RF parameters such as EVM, ACLR, OBUE, sensitivity, and frequency error. Test Planning and Execution: Develop and review test plans and test cases for RF performance validation. Set up and maintain test environments, including hardware and software configurations. Ensure test coverage for all RF performance aspects, including conducted and over-the-air (OTA) testing. Fault Analysis and Debugging: Analyze test results to identify performance issues and root causes. Collaborate with hardware and software teams to resolve defects. Document findings and propose corrective actions. Compliance and Certification: Ensure RF products meet 3GPP, ETSI, FCC, and other relevant standards. Support type approval processes for global markets (e.g., US, Canada, EU). Collaboration and Reporting: Work closely with RF design, integration, and verification teams to align testing strategies. Generate detailed test reports and summaries for stakeholders. Participate in regular sync-up meetings to discuss progress and challenges.

Test Engineering Intern Duration: 10 weeks Education Recommendations: Must be pursuing a BS or MS degree in Electrical Engineering, Information Systems Engineering, Electronics Engineering, Computer Engineering, or related field with an accredited school in the USA. You're a Great Fit If You Have: Knowledge of RF and Digital Test Equipment, including test methodologies and debugging techniques. Experience in software application development in C, C++, C#, PowerBI, or AI. Ability to tackle complex technical challenges with innovative solutions. Enthusiasm, eagerness to learn and grow, and proactive mindset with ability to contribute ideas. Strong communication skills. Ability to collaborate effectively within a team and in cross-functional settings. As part of our team, you will: Work with other Test Engineers to contribute with the development of Test SW Application and/or HW Solution to test Products in Manufacturing. Work and interface with multiple R&D teams on developing a Testing Solution for new Products. Automate the reporting & analysis of testing solutions using Power BI. Monitor and analyze test performance data to identify improvements to the Application, Test Fixture, or Measurement equipment.

(s): 1 Duration: 10 Weeks EDUCATIONAL RECOMMENDATIONS Currently a candidate for a PhD degree in Computer Science, Electrical Engineering, Computer Engineering, or Engineering in VLSI and telecommunication or related field with an accredited school in the USA. *Highly qualified Master's degree students will be considered You have at least TWO of the following: AI/ML programming frameworks: TensorFlow, PyTorch, Keras, etc. Background in compiler design and advanced computer architecture Programming for parallel systems and/or CUDA for GPU programming. Software-defined networks and real-time signal processing using DSPs Advanced RTL development skills and fluent in HDL (Verilog, SystemVerilog, and VHDL) and/or HLS (High-level Synthesis) Experience in ASIC physical design: circuit layout using Cadence (Innovus, Spectre, Virtuoso) and Synopsys (VCS, ICC) Knowledge in gate or RTL-level design optimization, timing closure analysis, and/or mixed-signal circuit design As a part of our team, you will: Work with seasoned Bell Labs researchers on the design and development of ASIC and/or proof-of-concept system platform Participate in a research project, work with mentor(s) to define, develop and conduct a research project Attend research talks in various technology areas Platform and ASIC (PAR) research project will be in any of the following areas: Acceleration of Artificial Intelligence/Machine Learning (AI/ML) models Digital signal processing and accelerator for 5G/6G communication systems Software-defined cloud-based radio access network (RAN) New materials/devices, e.g. Memristor, for high-performance computing or signal processing Application of AI/ML in SoC and system platform design

Service Design at Harmonic has been growing steadily in reach and impact-from innovation and strategy to creating new service offerings. While this internship is remote, it does offer opportunities to work hands-on with clients, one-on-ones with a design team from diverse backgrounds, a dynamic work experience where new ideas and perspectives are welcome, and a few hilarious virtual meetings. This position is for the United States (US Based Remote eligible). The role may include occasional work at our Atlanta studio or client locations, as agreed to with your manager. Eligible applicants include rising or graduating undergraduate students as well as current graduate students. Duration: June - August 2026 Please apply through this form before January 16, 2026, to be considered for this position. Note: This is a paid position for a full-time service design intern role. Are you someone who.. Is interested to work specifically in the field of service design, and want to design for the entire experience, not just within one vertical? In the past, may have been siloed into your role or major, but desires to zoom out and work on the larger customer journey? Is motivated to innovate, help clients rewrite and restructure the story of their service experience, modernize operations and organizational structures, and create greater value for everyone who participates in a service? Duties: Work with a team of designers on a client project while having the opportunity to help assist with internal initiatives at Harmonic Design Interact with clients, work alongside a team that understands service design at its roots, and be part of the research and innovation process Contribute to building a community of practice within and outside of Harmonic Requirements: Available for 10 weeks starting June 1, 2026 (with some flexibility) Dedicate a minimum of 30 hours per week Work during typical Eastern Standard Time work hours (up to 2 hours offset is workable) Able to work remotely within the United States, with the option of being in-person at Harmonic's studio in Atlanta, GA.

(s): 1 Duration: 3 Months+ Education Recommendations Currently a candidate for a bachelor's degree or diploma in Computer Science, Computer Systems Engineering, or a related field with an accredited school in the US. Dell, Omni, Nuage, 77xx, switches and routers IPAM solutions Software Define Networking (SDN) Sysadmin skillset Ansible scripting It would be nice if you also had: Red Hat OpenShift (preferred) or VMware Kubernetes application deployment GCP (preferred) or Public Cloud GitLab, Jenkins, Artifactory API / script development As part of our team, you will: Supporting network equipment, including routers, proxy servers, switches, DNS, and DHCP Design and implement new network solutions and/or improve the efficiency of current networks Help maintain our infrastructure, including dual-stack network design and management, dynamic routing protocols, and load balancing Implement Firewall rules

Step into a fast-moving, creative environment as a Mechanical CAD Drafter on Nokia's Optical Network Infrastructure - New Product Introduction team, where collaboration and innovation are at the heart of everything we do. In this critical role, you'll create detailed mechanical and electro-optical assembly drawings while working closely with design engineers to bring new products to life. Each project presents unique challenges and opportunities, allowing you to apply your skills across a diverse range of designs. Your work will directly contribute to Nokia's mission of delivering next-generation optical systems to customers worldwide. Join us at the forefront of optical technology in the telecommunications industry. Must Have Skills Associate degree in Mechanical Engineering Technology or related field Proficiency in computer-aided design (CAD) software Familiarity with Microsoft Office Suite Strong written and verbal communication skills High attention to detail Willingness to learn and adapt in a fast-paced and multitasking environment Preferred Qualifications 1+ years of experience as a CAD drafter Experience with Creo Parametric CAD software ASME Y14.5 Standard certified Familiarity with Windchill PDM software Experience using Agile PLM software Create detailed fabrication and assembly drawings based on direct requirements from design engineers Collaborate with design engineers and test set construction technicians to ensure drawings reflect final designs Support mechanical design engineers by updating marked-up prints and CAD models for test set racks, tooling fixtures, and piece-parts Upload and manage updated drawings using Agile PLM software

In an increasingly connected world, the pandemic has highlighted just how essential telecom networks are to keeping society running. The Network Infrastructure group is at the heart of a revolution to connectivity, pushing the boundaries to deliver more and faster network capacity to people worldwide through our ambition, innovation, and technical expertise Join Optical Networks division, where innovation meets scale in the AI-driven data center era. With the recent acquisition of Infinera, we've united two industry leaders to create an optical networking powerhouse-combining cutting-edge technology with proven leadership to redefine the future of connectivity. The successful candidate shall possess the capability to design and analyze high-speed, high-performance analog/mixed-signal circuits, including data converters, PLLs, and SERDES, in advanced CMOS FinFET technologies. She or he shall bring the design to production. Engaging in high-speed analog circuit design gives you the chance to create the technical differentiation that will allow Infinera to hold market leadership. By building cutting-edge circuitry, we will together revolutionize the era of efficient high-speed transmission. Mandatory Knowledge/Skills/Abilities: Must be extremely familiar with essential CAD tools, such as Cadence Virtuoso, Spectre, Incisive, Calibre, EMX, and Totem EM/IR, etc. Must have a proven tracking record of designing complex analog / mixed signal IPs or chips in deep submicron CMOS technologies. Must have experiences in bringing high performance analog IPs including but not limited to high-speed ADC, high-speed DAC, and high-frequency low-jitter PLL to production. Must have a decent understanding in CMOS analog / mixed signal design methodologies and circuit analysis; Must have a good understanding of device physics and the impacts of layout effects; Able to perform the behavioral modeling the blocks and circuits with Verilog-A or Verilog-AMS; Collaborative with other local or remote team members in a fast-paced professional environment. Preferred Knowledge/Skill/Abilities: Fluent in verbal and written communications; Independently resolves issues and conquer design challenges; Self-motivated and detail-oriented; Has the knowledge of (optical) communication theories and Matlab coding. Education and Experience Requirements: Principal Design Engineer: M.S. in E.E. with 12+ years' experience, or Ph.D. in E.E. with 8+ years' experience Design, implement, and simulate the functionality and performance of various high speed analog circuits, including the ADCs and DACs; Create the layout floor plans to optimize the overall performance; Supervise the layout activities and give concise guidelines to layout engineers, need to be hands on in drawing layout if necessary; Exploring the trade-offs of the different topologies and propose the best solution to achieve or exceed the requirements in terms of power/area/linearity/bandwidth, etc. Develop the analog testing plans and work with the PE/TE teams to characterize the functionality and performance of the products to ensure the quality; Need to support and comply with the team's design methodologies and release flows.