Asic design engineer job description

Job Description Must be a US Citizen.

The client, in support of a U.S Government Customer, has a need for an experienced and growth minded mission engineer in the area of ASIC Physical Design. This engineer will assist in the Top-Level Physical Design integration for an in-flight non-traditional ASIC to be released towards to the end of the year. Prior experience with both the Cadence Innovus Design suite, as well as GlobalFoundries / Avera Semi / Marvell s FX14 custom ASIC flow (i.e. Dflow) is a must. In addition, hands-on experience with top-level integration is required, as well as familiarity with Block Level integration. This engineer will assist to seamless integrate the top-level, pulling-in Blocks/RLMs from other engineers, while coordinating with them to take a netlist thru all steps in the flow. This includes planning, placement, clock insertion, wiring, checking, as well as static timing optimization through the various stages. The selected candidate will be required to work both independently and collaboratively in conjunction with other members of the team. As such, the ability to be a hands-on person is critical, capable of running tools, while working effectively with others, having the willingness and ability to learn new tools. Similarly, the ability to do analytical placement and pre-routing beyond what the tools can achieve is a requirement, for those critical elements of the design requiring higher densities. In doing so, knowledge/use of scripting languages such as TCL and/or Python to facilitate such tasks.

Task Description:
Job Duty 1 - Assisting in the design, development, and physical design integration at the top-level of an ASIC and its associated components.
Job Duty 2 - A working knowledge of analyst tools to include: Innovus Place, Innovus CCopt, Innuvus Nanoroute. Familiarity with Tempus.
Job Duty 3 Ability to optimize the design solution based on area, power, or timing, including timing closure, when needed, in order to meet required performance targets.

Required skills/Level of Experience :
1) Refer to Job duties above (i.e. all tools necessary to do physical integration of a complex ASIC).
2) Other: Strong verbal and written communication skills required.
3) Extensive experience as an Electrical / Computer Engineering, 5 years

Infinera is a global supplier of innovative networking solutions. Our customers include the leading service providers, data center operators, internet content providers (ICPs), cable operators, enterprises, and government agencies worldwide, including 9 of the top 10 Tier 1 service providers and 6 of the top 7 ICPs. We design, develop and deliver hardware and software for fiber-based connectivity solutions that span access, aggregation, metro, long haul, and submarine network. Our industry-leading, trendsetting edge-to-core solutions provide the foundation for many of the world's largest and most demanding networks that generate billions in service revenue for our customers.
Title: ASIC Physical Design Engineer
Location: San Jose, CA

Your Key Responsibilities Would Include:Perform physical implementation steps including floor planning, place and route, power/clock distribution for congestion analysis and timing closure at block level as well as full chip Work with logic designers to drive feasibility studies and explore design trade-off for physical design closure Perform technical evaluations of vendor, process nodes and IP and provide recommendations Develop physical design methodologies and automation scripts for various implementation steps from Synthesis to GDSIIPerform static timing analysis, create timing constraints and validation, critical path analysis, timing closure and timing sign-off Education & Experience Necessary For Success:

5+ years of experience in ASIC physical design flow and methodologies in 5/7nm and 16nm process nodes Has solid knowledge of full design cycle from RTL to GDSII and understanding of underlaying concepts of IC design, implementation flows and methodologies for deep submicron design Experience with EDA Place & Route tools like ICC2 or Innovus or similar tools and Timing tools like Primetime or similar Scripting experience in TCL, python or perl Candidates must have a Bachelor's Degree or higher in Electrical/Electronics and Communication/VLSI/Microelectronics with very good academics..

Please note that Infinera has adopted a mandatory COVID-19 vaccination policy to safeguard the health and well-being of our employees. As a condition of employment, our employees are required to be fully vaccinated for COVID-19, unless a reasonable accommodation for a medical/disability or religious basis is approved or as otherwise required by law. Candidates are not required to and must not furnish proof of vaccination or request an accommodation during the application process. Candidates will be required to do so only after a job offer has been extended and prior to their start date if they accept the job offer. A person is fully vaccinated against COVID-19 if the person has received one dose of the Johnson & Johnson COVID-19 vaccine or two doses of the Pfizer or Moderna vaccine and two weeks have passed since receiving the final dose of the vaccine.

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Infinera is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, sex, color, religion, sexual orientation, gender identity, national origin, disability status, protected veteran status, or any other characteristic protected by law. Infinera complies with all applicable state and local laws governing nondiscrimination in employment.

EchoStar Corporation (NASDAQ: SATS) is a premier global provider of satellite communication solutions. Headquartered in Englewood, Colo., and conducting business around the globe, EchoStar is a pioneer in communications technologies through its Hughes Network Systems and EchoStar Satellite Services business segments. For more information, visit echostar.com. Follow @EchoStar on Twitter.

Hughes Network Systems has an exciting opportunity for an ASIC/VLSI Engineer to support our wireless and satellite communications products. This position will be located at our headquarters in Germantown, Maryland.
Responsibilities:
Responsible for all aspects of modulator and demodulator design and development for ASIC devices: this includes, but is not limited to, conception of new product development design, requirements definition, system design, signal processing algorithm development, performance verification and hardware and software subsystem integration.

Requirements:
Bachelor's degree in Electrical Engineering, Computer Engineering or related technical field5+ year's work experience in digital communications and digital signal processing. Previous experience in the design of satellite communication or wireless modulators, demodulators, and FEC decoders.

Preferred Qualifications:
Master's degree in Electrical Engineering, Computer Engineering or related technical field Experience with development of ASIC/FPGA hardware subsystems for communication productions. Standards such as DVB-S2X, and 5GWorking knowledge of fixed point implementation of signal processing algorithms for communication systems, developing bit-accurate and cycle accurate models in C++ or System Verilog, mapping signal processing algorithms to hardware implementation, and providing test vectors for hardware verification.Familiarity with System Verilog, and UVM Verification a plus.

Will be eligible for discretionary bonus, with funding based on company performance.
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EchoStar is committed to offering a comprehensive and competitive benefits package. Our programs are designed to provide you with the ability to customize your benefits to best meet the needs of you and your family. Our philosophy for these programs is to support and encourage healthy living and wellness. Our benefits package covers it all-from healthcare savings plans to education assistance and more!
Financial: 401(k) retirement savings plan with company match; employee stock purchase plan; profit-sharing; company-paid life insurance, AD&D and disability Work-Life Balance: Paid Time Off (PTO), company-paid holidays, health and wellness events, exercise and sports facilities (locations may vary) Employee Incentives: Tuition reimbursement, employee referral program, year round employee events and community programs, discounts on Dish Network and HughesNetHealth: Medical, Dental, Vision, Employee Assistance Program (EAP), Health Savings Account (HSA) with opportunities to earn employer contributions; Health Care, Dependent Care and Transportation Flexible Spending Accounts (FSA)

EchoStar and its Affiliated Companies are committed to hiring and retaining a diverse workforce. We are an Equal Opportunity/Affirmative Action employer and will consider all qualified applicants for employment without regard to race, color, religion, gender, pregnancy, sex, sexual orientation, gender identity, national origin, age, genetic information, protected veteran status, disability, or any other basis protected by local, state, or federal law. U.S. Persons or those able to obtain and maintain U.S. government security clearances may be required for certain positions. EEO is the law.