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ASIC Design Engineer - Cache Controller
Apple Inc. 4.8
Computer hardware developer job in Santa Clara, CA
Santa Clara, California, United States Hardware
Apple is building the world's fastest highly parallel mobile processing systems. Our high-bandwidth multi-client memory subsystems are blazing new territory with every generation. As we increase levels of parallelism, bandwidth and capacity, we are presented with design challenges exacerbated by clients with varying but simultaneous needs such as real-time, low latency, and high-bandwidth. In this role, you will work on crafting special purpose cache and controller which is part and parcel of the SOC memory hierarchy.
Responsibilities
Design and develophardware for cache subsystem in high performance system on a chip (SoC).
Develop cache micro-architecture based on architecture guidelines and model analysis.
Explore architecture trade-offs in system performance, area, and power consumption.
Develop and debug register-transfer level (RTL) design of various sections in the cache subsystem.
Work on front-end netlist and area/timing analysis of the cache subsystem.
Work with physical design team on the timing closure of the cache subsystem.
Minimum Qualifications
10 + years of full time ASIC design experience in:
Memory system development
PPA (performance/power/area) analysis
Cache design background including an understanding of different memory organizations and tradeoffs.
Hands on Experience with multi-processor cache coherence protocols
B.S. in a relevant field
Preferred Qualifications
Knowledge of high-performance coherent memory systems or interconnect architectures
Knowledge of high-performance DRAM controller
M.S in a relevant field.
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $181,100 and $318,400, and your base pay will depend on your skills, qualifications, experience, and location.
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.
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$181.1k-318.4k yearly 2d ago
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New Grad Physical Design Engineer - ASIC/VLSI + Equity
Nvidia Corporation 4.9
Computer hardware developer job in Santa Clara, CA
A leading technology company in Santa Clara is seeking a Physical Design Engineer. The role involves developing chip floor plans, implementing design methodologies, and working with EDA tools. Ideal candidates hold a BSEE, MSEE or PhD and have deep knowledge in VLSI and physical design concepts. Competitive salary ranges from $96,000 to $184,000 depending on experience. Join a diverse team in a dynamic and innovative environment.
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$96k-184k yearly 1d ago
GPU/ML Shader Core ASIC Design Engineer
Advanced Micro Devices 4.9
Computer hardware developer job in Santa Clara, CA
A leading technology company in Santa Clara seeks an experienced ASIC Design Engineer specializing in GPU/ML Shader Core. In this role, you will define micro-architecture, implement RTL, and collaborate with various engineering teams. Ideal candidates will have experience in micro-architecture and an undergraduate degree in Computer Engineering or Electrical Engineering. Enjoy a vibrant culture that fosters innovation and teamwork, while pushing the boundaries of next-generation computing. This role does not offer visa sponsorship.
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$112k-148k yearly est. 3d ago
Sr. ASIC Design Engineer (Silicon Engineering)
Jobr.Pro
Computer hardware developer job in Sunnyvale, CA
SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.
SR. ASIC DESIGN ENGINEER (SILICON ENGINEERING)
At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system - thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We've only begun to scratch the surface of Starlink's potential global impact and are looking for best‑in‑class engineers to help maximize Starlink's utility for communities and businesses around the globe.
We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world‑class cross‑disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting‑edge next‑generation FPGAs and ASICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your efforts will help deliver cutting‑edge solutions that will expand the performance and capabilities of the Starlink network.
Responsibilities:
Evaluate architectural trade‑offs based on features, performance requirements and system limitations
Define micro‑architecture, implement the RTL in Verilog/System Verilog, integrate that in top level and deliver the fully verified, synthesis/timing clean design
Work closely with verification team to ensure all aspects of the design are covered and verified
Provide timing constraints for those IPs and support the physical implementation team (synthesis, timing closure, formality check)
Participate in silicon bring‑up and validation
Basic Qualifications:
Bachelor's degree in electrical engineering, computer engineering, or computer science
5+ years of experience in RTL implementation
Preferred Skills And Experience:
Ability to solve complex problems including clock domain crossings and power optimization
ASIC/SoC system integration experience
Experience with multicore CPU subsystem design
Experience with standard bus protocols (e.g. AXI, AHB, etc.)
Experience with embedded processors
Experience with high speed and low power design techniques
Scripting skills (Python, TCL, etc.)
Experience with EDA tools such as HDL simulators (e.g. VCS, Questa, IES), HDL lint tools (e.g. Spyglass) and FPGA tools (e.g. Xilinx Vivado, Altera Quartus II)
Ability to work in a dynamic environment with changing needs and requirements
Team‑player, can‑do attitude and ability to work well in a group environment while still contributing on an individual basis
Enjoys being challenged and learning new skills
Additional Requirements:
Must be willing to work extended hours and weekends as needed
Compensation & Benefits:
Pay range: $170,000.00 - $230,000.00 per year.
Your actual level and base salary will be determined on a case‑by‑case basis and may vary based on the following considerations: job‑related knowledge and skills, education, and experience.
Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long‑term incentives, in the form of company stock, stock options, or long‑term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan.
You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short & long‑term disability insurance, life insurance, paid parental leave, and various other discounts and perks.
You may also accrue 3 weeks of paid vacation and will be eligible for 10 or more paid holidays per year. Exempt employees are eligible for 5 days of sick leave per year.
Itar Requirements:
To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.
SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
Applicants wishing to view a copy of SpaceX's affirmative action plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should reach out to ************************.
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A leading technology company is seeking an experienced Front-End ASIC Design Engineer located in Milpitas, CA. The role involves overseeing ASIC execution phases, ensuring design performance and meeting project deadlines. Candidates should have at least 5 years of experience in micro-architecture and front-end design, along with strong skills in digital design and customer support. The position offers competitive compensation between $195,000 and $210,000 annually.
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$195k-210k yearly 2d ago
ASIC Engineer, Emulation
Meta 4.8
Computer hardware developer job in Sunnyvale, CA
Engineers with experience in HW emulation and prototyping required to build ASIC/System on Chip (SoC) and IP for data center applications.
Responsibilities
Deliver high-quality emulation and prototyping models on industry-standard emulation and prototyping platforms
Design, build, and execute comprehensive emulation test plans to ensure model accuracy and support pre-silicon validation efforts
Lead the development and adoption of best-in-class emulation methodologies to accelerate hardware verification and software development
Collaborate with Design, DV, validation, and software teams to develop tools, flows, and mechanisms that demonstrate key performance indicators such as functionality, performance, and power efficiency
Enhance and mature standard interfaces including PCIe, DDRx, USB, and other interfaces on emulation components such as speed bridges, transactors, and virtual components
Continuously improve the efficiency and effectiveness of emulation components and workflows for testing, debugging, analysis, and automation
Partner with vendors to troubleshoot issues, deploy new emulation capabilities, and drive ongoing improvements
Minimum Qualifications
Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
6+ Years of experience with EDA tools and scripting languages used to build tools and flows for complex emulation environments
Experience with current emulation technologies and methods, simulation acceleration, in-circuit emulation, speed bridges, virtual prototyping, and hybrid methods
Preferred Qualifications
Track record of successful ASIC/SoC where emulation is a critical workflow
Experienced in compilation and build flows and creating build flows from scratch with necessary design modifications for emulation
Experience in creating emulation systems for Multi-chip/SoC/IP designs and understanding of trade-offs between emulation resource consumptions, performance and ease of debug
Experience managing multiple programs and enabling verification to achieve coverage closure and SW to achieve left shift of software development
Experience with SystemVerilog and C++ to model RTL components and transactors
Experience with post-silicon bring up, debug, and reproducing issues on emulators
Experience with cadence (palladium/protium) and Synopsys (zebu) tools
Experience with scripting languages such as Python, Perl and TCL
Public Compensation
$142,000/year to $203,000/year + bonus + equity + benefits
Industry
Internet
Equal Opportunity
Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.
Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@fb.com.
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$142k-203k yearly 4d ago
Senior ASIC Physical Design Engineer - TPU AI Hardware
Google Inc. 4.8
Computer hardware developer job in Sunnyvale, CA
A leading technology company located in Sunnyvale, CA is looking for an ASIC Physical Design Engineer to drive the development of cutting-edge TPU technology, crucial for AI/ML applications. The role requires 7 years of physical design experience, proficiency in Python, and collaboration with various teams to optimize design outcomes. The position offers a competitive salary range of $156,000-$229,000, plus bonus and benefits.
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$156k-229k yearly 2d ago
Founding Hardware Design Engineer FT $180-250K Visa OK
Career Mentors, LLC
Computer hardware developer job in San Francisco, CA
Founding Hardware Design Engineer
(Path to Director of Engineering Design)
🕒 Employment Type: Full-time 🏢 Work Policy: On-site, 5 days/week 👥 Hiring Count: 3 positions available 💰 Salary: $180,000 - $250,000 base
📈 Equity: Competitive, early-stage
🌍 Visa Sponsorship: Available
About Our Client
Our Client is a prestigious, well-funded startup building high-fidelity reinforcement learning (RL) environments that allow AI systems to master real-world engineering. The company distills expert workflows from IP-locked, constraint-heavy domains, enabling AI models to reason about, design, and validate physical systems.
Starting with hardware and chip design, the platform is designed to expand into mechanics, manufacturing, and other engineered systems that shape the real world. The team works closely with frontier AI labs, AI accelerator companies, and advanced research organizations.
The Role
We are hiring Founding Hardware Design Engineers to define the technical foundation of our hardware-focused RL environments. This is a senior, high-impact role that begins as a hands-on individual contributor and scales into a Director of Engineering Design position for high performers.
You will be responsible for translating real-world hardware engineering knowledge into environments that AI systems can learn from-balancing correctness, realism, and scalability-while helping define the technical culture and standards of the company.
What You'll Do
Design and implement RTL-level simulation environments for reinforcement learning
Translate real hardware constraints into reward functions, state spaces, and evaluation metrics
Architect, validate, and curate high-quality chip design problems for AI training
Build and own a reusable catalog of parameterized ASIC/SoC design tasks
Collaborate closely with AI researchers and research-driven customers
Identify, document, and mitigate failure modes of LLMs and RL agents in hardware design
Drive curriculum and roadmap development for how models learn engineering concepts
Set a high technical bar for correctness, rigor, and realism
Seniority & Experience
4-10 years of experience as a Hardware Design Engineer with front-end ASIC/SoC RTL focus
Proven experience in pre-silicon digital design (RTL) with a demonstrated record of successful tape-outs, including advanced technology nodes
Strong startup mentality, gained through early-stage companies or 0→1 system-building experience
Experience with ML and RL environments or prior work at NVIDIA, Apple Silicon, Google TPU, or AI accelerator companies is highly valued
Demonstrated agency, ownership, and clear communication skills
Hard Skills
Deep expertise in RTL hardware design
Ability to validate, assess, and curate chip design quality
Experience architecting complex subsystem IPs and hardware accelerators
Strong understanding of design constraints, tradeoffs, and correctness
Soft Skills
Clear communicator able to distill complex hardware concepts into simple ideas for AI researchers with limited hardware backgrounds
High agency and ownership to drive curriculum and technical roadmap development
Comfortable operating in ambiguity and working cross-functionally in fast-moving environments
What We Value
Correctness over demos
First-principles thinking
Intellectual honesty about AI limitations
Ownership, accountability, and execution
Clear, thoughtful communication across disciplines
Interview Process
Behavioral Interview (30 minutes)
Deep dive into experience, motivation, and seniority fit
Coding Take-Home (2-3 hours)
Build a simple RL environment representative of real internal work
Take-Home Review (30-45 minutes)
Walkthrough of your approach and design decisions with the CTO
TopTech Talent is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.
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$180k-250k yearly 4d ago
Electrical Engineer, Power Electronics
Until
Computer hardware developer job in San Francisco, CA
Until is a moonshot company building a “pause button” for biology. Our near‑term focus is organ‑scale reversible cryopreservation: preserving donated organs at subzero temperatures without ice formation, then rewarming them uniformly for transplant. By solving this grand challenge, we're laying the foundation for whole‑body reversible cryopreservation, giving patients a bridge to future cures.
To achieve our goal, we are assembling an interdisciplinary team to develop perfusion systems, cryoprotectant formulations, and vitrification and rewarming hardware.
We envision a future where no transplantable organ is lost to logistics, and no terminal diagnosis is final because patients can safely wait for future medicine to arrive.
About the Role
One of the key outstanding challenges in the field has been the rewarming problem: how do we rapidly and uniformly rewarm large samples to press play on cryopreserved biology? One of the key ingredients is building N‑of‑1 electrical systems. Doing so requires a fast paced, scrappy team of electrical engineers and physicists who want to make technology indistinguishable from magic.
About You
Track record of exceptional engineering abilities
Deep understanding of analog circuit and electromagnetics fundamentals
Experience designing, simulating, and building high frequency circuits
Desire to join a small, fast paced team on an excellent adventure
Preferred Qualifications
Experience working at a startup
3+ years relevant experience/graduate degree in electrical engineering
Experience with high voltage systems
Experience with induction heater design
Experience with HF PCB bringup
Experience with mixed signal circuit simulation
Benefits
Opportunity for outsized impact creating the future as an early team member
Generous medical, dental and vision insurance coverage
Flexible time off and paid holidays
Competitive compensation package, including salary and equity
Access to a 401(k) retirement savings plan
FSA and commuter benefits
Subsidized lunch daily
Salary Range: $120,000 - $200,000 a year. While this represents our expected range based on market data, final compensation will be determined based on your specific qualifications and may be outside this range. Please keep in mind that the equity portion of the offer is not included in this estimate.
As an equal opportunity employer, Until is committed to providing employment opportunities to all individuals. All applicants for positions at Until will be treated without regard to race, color, ethnicity, religion, sex, gender, gender identity and expression, sexual orientation, national origin, disability, age, marital status, veteran status, pregnancy, or any other basis prohibited by applicable law.
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$120k-200k yearly 1d ago
Hardware Engineer (founding)
Needl
Computer hardware developer job in San Jose, CA
Founding Hardware Engineer (Stealth Robotics Startup)
On-Site • San Francisco, CA
About Us
We're a tiny, fast-moving team building autonomous systems for heavy industrial machines. We retrofit existing equipment with a plug-and-play autonomy kit that taps directly into machine controls and layers on a full perception + connectivity stack: multi-sensor vision, LiDAR, high-precision GNSS, IMU, and a low-latency tele-operation network.
In just a few months, we've gone from first prototype to real machines operating on active job sites, with early recurring revenue and a growing pipeline of paid pilots. We're backed by top-tier early-stage investors along with a group of founder-operators who know what it takes to build in the real world.
Our founding team has built and shipped hardware, software, and robotics systems before. We thrive where physical machinery, harsh environments, and rapid iteration collide.
Why Join Us
You want to work on problems that actually matter - fixing how the world builds things. Construction is the backbone of civilization, and it's currently broken. We're here to change that.
You don't want a cushy robotics lab job. You want to build robots in the mud, on real sites, under real constraints. You'd rather spend a week living out of a dusty RV next to a machine you're debugging than polishing a slide deck.
You want to see your designs move 20-50 tons of real hardware. You want to feel the stakes.
You want teammates who operate at founder-level intensity and ownership.
About You
You're a hacker at heart - the kind of person who gets a prototype working before most people finish their planning doc.
You've built something from scratch: a company, a product, a robot, a system - success not required, agency absolutely required.
You work extremely hard, laugh often, and don't mind chaos. You prefer “figure it out now” to “wait for perfect requirements.”
What You'll Own
As a founding Hardware / Mechatronics Engineer, you'll design and build the core systems that enable remote operation, sensing, and autonomy assistance on industrial machines. You'll work across mechanical, electrical, and embedded disciplines, often all in the same day.
System Design & Prototyping
Architect and build tele-operation hardware systems, including power, compute, and control modules for machine retrofits.
Sensor Integration
Integrate and calibrate cameras, LiDAR, radar, GNSS, IMUs, and other sensors using interfaces like GMSL, CAN, and Ethernet.
Electrical & Mechanical Integration
Design robust wiring harnesses, brackets, mounts, and enclosures that survive real-world abuse.
Communication Interfaces
Implement and validate CAN, LIN, J1939, Serial, and Ethernet connections with both existing ECUs and custom control hardware.
Manufacturing & DFM
Work with vendors to bring designs from scrappy prototypes to reliable production, including DFM, testing, and validation.
Testing & Validation
Lead machine bring-up, HIL testing, and on-site debugging alongside software and autonomy engineers.
Documentation & Design
Produce schematics, harness drawings, CAD models, assembly docs, and anything else needed to build and scale the hardware.
Compensation & Support
Base: ~$200-300k
Equity: ~1-3%
Full health/dental/vision, relocation + visa support, downtown SF workspace with full electronics/mech prototyping tools, 401(k), high-spec laptop, and budget for any gear you need.
$200k-300k yearly 2d ago
Electrical Engineer-High Frequency Power Electronics
Atomic Semi
Computer hardware developer job in San Francisco, CA
Atomic Semi is building a small, fast semiconductor fab.
It's already possible to build this with today's technology and a few simplifications. We'll build the tools ourselves so we can quickly iterate and improve.
We're building a small team of exceptional, hands-on engineers to make this happen. Mechanical, electrical, hardware, computer, and process. We'll own the stack from atoms to architecture. Our team is optimistic about the future and we want to continue pushing the limits of technology.
Smaller is better. Faster is better. Building it ourselves is better.
We believe our team and lab can build anything. We've set up 3D printers, a wide array of microscopes, e-beam writers, general fabrication equipment - and whatever is missing, we'll just invent along the way.
Atomic was founded by Sam Zeloof and Jim Keller. Sam is best known for making chips in his garage, and Jim has been a leader in the semiconductor industry for the past 40 years.
About the role
We are looking for an enthusiastic RF power engineer who can rapidly develop compact RF systems from gathering requirements to the production stage. You will get to own entire RF power systems while working closely with other engineers to enable small and fast semiconductor plasma systems. You will be exposed to many diverse problems and will need to move through design cycles quickly. The ideal candidate is self driven and proactive in figuring out the necessary tasks to complete. A portfolio of previous work is required for this application. Show us what you have built!
Responsibilities
Designing complete RF power systems from architecture to schematic to layout
Ensure accurate RF power diagnostics and metrology
Collaborate with engineers and scientists to gather system requirements
Creation of firmware requirements
Source components and lead manufacturing effort
Required Experience
Complete end to end ownership of RF systems
RF resonant power amplifier design in the 100s of Watts range
RF power measurement sensor design
Hands on prototyping and testing
Cable harness design, documentation, and fabrication
Nice-to-have
Advanced degree in power electronics or related field
Plasma systems experience
Systems engineering and integration
Working at Atomic Semi
We're an early-stage hardware startup with solid funding, world-class advisors, and a lab/office in San Francisco, CA.
Compensation: Atomic Semi is committed to fair and equitable compensation practices. The annual salary range for this role is $120,000 - $160,000. Compensation is determined based on your qualifications and experience. Our total compensation package also includes generous equity in Atomic Semi.
Benefits: Atomic Semi offers the following benefits, subject to applicable eligibility requirements:
Medical, Dental, and Vision insurance
Generous Paid Time Off inclusive of Holidays and Sick Time
Visa Sponsorship
Life and Disability Insurance
Paid Parental Leave
401(k) retirement plan
Weekly Learning & Development opportunities
Commuter Benefits including Parking and Late Night Uber rides from the office
Lunches daily, Dinners 3x per week, Stocked Office Kitchen with Snacks and Spindrifts
We are an equal-opportunity employer and do not discriminate on the basis of race, religion, national origin, gender, sexual orientation, age, veteran status, disability or other legally protected statuses.
Export Control Analysis:This position involves access to technology that is subject to U.S. export controls. Any job offer made will be contingent upon the applicant's capacity to serve in compliance with U.S. export controls.
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$120k-160k yearly 4d ago
EE Hardware Design Engineer
Array Labs Inc.
Computer hardware developer job in Palo Alto, CA
At Array Labs, we are building the world's most advanced satellite radar constellation to create a high-resolution 3D digital twin of the Earth. Our mission is to provide "lidar-like" 3D data and imagery from space, serving critical applications for both commercial and defense customers.
This is a deep tech challenge in the truest sense. We're solving complex problems that span hardware, software, and data-from designing satellite systems for the harshness of space to building the massive "data factory" that turns raw sensor data into beautiful 3D products. We are looking for first-principles engineers who want to build, deploy, and scale a one-of-a-kind, vertically-integrated system from the ground up.
The hardware engineering team is responsible for the analysis and design of our satellite and ground-station electronics, which spans the range of radar, communications, power management and processing subsystems.
As a lead engineer, you will own the design of hardware solutions that will be integrated into satellites and cutting-edge ground infrastructure. You will work cross-functionally with our antenna, RF, communications and radar engineers to rapidly move from clean-sheet designs to full operational deployment in space.
In this role, you'll help shape the design of the world's first formation-flying radar imaging constellation, which will deliver a quantum-leap in humanity's ability to rapidly and comprehensively understand our ever-changing world.
Responsibilities
Develop advanced electronic platforms, from architecture to manufacturing
Work closely with software, firmware, RF, antenna, digital, and mechanical design engineers to design and validate state-of-the-art spacecraft electronics
Create requirements, perform system trades, select components, capture schematics, design complex electronic assemblies and manage manufacturing
Lead prototyping, hardware bring-up, debug, manufacturing, and test campaigns.
Rapidly iterate on and improve electronic designs based on laboratory, environmental and on-orbit testing
Basic Qualifications
B.S. in Electrical Engineering, or a related field.
Experience in electronics design, fabrication, and test
Excellent teamwork and communication skills
Learns new concepts rapidly, completely, and in a self-directed manner
High levels of self-motivation and personal accountability
Ability to work in a fast-paced environment under significant time constraints
Preferred Skills and Experience
Bachelor's or Master's degree in electrical engineering, or a related field
4+ years of proven electrical engineering work experience with full-life cycle development (concept to production) of consumer electronics, power electronics, communications, automotive, aerospace, and/or robotics
Solid background in high-speed board design, simulation, and validation techniques including PCB stack-up, PCB fabrication, floorplanning, component selection, placement and routing, simulation and measurement
Solid background in electromagnetic theory and RF fundamentals such as s-parameters, transmission lines, and broadband impedance matching
Hands-on experience designing high-performance platforms including compute (SoCs, FPGAs, MCUs),storage (DDR, SSDs),high-speed interfaces (PCIe, SPI, JESD204B),RF components (PAs, LNAs, switches)
Proficiency with schematic capture and layout using CAD tools such as Altium Designer, Allegro, and ORCAD
Experience with EMC requirements and EMI mitigation techniques
Expertise in signal and power integrity simulation and measurement
Expertise in EM and thermal simulation of printed circuit boards
Experience with analysis and simulation tools such as LTSPICE, ADS and Microwave Office
Experience with data analysis and programming in MATLAB or python
Hands-on experience with test equipment such as oscilloscopes and network analyzers
ITAR Requirements
To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State.
Equal Opportunity Employer
Array Labs is an Equal Opportunity Employer. Employment decisions are made on the basis of merit, competence, and job qualifications and will not be influenced in any manner by gender, color, race, ethnicity, national origin, sexual orientation, religion, age, gender identity, veteran status, disability status, marital status, mental or physical disability or any other legally protected status.
$U150,000 - $U300,000 a year
Interview Process
We will conduct three interviews via Zoom; the typical process takes around 2-4 weeks to complete from start to finish.
Hiring and Compensation Strategy
Our hiring and compensation strategy is simple:
1) find uncommonly good people
2) pay them uncommonly well
You can anticipate competitive pay, with high flexibility between salary and equity-based compensation.
Why you should join Array Labs
Array Labs is launching a constellation of satellites to create the first high-resolution, real-time, three-dimensional model of Earth. Our next-generation satellite technology will offer image quality 60x greater than traditional techniques, profoundly expanding humanity's ability to understand and respond to events on a global scale.
In forging an affordable, accessible, accurate representation of Earth, our work has the potential to transform the face of dozens of fields, including autonomy, telecommunications, disaster relief, gaming, climate science, defense and construction.
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Computer hardware developer job in San Francisco, CA
An innovative tech company in San Francisco is seeking a driven Hardware Design Engineer to design cutting-edge hardware solutions for modern data center AI applications. The ideal candidate will have a degree in Electrical or Computer Engineering and extensive experience in hardware system design. This role offers the opportunity to collaborate with cross-functional teams and shape the future of AI infrastructure while being part of a passionate and innovative team.
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$112k-159k yearly est. 4d ago
Embedded Hardware Engineer - Sensor & Systems
Specter
Computer hardware developer job in San Francisco, CA
A technology startup in San Francisco is seeking an experienced Electrical Engineer to lead the design and development of robust sensor systems. The ideal candidate will have over 3 years of experience in electronic hardware design, with skills in debugging and embedded systems. Responsibilities include collaborating with cross-functional teams and owning the design of embedded controllers. The company emphasizes innovation and operates at the forefront of technology, making it a great opportunity for anyone passionate about advancing the field.
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$117k-173k yearly est. 5d ago
Research-Hardware Codesign Engineer
Openai 4.2
Computer hardware developer job in San Francisco, CA
Research-Hardware Codesign Engineer | OpenAI
Careers
Research-Hardware Codesign Engineer
Hardware - San Francisco
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About the Team
OpenAI's Hardware organization develops silicon and system-level solutions designed for the unique demands of advanced AI workloads. The team is responsible for building the next generation of AI silicon while working closely with software and research partners to co-design hardware tightly integrated with AI models. In addition to delivering production-grade silicon for OpenAI's supercomputing infrastructure, the team also creates custom design tools and methodologies that accelerate innovation and enable hardware optimized specifically for AI.
About the Role
We're seeking a Research-Hardware Codesign Engineer to operate at the boundary between model research and silicon/system architecture. You'll help shape the numerics, architecture, and technology bets of future OpenAI silicon in collaboration with both Research and Hardware.
Your work will include debugging gaps between rooflines and reality, writing quantization kernels, derisking numerics via model evals, quantifying system architecture tradeoffs, and implementing novel numeric RTL. This is a hands‑on role for people who go looking for hard problems, get to ground truth, and drive it to production. Strong prioritization and clear, honest communication are essential.
Location: San Francisco, CA (Hybrid: 3 days/week onsite)
Relocation assistance available.
In this role:
Build on our roofline simulator to track evolving workloads, and deliver analyses that quantify the impact of system architecture decisions and support technology pathfinding.
Debug gaps between performance simulation and real measurements; clearly communicate root cause, bottlenecks, and invalid assumptions.
Write emulation kernels for low‑precision numerics and lossy compression schemes, and get Research the information they need to trade efficiency with model quality.
Prototype numerics modules by pushing RTL through synthesis; hand off novel numerics cleanly, or occasionally own an RTL module end‑to‑end.
Proactively pull in new ML workloads, prototype them with rooflines and/or functional simulation, and drive initial evaluation of new opportunities or risks.
Understand the whole picture from ML science to hardware optimization, and slice this end‑to‑end objective into near‑term deliverables.
Build ad‑hoc collaborations across teams with very different goals and areas of expertise, and keep progress unblocked.
Communicate design tradeoffs clearly with explicit assumptions and confidence levels; produce a trail of evidence that enables confident execution.
You Will Thrive in this Role if:
An exceptional track record of high‑quality technical output, and a bias for shipping a prototype now and iterating later in the absence of clear requirements.
Strong Python, and C++ or Rust, with a cautious attitude toward correctness and an intuition for clean extensibility.
Experience writing Triton, CUDA, or similar, and an understanding of the resulting mapping of tensor ops to functional units.
Working knowledge of PyTorch or JAX; experience in large ML codebases is a plus.
Practical understanding of floating point numerics, the ML tradeoffs of reduced precision, and the current state of the art in model quantization.
Deep understanding of transformer models, and strong intuition for transformer rooflines and the tradeoffs of sharded training and inference in large‑scale ML systems.
Experience writing RTL (especially for floating point logic) and understanding of PPA tradeoffs is a plus.
Strong cross‑functional communication (e.g. across ML researchers and hardware engineers); ability to slice ambiguous early‑incubation ideas into concrete arenas in which progress can be made.
About OpenAI
OpenAI is an AI research and deployment company dedicated to ensuring that general‑purpose artificial intelligence benefits all of humanity. We push the boundaries of the capabilities of AI systems and seek to safely deploy them to the world through our products. AI is an extremely powerful tool that must be created with safety and human needs at its core, and to achieve our mission, we must encompass and value the many different perspectives, voices, and experiences that form the full spectrum of humanity.
We are an equal opportunity employer, and we do not discriminate on the basis of race, religion, color, national origin, sex, sexual orientation, age, veteran status, disability, genetic information, or other applicable legally protected characteristic.
For additional information, please see OpenAI's Aff… .
Background checks for applicants will be administered in accordance with applicable law, and qualified applicants with arrest or conviction records will be considered for employment consistent with those laws, including the San Francisco Fair Chance Ordinance, the Los Angeles County Fair Chance Ordinance for Employers, and the California Fair Chance Act, for US‑based candidates. For unincorporated Los Angeles County workers: we reasonably believe that criminal history may have a direct, adverse and negative relationship with the following job duties, potentially resulting in the withdrawal of a conditional offer of employment: protect computerhardware entrusted to you from theft, loss or damage; return all computerhardware in your possession (including the data contained therein) upon termination of employment or end of assignment; and maintain the confidentiality of proprietary, confidential, and non‑public information. In addition, job duties require access to secure and protected information technology systems and related data security obligations.
To notify OpenAI that you believe this job posting is non‑compliant, please submit a report through this form . No response will be provided to inquiries unrelated to job posting compliance.
We are committed to providing reasonable accommodations to applicants with disabilities, and requests can be made via this link .
OpenAI Global Applicant Privacy Policy
At OpenAI, we believe artificial intelligence has the potential to help people solve immense global challenges, and we want the upside of AI to be widely shared. Join us in shaping the future of technology.
Compensation
$230K - $460K + Offers Equity
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Sr. Electrical Systems Engineer (Autonomous Vehicle Team)
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Computer hardware developer job in San Francisco, CA
About Foundation:
Foundation is developing the future of general purpose robotics and electric mobility with the goal to save lives and augment human labor.
Our mission is to create an autonomous, crewless ATV built to be truly all‑terrain. Designed for commercial and defense use, it can save lives and take on heavy transport across mining, agriculture, construction, and more.
We are on the lookout for extraordinary engineers and scientists to join our team. Your previous experience in robotics isn't a prerequisite - it's your talent and determination that truly count.
We expect that many of our team members will bring diverse perspectives from various industries and fields. We are looking for individuals with a proven record of exceptional ability and a history of creating things that work.
Our Culture:
We like to be frank and honest about who we are, so that people can decide for themselves if this is a culture they resonate with. Please read more about our culture here *******************************
Who should join:
You like working in person with a team in San Francisco.
You deeply believe that this is the most important mission for humanity and needs to happen yesterday.
You are highly technical - regardless of the role you are in. We are building technology; you need to understand technology well.
You care about aesthetics and design inside out. If it's not the best product ever, it bothers you, and you need to “fix” it.
You don't need someone to motivate you; you get things done.
Why We Are Hiring for This Role:
Own the end‑to‑end design of the vehicle electrical system, from power distribution to harness integration.
Develop schematics, harness drawings, and PCB‑level designs for subsystem interconnects.
Lead bench bring‑up of sensors, actuators, and compute subsystems prior to vehicle integration.
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Work closely with Mechanical Engineering on packaging and routing of harnesses.
Support system bring‑up during assembly, troubleshoot electrical issues, and drive root‑cause analysis. Collaborate with Embedded/Software to ensure clean power, comms, and integration for all subsystems.
What Kind of Person We Are Looking For:
Experience with sensors, actuators, and communication buses (CAN, Ethernet).
5-8+ years of experience in vehicle electrical systems, robotics, or related embedded hardware projects.
Strong background in power distribution, harnessing, and PCB‑level design.
Hands‑on experience debugging hardware in lab/bench settings.
Familiarity with grounding, shielding, and safety practices for LV and HV systems.
Comfortable working cross‑functionally and hands‑on in fast‑paced prototyping environments.
BS/MS in Electrical Engineering or related field.
We provide market standard benefits (health, vision, dental, 401k, etc.). Join us for the culture and the mission, not for the benefits.
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Electrical Test Engineer for a well-known consumer device company in Sunnyvale, CA
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Computer hardware developer job in Cupertino, CA
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Job Responsibilities:
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• Bachelor's degree in Electrical Engineering or related field
• Strong understanding of EE bench test equipment (oscilloscopes, meters, data loggers, power supplies)
• Extensive lab experience with an ownership-driven mindset
• Data-driven decision-making skills
• Strong documentation and communication skills
• Experience with automated test platforms and scripting (Python or similar)
• 3-5 years of relevant experience
Type: Contract
Duration: 12 months with extension
Work Location: Cupertino, CA (100% onsite)
Pay Rate: $50.00 - $65.00 (DOE)
How much does a computer hardware developer earn in San Jose, CA?
The average computer hardware developer in San Jose, CA earns between $95,000 and $179,000 annually. This compares to the national average computer hardware developer range of $74,000 to $133,000.
Average computer hardware developer salary in San Jose, CA
$130,000
What are the biggest employers of Computer Hardware Developers in San Jose, CA?
The biggest employers of Computer Hardware Developers in San Jose, CA are: