Senior verification engineer jobs in Framingham, MA - 725 jobs

Sr Design Verification Engineer (Remote) Full-time: Salary + Benefits + Bonuses / Contractor Work Status: US citizen or Lawful Permanent Resident. About the Role The ASIC Verification Engineer will play a crucial role in executing a comprehensive test strategy for future ASIC development. You will be part of a team creating automated regression suites, executing verification methodologies. As our ASIC Design Verification Engineer, you will: Test Strategy & Development Collaborate with design and other verification engineers to develop and execute test strategies. Write testbenches and test cases based on test plans. Develop and improve UVM frameworks. Contribute to unit-level and system-level verification deliverables. Become a key contributor to our ASIC verification framework, methodology, and test automation. Implement DSP verification environments to facilitate testing of the RTL against reference MATLAB and Python models Testing & Automation Run and automate regression tests. Analyze code and functional coverage and provide actionable feedback to the development and verification team. Prepare and present detailed reports on testing outcomes and verification strategies. Qualities of a Successful Candidate BS or MS in Electrical/Computer Engineering or equivalent. 10+ years of experience in ASIC verification. Proficiency in SystemVerilog and UVM for verification. Knowledge of verification for DSP algorithms and Mixed Signal systems. Nice to Have Familiarity with Cadence Xcelium simulators or similar tools. Knowledge of scripting languages such as Python or TCL. Experience working on Linux-based systems. The anticipated annual base salary for this position is between $135,000 to $165,000, which also includes a comprehensive benefits package. Full-Time Benefits 15 days of PTO per calendar year 10 paid Holidays per calendar year Comprehensive Medical Benefits: Company covers 80% of premiums for Employee and Dependents Dental & Vision: Company covers 50% of premiums for Employee and Dependents Voluntary Benefits: Life Insurance, FSA (Health and Dependent, Limited Purpose), HAS, and Gap Insurance Employee Assistant Program (EAP) 401k - Traditional & Roth Life/AD&D and Long-Term Disability Tuition reimbursement Equal Opportunity Policy Statement Encore Semi, Inc. is an Equal Opportunity Employer that does not discriminate on the basis of actual or perceived race, religion, creed, color, age, sex, sexual orientation, gender, gender identity or expression, national origin, genetics, ancestry, marital status, civil union status, medical condition, disability (mental and physical), military and veteran status, pregnancy, childbirth and related medical conditions, or any other characteristic protected by applicable federal, state, or local laws and ordinances. Encore Semi is also committed to compliance with all fair employment practices regarding citizenship and immigration status. #J-18808-Ljbffr

At WHOOP, we're on a mission to unlock human performance. WHOOP empowers members to perform at a higher level through a deeper understanding of their bodies and daily lives. WHOOP is seeking a Senior Embedded Engineer to drive the development and optimization of the hardware systems behind our cutting-edge wearable technology. As a critical member of this team, you will drive the design, development, and optimization of embedded systems that power WHOOP's devices, ensuring they meet the high standards of reliability and performance our members expect. Your expertise will directly impact WHOOP's ability to innovate and deliver transformative experiences. RESPONSIBILITIES: Drive the development and optimization of the hardware systems behind our cutting-edge wearable technology. Develop and optimize hardware systems for low-power, resource-constrained embedded environments, ensuring efficient and reliable device performance. Collaborate with cross-functional teams to define hardware requirements and support the integration of sensors, communication modules, and power management systems. Design, prototype, and test hardware components to ensure quality, scalability, and functionality align with product goals. Debug and resolve complex issues across the hardware stack, leveraging advanced diagnostic tools and methodologies. Support the selection and validation of electronic components, ensuring reliability and performance in real-world conditions. Contribute to the development and optimization of communication interfaces such as I2C, SPI, UART, and BLE for seamless connectivity. Conduct hardware performance analysis and testing to meet stringent power and reliability requirements for wearable devices. Collaborate with manufacturing teams to ensure robust design-for-manufacturing (DFM) and design-for-test (DFT) processes. QUALIFICATIONS: Master's degree in Computer Engineering, Electrical Engineering, or related technical field or foreign degree equivalent and 6 months experience with developing and debugging embedded hardware and software systems. 6 months of experience with programming languages (Python or similar); 6 months of experience with C, C++ or other scripting language. 6 months of experience working with microcontrollers, RTOS, and peripheral interfaces including I2C, SPI, UART, and BLE. 6 months of experience with low-power design and optimization techniques for battery-powered devices. 6 months of experience with debugging using tools including oscilloscopes, logic analyzers, and similar equipment. 6 months of experience solving problems and developing innovative solutions in the wearable or IoT space. 6 months of experience effectively communicating across technical and non-technical teams. Partial telecommuting permissible from home office within normal commuting distance. Interested in the role, but don't meet every qualification? We encourage you to still apply! At WHOOP, we believe there is much more to a candidate than what is written on paper, and we value character as much as experience. As we continue to build a diverse and inclusive environment, we encourage anyone is interested in this role to apply. WHOOP is an Equal Opportunity Employer and participates in E-verify to determine employment eligibility. It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability. The WHOOP compensation philosophy is designed to attract, motivate, and retain exceptional talent by offering competitive base salaries, meaningful equity, and consistent pay practices that reflect our mission and core values. At WHOOP, we view total compensation as the combination of base salary, equity, and benefits, with equity serving as a key differentiator that aligns our employees with the long-term success of the company and allows every member of our corporate team to own part of WHOOP and share in the company's long-term growth and success. The U.S. base salary range for this full-time position is $155,000 - $245,000 Salary ranges are determined by role, level, and location. Within each range, individual pay is based on factors such as job-related skills, experience, performance, and relevant education or training. In addition to the base salary, the successful candidate will also receive benefits and a generous equity package. These ranges may be modified in the future to reflect evolving market conditions and organizational needs. While most offers will typically fall toward the starting point of the range, total compensation will depend on the candidate's specific qualifications, expertise, and alignment with the role's requirements. #J-18808-Ljbffr

A leading semiconductor company in Boston is seeking a Senior Embedded SW Engineer to design embedded software for edge computing systems. You will work with system architects and algorithm designers to build cutting-edge data collection systems, requiring strong C/C++ skills and collaboration. Applicants must have an MSEE or MSCS degree and experience in embedded systems. Competitive salary and benefits are offered. #J-18808-Ljbffr

A pioneering neuroscience company based in Boston, MA is seeking a firmware developer to create embedded solutions for advanced brain stimulation devices. The ideal candidate will have a strong background in C programming, experience with BLE protocols, and a passion for building innovative healthcare technologies. The role offers comprehensive benefits, including health insurance and stock options. #J-18808-Ljbffr

A leading retailer in Framingham, MA is seeking a Senior Staff Engineer to modernize workforce management systems. You will lead technical designs and delivery across global teams, ensuring the alignment of business objectives. The ideal candidate will have over 10 years of experience in Engineering & IT, especially in Workforce Management solutions. The position offers a competitive salary and comprehensive benefits. #J-18808-Ljbffr

The Senior Staff Engineer leads development of pressure sensors, high temperature thermocouples, speed sensors, fuel gauging systems, fuel level and temperature sensors, lube oil level and temperature sensors, hydraulic level and temperature sensors, wastewater level sensors, fuel flowmeters flow switches. The Senior Staff Engineer is a technical leader with mechanical design engineering expertise who possesses excellent technical and project management capabilities. The Senior Staff Engineer is part of a global, multi-site business unit that designs and manufactures highly engineered sensors and fluid management systems for aerospace applications. The Senior Staff Engineer will drive the design, manufacture, test & certification of electromechanical sensing devices such as Pressure Sensors, RTD's, Thermocouples, Speed Sensors, and Cables. Responsibilities Design sensors described above, mentor and coach early in their career engineers Develop new technologies while working within a multidisciplined team environment. Create 3D models utilizing SolidWorks, specifying materials and assembly methods. Create and issue technical documentation to support new and existing product designs; design reports, FMEA's, test procedures, and test reports etc. Perform Structural, Thermal, Fatigue, and Dimensional Analyses using hand calculations and Finite Element Analytic methods. Review specifications in support of the bid and proposal and product design processes. Serve as technical authority on design reviews ensuring rigor and quality of solutions. Lead continuous improvement of the Design Engineering Body of Knowledge (BOK). Requirements BS Mechanical Engineer required. Master's preferred. 15+ years designing electromechanical sensing devices in a regulated industry ideally aerospace. Must have experience designing MEMs pressure sensors and knowledge of testing and compensation of pressure sensors, experience with high temperature designs a plus. Strong blend of technical, project, and positive customer relationship building experience. Proficiency with ASME 14.5 geometric dimensioning and tolerancing (GD&T). Knowledge of Design for Six Sigma methodology and tools. Knowledge of aerospace components and standards, including DO-178 software. Written, verbal, interpersonal skills, and use of analytical tools, including FEA. Proficiency in SolidWorks version 2020 or later. Expertise in designing for severe vibration and thermal environments. Ability to work under pressure, multi-task, and meet deadlines remaining flexible to work priorities. Know Word, Excel, and SolidWorks familiarity with PLM/PDM software ARAS Innovator. Must be a US Citizen. #J-18808-Ljbffr

Welcome to Fi. We're a passionate team from Square, Google, TikTok, Peloton, Uber, and more working to transform the dog-human relationship. Our mission? Develop cutting-edge technology to revolutionize what it means to be a dog parent. Fi is leveraging our team's talent and expertise to improve the lives of the millions of dogs in the U.S. Real-time location tracking, activity, sleep and behavior monitoring - and that's just the beginning. The most exciting aspect of our work? Bridging the communication gap between dogs and humans. Imagine a world where everyone knows how their dog feels in real time and how to keep their best friend in good shape. That's the future we're building at Fi. If you're someone who thrives in innovative, collaborative work environments and feels strongly about helping dogs live longer, better lives, Fi could be the perfect fit. Join us in our pursuit of the “impossible,” or as we call it here “let me find a way,” to redefine the future of dog ownership together. Fi is looking for an Embedded Software Engineer! Fi is looking for an Embedded Software Engineer to design and build the firmware powering our next generation of connected collars - shaping the architecture, performance, and reliability of systems trusted by hundreds of thousands of dogs. You'll dive deep into connectivity, low-power optimization, and real-time processing, driving decisions that bridge hardware, software, and data into one seamless product experience. What You'll Do Firmware Development: Take a front-line role in designing, developing, and maintaining firmware for embedded systems, ensuring functionality, reliability, and performance optimization. Collaborative Problem-Solving: Work closely with cross-functional teams to integrate software with hardware components, troubleshoot issues, and optimize system performance. Code Review and Documentation: Conduct code reviews, document code changes, and ensure compliance with coding standards and best practices in firmware development. Testing and Validation: Develop test procedures and perform rigorous testing to validate firmware functionality and identify and resolve bugs or issues. Research and Innovation: Stay updated with emerging technologies, tools, and trends in embedded systems and contribute innovative ideas to enhance product capabilities. What You'll Bring Minimum of 4 years of hands-on experience in firmware/embedded software development Proficiency in the C and C++ programming languages, and an understanding of the differences between them. Additionally, experience with or eagerness to learn Python. Prior exposure to hardware interfaces, real-time operating systems (RTOS), and embedded systems design. Familiarity with debugging tools and methodologies for embedded systems. Experience with version control systems (e.g., Git) and issue tracking tools (e.g., Jira). Strong problem-solving abilities and the ability to work in a collaborative team environment, communicating effectively with hardware engineers, software developers, and other stakeholders. Understanding of low-level hardware interactions and device drivers. Experience in designing, developing, and testing firmware for microcontrollers and embedded systems. Why You'll Love Us Time to Recharge: Enjoy flexible PTO to take the breaks you need. Top-Notch Health Coverage: We've got your back (and teeth and eyes) with full medical, dental, and vision insurance. Wellness Perks:Free access to One Medical, Kindbody, and Talkspace to keep you feeling your best. Give Back to the Pups: Make tails wag with a $500 annual donation to a dog charity of your choice through our BarkBack Program. Free Fi Membership: Your furry best friend(s) get all the benefits of a Fi collar, on us! Love for Friends + Family: Share the Fi magic with loved ones through our gifting program. Salary: $150,000 - $200,000 a year The anticipated base salary range for this position is $150,000-$200,000. Actual compensation will vary based on multiple factors, including skills, experience, market conditions, and role scope, which may evolve during the hiring process. As a fast-growing Series B startup, Fi evaluates compensation opportunistically to align with the right candidate. This role is also eligible for equity compensation. Fi is an equal opportunity employer that is committed to diversity and inclusion in the workplace. We prohibit discrimination and harassment of any kind based on race, color, sex, religion, sexual orientation, national origin, disability, genetic information, pregnancy, or any other protected characteristic as outlined by federal, state, or local laws. This policy applies to all employment practices within our organization, including hiring, promotion, termination, layoff, recall, leave of absence, compensation, benefits, training, and apprenticeship. Fi makes hiring decisions based solely on qualifications, merit, and our needs at the time. #J-18808-Ljbffr

Senior Software Engineer - IoT Embedded Software (Matter) page is loaded## Senior Software Engineer - IoT Embedded Software (Matter)locations: Bostontime type: Full timeposted on: Posted Todayjob requisition id: 20443Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world's most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. Learn more at .**Senior Software Engineer - IoT Embedded Software (Matter) Boston, MA**We are seeking a highly skilled and motivated **Senior Software Engineer** to join our **team**, contributing to the development and optimization of embedded software for smart home and IoT applications. This role demands strong technical expertise in embedded systems, C++, and wireless protocols, along with a proven ability to lead projects, mentor junior team members and drive technical excellence. We are looking for a highly motivated individual with excellent communications skills, a passion for great code, and a love for solving complex problems in a fast-paced team environment.**Responsibilities*** **Design, develop, and maintain** embedded software for the **Matter protocol stack**.* **Lead technical initiatives** and provide guidance in solving complex engineering challenges.* **Mentor junior engineers**, conduct thorough code reviews, and promote a culture of technical excellence and continuous improvement.* **Collaborate with cross-functional teams** to design and integrate Matter over **Thread** and **Wi-Fi** platforms.* **Contribute to the Matter open-source standard** to enhance the specification and deliver improved outcomes for **Silicon Labs customers**.* **Support protocol compliance, certification, and interoperability testing** to ensure product robustness and standard alignment.* **Perform hands-on debugging and troubleshooting** using industry-standard tools such as **JTAG**, **GDB**, and **Logic Analyzers**.* **Optimize performance, reliability, and memory usage** of embedded systems in **resource-constrained environments**.* **Participate in software architecture and design discussions**, contributing to long-term technical direction.* **Develop and maintain high-quality technical documentation**, both for internal and external audiences.**Technologies we use:*** Thread, Zigbee, Bluetooth, Wi-Fi, 802.11.x, 802.15.4, ARM, Linux, Python, Ninja, C++, C, Git, Conan, Zephyr**Skills you will need*** **Bachelor's or Master's degree** in Computer Science, Electrical Engineering, or a related field.* **6+ years of experience** in embedded systems development.* **Strong proficiency in C++**, with deep knowledge of memory management, concurrency, and object-oriented design principles.* **Extensive hands-on debugging experience** with embedded systems using tools such as GDB, JTAG, and trace analyzers.* **Solid understanding of networking protocols**, including Wi-Fi and Thread.* **Familiarity with RTOS environments** and low-level hardware interfaces (UART, SPI, I2C).* **Proven ability to mentor engineers** and lead technical projects effectively.* **Experience with scripting languages** such as Python for automating builds and tests.* **Strong background in unit testing** to ensure the reliability and quality of software features.* **Proficiency with revision control and issue tracking tools**, such as Git and Jira.* **Experience authoring technical documentation**, including requirements and API specifications.* **Excellent written and verbal communication skills**, with fluency in English.**Qualifications Considered a Plus*** Experience with application-layer protocols such as **Matter** and **HomeKit**.* Hands-on experience with both **simulated and hardware test networks**.* Familiarity with **open-source standards** such as **Zephyr**, and exposure to **Linux** environments.* Strong understanding of **IPv6**, **mDNS**, and **secure commissioning flows**.**Benefits & Perks***You can look forward to the following benefits:** Great medical (Choice of PPO or Consumer Driven Health Plan with HSA), dental and vision plans* Highly competitive salary* 401k plan with match and Roth plan option* Equity rewards (RSUs)* Employee Stock Purchase Plan (ESPP)* Life/AD&D and disability coverage* Flexible spending accounts* Adoption assistance* Back-Up childcare* Additional benefit options (Commuter benefits, Legal benefits, Pet insurance)* Flexible PTO schedule* 3 paid volunteer days per year* Charitable contribution match* Tuition reimbursement* Free downtown parking 2 weeks a month* Onsite Gym and locker rooms coming in April 2026* Monthly wellness offerings* Free snacks* Monthly company updates with our CEO#LI-KB1#LI-HybridThe annualized base pay range for this role is expected to be between $102,550 - $190,450 USD. Actual base pay could vary based on factors including but not limited to experience, geographic location where work will be performed and applicant's skill set. The base pay is just one component of the total compensation package for employees. Other rewards may include an annual cash bonus, equity package and a comprehensive benefits package.*Silicon Labs is an equal opportunity employer and values the diversity of our employees. Employment decisions are made on the basis of qualifications and job-related criteria without regard to race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status, or any other characteristic protected by applicable law.*At Silicon Labs, we hire and empower great talent to achieve their full potential. By offering challenging projects, technical mentorship, and continuous learning opportunities, we ensure our employees thrive at every stage of their careers. Here, you'll work alongside some of the industry's brightest minds, tackling complex problems that deepen your expertise and expand your horizons. Whether you're building new skills or shaping your career path, we're dedicated to supporting your growth and celebrating your success every step of the way. #J-18808-Ljbffr

Join our team of innovators and get a chance to work alongside a team of talented, curious people that are passionate about designing and deploying solutions that are accelerating humanity's expansion into space. Our team in Marlborough, MA has been actively accelerating humanity's expansion into space for multiple decades. During that time, our innovative team has been designing and manufacturing mission-critical, high reliability optical sensors for satellites providing guidance, navigation, situational awareness, and control capabilities. With many more exciting projects on the horizon, our team could use your curiosity, passion, talent and experience to help us Build Above. Summary Redwire Space Components, LLC has a current opportunity for a Sr. Embedded Software Engineer, located at our facility in Marlborough, MA. In this role you will.... Responsibilities Work with software, hardware, and FPGA engineers to propose and develop software solution(s) to meet system specifications including performance requirements. Work with the team to author / conduct software static and dynamic analysis. Work with the team to draft and release relevant software documentation such as requirements specifications, design specifications, and design documents. Use a solid grasp of the Xilinx Vitis unified software platform to build, deploy, test, and debug software on a Ultrascale based product. Identify and acquire necessary software components to address requirements including in-house prior art, commercial IP, and selective open-source solutions that have acceptable quality and license provisions. Collaborate on the development of Agile Epics & Stories to meet project objectives. Create, organize, and estimate tasks required to meet story objectives including verification and/or demonstration. Collaborate with SQA on test concepts, plans, and integration of testing into the development cycle. Effectively document software designs. Present and defend software solutions to other Engineers and customers (as required). Ideal Experience BS/MS Degree in EE, CS, CE or related field. 5 or more years of + years of experience building and shipping high reliability embedded systems using embedded Linux or RTOS (FreeRTOS preferred). Experience in software development process using the Gitflow workflow model. Experience with development tools including Atlassian and Jenkins automation. Experienced with operating systems fundamentals such as schedulers, network stack, file system & memory management. Experienced in software architecture, memory mapping, caching, DMA, interrupts. Proficiency in C, C++ Some limited travel required Desired Skills Excellent communication skills. Familiarity with Xilinx Vitis unified software development toolchain. Experience with SoC/FPGA system design for hardware interfaces such as UART, SPI, I2C, CAN, Camera Sensor Interface (CSI) & Ethernet User and proponent of Agile methods. Experience with RTOS and/or Embedded Linux device drivers and bootloaders. Experience in image processing for camera-based sensor applications. Excellent communication skills Experience with RTOS and/or Embedded Linux device drivers and bootloaders. Experience in image processing for camera-based sensor applications Experienced with the following highly desired: Jira Microcontrollers YOCTO environment Doxygen or other documentation generator tool Pay Range $119,000/yr. - $150,000/yr. Grow with us as we innovate the next generation capabilities for a new era of space exploration! We offer a highly competitive benefits package along with a commitment to our core values of Integrity, Innovation, Impact, Inclusion, and Excellence. Don't meet every single requirement above? No worries. We want people who can grow, collaborate and build a stronger team. We strive to build a diverse and inclusive culture, so if you're excited about this job posting, we encourage you to apply. You may be just the right candidate for this or other roles. Redwire is an Equal Opportunity Employer; employment with Redwire is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status. All offers of employment at Redwire are contingent upon clear results of a thorough background check and your ability to provide proof of eligibility to work in the US. Note that some positions will also require US citizenship or ability to obtain a security clearance due to requirements of a classified program. To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR Click Here

We are now looking for a Senior ASIC Verification Engineer for our Coherent High Speed Interconnect team! For two decades, we have pioneered visual computing, the art and science of computer graphics. With our invention of the GPU - the engine of modern visual computing - the field has grown to encompass video games, movie production, product design, medical diagnosis, and scientific research. Today, we stand at the beginning of the next era, the AI computing era, ignited by a new computing model, GPU deep learning. This new model - where deep neural networks are trained to recognize patterns from meaningful amounts of data - has shown to be deeply effective at solving the most sophisticated problems in everyday life. As a ASIC Verification Engineer at NVIDIA, you will verify the design and implementation of our innovative high speed coherent interconnects for our mobile SoCs and GPUs. This position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. To learn more about NVIDIA's ultra-fast chip interconnect technology visit: **************************************************** What you'll be doing: * In this position, you will be responsible for verification of high-speed coherent interconnect design, architecture and golden models. * You will be responsible for micro-architecture using sophisticated verification methodologies. * As a member of our verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), complete test/coverage plans, and verify the correctness of the design. This role will collaborate with architects, designers, emulation, and silicon verification teams to accomplish your tasks. What we need to see: * Bachelors or Master's Degree (or equivalent experience) * 3+ years of relevant verification experience. * Experience in architecting test bench environments for unit level verification. * Background in verification using random stimulus along with functional coverage and assertion-based verification methodologies. * Prior Design or Verification experience of Coherent high-speed interconnects. * Knowledge of industry standard interconnect protocols like PCIE, CXL, CHI will be useful. * Strong background developing TB's from scratch using SV and UVM methodology is desired. * C++ programming language experience, scripting ability and an expertise in System Verilog. * Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB). * Strong debugging and analytical skills. * Experienced communication and interpersonal skills are required. A history of mentoring junior engineers and interns a huge plus. NVIDIA is widely considered to be one of the technology world's most desirable employers! We have some of the most forward-thinking and dedicated people in the world working for us. If you're creative and autonomous, we want to hear from you. #LI-Hybrid Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4. You will also be eligible for equity and benefits. Applications for this job will be accepted at least until January 13, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: As a SOC Core Data Path Design Verification Engineer on AMD's Strategic Silicon Solutions (S3) team, you will plan, create, and execute tests, testbenches, and verification environments to integrate IP blocks into complex SOC projects. You will help create custom advanced SOCs for external customers such as Sony (PlayStation 5), Microsoft (Xbox Series X), and Valve (Steam Deck) along with customers outside the game console space. You will collaborate closely with architects, design engineers, and software teams to ensure design functionality, performance, and quality for cutting-edge SOC products. THE PERSON: You are passionate about modern processor architecture, digital design, and SOC-level verification. You thrive in complex technical environments, are eager to understand legacy processes to improve them, and excel at problem-solving. You communicate effectively across global teams and are motivated to learn and innovate continuously. KEY RESPONSIBILITIES: * Collaborate with architects, hardware engineers, and others to understand the new features to be verified * Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases * Estimate the time required to write the new feature tests and any required changes to the test environment * Build the directed and random verification tests * Debug test failures to determine the root cause; work with RTL engineers to resolve design defects and correct any test issues * Review functional and code coverage metrics - modify or add tests or constrain random tests to meet the coverage requirements PREFERRED EXPERIENCE: * Strong background in SOC and IP-level ASIC verification. * Proficient in debugging RTL using industry-standard simulation tools. * Hands-on experience with UVM-based testbenches in both Linux and Windows environments. * Skilled in Verilog, SystemVerilog. * Experience developing and maintaining UVM verification frameworks, test environments, and automation flows. * Knowledge of distributed compute environments, workflow automation, and regression management. * Familiarity with simulation profiling, acceleration, or HLS tools/processes. * Strong C++ programming skills, especially on Linux; Windows exposure is a plus. * Working knowledge of SystemC and TLM methodologies. * Scripting experience in Perl, Ruby, Makefile, or shell. * Leadership or mentorship experience is considered an asset. ACADEMIC CREDENTIALS: * Bachelor's or Master's degree in Computer Engineering, Electrical Engineering, or a related discipline. LOCATION: * Boxborough, MA This role is not eligible for Visa Sponsorship. #LI-IA1 #LI-Hybrid Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here. This posting is for an existing vacancy.

HPR is a leading provider of high-performance and ultra-low latency electronic trading and capital markets infrastructure solutions offered as a managed service. Our cutting-edge technology is used by tier-1 financial institutions to monitor and execute trades rapidly and efficiently. As we continue to innovate and grow, we're searching for a forward-thinking Senior Design Verification Engineer to help us build the future of capital markets infrastructure. As a Senior Design Verification Engineer at HPR, you will: Verify and maintain high-performance FPGA compute and networking systems used in electronic trading Own the verification process from specification, test planning, and testbench development through execution and coverage closure Partner with design engineers to review and execute comprehensive test plans Create and maintain reusable verification components and testbenches written in SystemVerilog Lead and mentor junior engineers, promoting our culture of continuous learning and collaboration Contribute to improving our verification processes, tools, and methodologies Required Qualifications BS/MS in Computer Engineering, Electrical Engineering, Computer Science, or related 5+ years of experience in design verification for FPGAs or ASICs Proficiency in SystemVerilog for verification Familiarity with advanced verification methods, including constrained randomization, functional coverage, and assertion-based checking Experience with industry-standard simulation and debugging tools (e.g., VCS, Verdi) Comfortable working in a Linux environment Strong problem solving, debugging, and communication skills Desired Qualifications Deep understanding of computer architecture and digital design concepts In-depth knowledge of networking protocols (IP, TCP, UDP) Experience verifying designs with high-speed interfaces (PCIe, Ethernet, and/or DDR) Familiarity with C programming and scripting in Python and/or Perl Compensation: In compliance with Massachusetts law, the anticipated annual base salary range for this position is $ $159,300 to $215,000. Please note that this range represents the expected base salary for this role at the time of posting. The final offer may vary based on factors such as the candidate's experience, skills, and qualifications. This range does not include other forms of compensation such as potential bonuses, equity, or benefits. This position requires being on-site at our office in Needham, MA full-time (5 days per week) HPR does not currently provide employment sponsorship

zero RISC zero RISC is redefining chip security and supply chain integrity by empowering device owners and operators in crucial sectors like silicon production, IoT, and critical infrastructure with full device ownership, control, and visibility. Led by the founders of the OpenTitan secure silicon project, zero RISC is driving commercial adoption of high assurance software and services rooted in open silicon. Our products forge an immutable connection between hardware and software, enabling users to trust their devices no matter where they're built or where they're deployed. Role Overview As a zero RISC SoC/ASIC Design Verification Engineer, you will develop, verify, and maintain silicon in security-sensitive settings, including root-of-trust technology. You will elevate and solidify zero RISC's status as the leading provider of secure silicon IP by developing essential verification collateral. You will interact directly with zero RISC customers to understand their requirements and deliver solutions benefitting both customer and zero RISC alike. You will participate in the whole chip design process from architecture to tapeout and silicon validation. By engaging with the world's premier open-source silicon community, you will support our mission of open secure silicon everywhere. We're looking for engineers with strong design verification skills (and a long view of secure system architecture) who are also fast, flexible learners and enthusiastic about open source.Key Responsibilities: Verify ASIC/SoC functionality, performance, security, and power throughout the full chip design life cycle, from test plan definition to sign-off Build high quality verification environments at the chip/top and block levels following engineering best practices Write thorough verification documentation including test plans Diagnose, debug, and resolve regression failures and other errors Achieve coverage closure Ensure design functionality while upholding stringent timelines in collaboration with architecture, design, software, system, and silicon validation teams as well as engineering program managers What We're Looking For: Bachelor's degree in Electrical Engineering or Computer Science, or a related technical field or equivalent experience 4 years of experience with simulation-based verification methodologies and languages such as UVM and SystemVerilog or formal verification-based techniques including industry standard tools Experience developing and maintaining testbenches, test cases, and verification environments for simulation-based verification or formal verification environments Preferred Qualifications (not required): Master's or PhD in Electrical Engineering or Computer Science, or a related technical field or equivalent experience Knowledge of security ASICs or accelerators (e.g. cryptography accelerators or GPUs) Knowledge of computer architecture and memory subsystem architectures Experience verifying low power designs Experience with scripting languages such as Python Why Join Us? Your work will directly contribute to the development of cutting-edge security solutions, protecting critical systems in industrial and IoT environments As a seed-stage startup, this role offers significant opportunities for learning and career growth Join a close-knit, innovative team where you can learn, grow, and contribute to building something meaningful in the security space

Job Description Career Renew is recruiting for one of its clients a Senior FPGA Design Verification Engineer in Dedham, MA. Our engineers redefine what's possible and our manufacturing team brings it to life, building the brains behind the brawn on submarines, ships, combat vehicles, aircraft, satellites, and other advanced systems. We pride ourselves in being a great place to work with this shared sense of purpose, committed to a diverse and exciting employee experience that drives innovation and creates a community where all feel welcome and a part of something amazing. As a Senior Cyber FPGA Design Verification engineer, you'll be a member of a cross functional team responsible for product design from system architecture & requirements allocation through product release and production of cost-sensitive secure products. Requirements Bachelor's degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field, plus a minimum of 8 years of relevant experience; or Master's degree plus a minimum of 6 years of relevant experience. Experience with OVM / UVM design verification methodology: bash/csh, Perl, TCL, Python or similar scripting languages; VHDL or similar hardware description languages. CLEARANCE REQUIREMENTS: Department of Defense Secret security clearance is required at time of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required. What sets you apart: Experience defining verification methodology for complex FPGAs. Ability to analyze requirements, create test plan, build and set up scalable simulation environments from the ground up using SystemVerilog/UVM Familiarity with testing complex designs, code coverage, functional coverage, assertions. Ability to work in a dynamic environment that includes working with changing needs and requirements. FPGA/ASIC design experience is a plus. Familiarity with Xilinx FPGA & Questa Advanced Functional Verification tools is a plus. Team player who thrives in collaborative environments and revels in team success Benefits An exciting career path with opportunities for continuous learning and development. Research oriented work, alongside award winning teams developing practical solutions for our nation's security Flexible schedules with every other Friday off work, if desired (9/80 schedule) Competitive benefits, including 401k matching, flex time off, paid parental leave, healthcare benefits, health & wellness programs, employee resource and social groups, and more

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Infrastructure Processor Business Unit, a part of Networking and Processor Business Group, encompasses OCTEON and the award-winning OCTEON Fusion-M product families. The SoC family of multi-core CPU processors and Radio Access SoCs offer best-in-class performance, low power, rich software ecosystem, virtualization features, and open source application support with highly optimized custom ARM CPU cores providing an excellent solution for a highly flexible end-to-end optimized 5G platform. As part of the Infrastructure Processor unit at Marvell, you will verify all of the circuitry that goes inside our chips for the general market and for specific customers. These chips use cutting-edge technology to facilitate data transfers at high speeds, and you will help verify that each design meets our customers' specifications whether they're a major telecom organization or automotive company, etc. What You Can Expect In this in-office role, you will work in a team developing system exerciser tools used to functionally test individual logic units, integrated subsystems, and full SoC's. You will be responsible for the development and maintenance of drivers and test code in an embedded Linux environment with the opportunity to work with hardware designers and architecture teams driving leading edge processor technology. What We're Looking For To be successful in this role you must: * Have completed a Bachelor's or Master's Degree in Electrical Engineering, Computer Engineering, or Computer Science. * Have included programming classes in C/C++ or similar language in your coursework. * Be comfortable working in a Linux environment and doing scripting with Python. * Be extremely detail-oriented and ready to iterate a design over and over again until it is refined completely. * Work and communicate well with your team, keeping them in the loop about your progress, issues you encounter, and any deviations from planned schedule. Expected Base Pay Range (USD) 100,400 - 148,630, $ per annum The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions. Additional Compensation and Benefit Elements At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at *****************. #LI-AR2

About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Infrastructure Processor Business Unit, a part of Networking and Processor Business Group, encompasses OCTEON and the award-winning OCTEON Fusion-M product families. The SoC family of multi-core CPU processors and Radio Access SoCs offer best-in-class performance, low power, rich software ecosystem, virtualization features, and open source application support with highly optimized custom ARM CPU cores providing an excellent solution for a highly flexible end-to-end optimized 5G platform. As part of the Infrastructure Processor unit at Marvell, you will verify all of the circuitry that goes inside our chips for the general market and for specific customers. These chips use cutting-edge technology to facilitate data transfers at high speeds, and you will help verify that each design meets our customers' specifications whether they're a major telecom organization or automotive company, etc. What You Can Expect In this in-office role, you will work in a team developing system exerciser tools used to functionally test individual logic units, integrated subsystems, and full SoC's. You will be responsible for the development and maintenance of drivers and test code in an embedded Linux environment with the opportunity to work with hardware designers and architecture teams driving leading edge processor technology. What We're Looking For To be successful in this role you must: Have completed a Bachelor's or Master's Degree in Electrical Engineering, Computer Engineering, or Computer Science. Have included programming classes in C/C++ or similar language in your coursework. Be comfortable working in a Linux environment and doing scripting with Python. Be extremely detail-oriented and ready to iterate a design over and over again until it is refined completely. Work and communicate well with your team, keeping them in the loop about your progress, issues you encounter, and any deviations from planned schedule. Expected Base Pay Range (USD) 100,400 - 148,630, $ per annum The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions. Additional Compensation and Benefit Elements At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at *****************. #LI-AR2

SmartSense builds end-to-end IoT systems for industries where accuracy and uptime matter - healthcare, food safety, life sciences, and supply chain. Our platform combines wireless sensors, intelligent gateways, and always-on cloud connectivity to deliver mission-critical insights at scale. More than 2,000 organizations trust SmartSense for reliable, real-time data in environments where failure isn't an option. What We Offer If you enjoy working across hardware, firmware, wireless networks, and edge computing, this role is the right mix of technical depth and real-world impact. You'll help design next-generation architectures while also improving the reliability and performance of thousands of deployed devices. You'll work alongside engineers who enjoy digging into data, exploring new ideas, and building systems that actually matter. It's a chance to work on a complex IoT stack while having fun doing it. What You Will Do * Build and maintain embedded firmware (C/C++) for sensors and gateways powering SmartSense's IoT ecosystem. * Own critical parts of the firmware stack - from low-power drivers to real-time telemetry pipelines. * Analyze and solve field issues across a massive distributed fleet, using telemetry, logs, and real hardware debugging tools. * Develop firmware updates that introduce new capabilities, improve performance, or support evolving hardware. * Tune wireless performance (BLE, Zigbee, LTE, GPS) and optimize power consumption for long-life sensors. * Contribute to next-gen platform architecture, including edge processing and smarter sensor workloads. * Bring up new hardware platforms - sensors, radios, boards - and collaborate with hardware engineers on system validation. * Prototype new ideas, test their limits, and iterate quickly. * Strengthen system diagnostics so the devices tell us what's happening before anything becomes a problem. * Support field engineering, manufacturing, and operations with tools, scripts, and deployment workflows. Who You Are and What You Bring * 5+ years building firmware for embedded systems or IoT devices. * Deep experience in C/C++, RTOS development, drivers, peripherals, power management, and system-level thinking. * Strong understanding of IoT wireless technologies including BLE, Zigbee, LTE, GPS, and mesh-like networks. * Comfortable maintaining legacy systems while also designing cleaner, modern solutions. * You enjoy debugging - logic analyzers, scopes, JTAG, weird edge cases, intermittent failures - all of it. * Experience with RTOS or embedded Linux (Yocto, Ubuntu). * Clear communicator who enjoys collaborating with hardware, cloud, and product teams. * Based in the Greater Boston area for hybrid onsite work. * Experience with AWS IoT, Azure IoT, or Google Cloud IoT is strongly preferred. Desired But Not Required * Experience with Digi XBee modules or mesh networking. * Interest in TinyML, edge inference, or embedded analytics. * Background in ultra-low-power design. * Experience working in regulated or compliance-driven environments. * Please note that we are unable to provide visa sponsorship for this position. This includes, but is not limited to, work visas, employment-based visas, or residency sponsorship. Candidates must have valid work authorization in the United States at the time of application. Visa applications of any kind will not be considered. Digi International offers a distinctive Total Rewards package including a short-term incentive program, new hire stock award, paid parental leave, open (uncapped) PTO, and hybrid work environment in addition to our competitive medical, health & wellbeing and compensation offerings. The anticipated base pay range for this position is $105,000 - $164,000. Pay ranges are determined by role, job level and primary job location. The range displayed reflects the reasonable range we anticipate paying for this position and reflects the cost of labor within several U.S. geographic markets. The specific salary offered within the range will depend on various factors including, but not limited to the candidate's relevant and prior experience, education, skills, and primary work location. It is not typical for an individual to be hired at or near the top of the range for their role and compensation decisions are dependent on the facts and circumstances of each position. Pay ranges are typically reviewed and updated annually. At Digi, we embrace diversity and inclusion among our teammates. It is critical to our success as a global company, and we seek to recruit, develop and retain the most talented people from a diverse candidate pool. We are committed to providing an environment of respect where equal employment opportunities are available to all applicants and teammates.

A Day in Your Life at MKS: As a Senior Principal Firmware Engineer with MKS's Direct Pressure Measurement group, you'll be a key member of a talented cross-functional team, developing firmware that enables the industry-leading Baratron vacuum manometers. You Will Make an Impact By: Leading the architectural design, implementation, verification and validation of firmware for embedded metrology products supporting semiconductor manufacturing and other advanced markets Engaging with customers to understand their application and integration challenges, and creating advanced features and functionality that drive their success. Supporting the development and diagnostics of the hardware surrounding the processor Working collaboratively with other software engineers and engineers/scientists of other disciplines to solve challenging problems. Skills You Bring: Bachelor of Science in Electrical or Computer engineering required. 12+ years of experience. Experience leading the development of embedded system architecture and algorithms. Fluency with the C and C++ programming languages Up to 10% of travel is required Experience with using emulators, communication bus monitoring hardware/software, oscilloscopes, and similar tools to develop and debug products. Preferred Skills: Experience with EtherCat or comparable field buses. Experience with Python or FreeRTOS. Experience with the STM32 family of processors Experience designing for semiconductor capital equipment Physical Demands & Working Conditions: Must be able to remain in a stationary position for 90% of the time Constantly operates a computer and other office productivity machinery This job operates in a professional office environment We are interested in a qualified candidate who is eligible to work in the United States. However, we will not be sponsoring work visas for this position, at this time. Compensation and Benefits: Salary Pay Range: $123,500.00 - $229,500.00 per year. This range is a good faith estimate of the expected salary range for this position, based on a wide range of factors including qualifications, experience and training, operational and business needs and other considerations permitted by law. Bonus: This position is eligible for a discretionary annual bonus, in an amount to be determined by MKS. Benefits: MKS offers a comprehensive benefits package, including health insurance coverage (medical, dental and vision), 401(k) with company match, life and disability insurance, 12 paid holidays, sick time, 15 paid vacation days, [6 weeks fully paid] parental leave, adoption assistance and tuition reimbursement. MKS is an equal opportunity employer, including disability, veteran status and all categories protected by law. Please review our EOE statements for additional details. MKS is generally only hiring candidates who reside in states where we are registered to do business. MKS is an equal opportunity employer, including disability, veteran status and all categories protected by law. Please review our EOE statements for additional details. MKS is generally only hiring candidates who reside in states where we are registered to do business. #LI-RS1 Globally, our policy is to recruit individuals from wide and diverse backgrounds. However, certain positions require access to controlled goods and technologies subject to the International Traffic in Arms Regulations (ITAR) or Export Administration Regulations (EAR). Applicants for these positions may need to be “U.S. persons.” “U.S. persons” are generally defined as U.S. citizens, noncitizen nationals, lawful permanent residents (or, green card holders), individuals granted asylum, and individuals admitted as refugees. MKS Inc. and its affiliates and subsidiaries (“MKS”) is an affirmative action and equal opportunity employer: diverse candidates are encouraged to apply. We win as a team and are committed to recruiting and hiring qualified applicants regardless of race, color, national origin, sex (including pregnancy and pregnancy-related conditions), religion, age, ancestry, physical or mental disability or handicap, marital status, membership in the uniformed services, veteran status, sexual orientation, gender identity or expression, genetic information, or any other category protected by applicable law. Hiring decisions are based on merit, qualifications and business needs. We conduct background checks and drug screens, in accordance with applicable law and company policies. MKS is generally only hiring candidates who reside in states where we are registered to do business. It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability. MKS is committed to working with and providing reasonable accommodations to qualified individuals with disabilities. If you need a reasonable accommodation during the application or interview process due to a disability, please contact us at: accommodationsat *************** . If applying for a specific job, please include the requisition number (ex: RXXXX), the title and location of the role

We are looking for an experienced ASIC Design/Verification Engineer with extensive expertise in design verification. Proficiency in HDL (VHDL/Verilog) and HVL (SystemVerilog), along with experience in SystemVerilog Assertions (SVA) and UVM, is essential. Key Responsibilities: * Verify ASIC designs using VHDL/Verilog and SystemVerilog with coverage-driven methodologies. * Implement SystemVerilog Assertions (SVA) and use UVM for thorough verification. * Develop and monitor verification plans, refining strategies as necessary. * Use scripting (Tcl, Python, Perl) to streamline verification workflows. * Collaborate with design engineers to debug and ensure quality. Required Qualifications: * 9+ years of experience in ASIC verification. * Expertise in HDL and HVL languages, SystemVerilog Assertions, and UVM. * Knowledge of industry-standard interfaces. Preferred Skills: * Proficiency in scripting languages. * Strong communication skills for collaborative verification efforts.