Senior verification engineer jobs in Cary, NC - 74 jobs

Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at ************** and on LinkedIn and Twitter (X). Engineer Position - DVJob Description Summary Analog Devices is committed to investing in our people and their growth. One way we can do this is by establishing a cutting-edge Entry Level Hiring program. This program features high impact professional development, opportunities to drive meaningful projects that are directly tied to business goals, and unique executive exposure. Our duty is to develop the next generation of talent in our communities and provide them with a pathway to apply their academic skills in the real-world. At ADI, our early career hires will learn from the brightest minds who are dedicated to their growth, development, and success. From an industry perspective, incoming new career hires are surrounded by employees that represent the best of the best minds in their respective fields. Apply now for the opportunity to grow your career and help innovate ahead of what's possible! The Data Center & Energy team is seeking a motivated design engineer to provide support to our Cloud Power BU located in Durham, NC, USA. As an individual contributor, the candidate will be working closely with a group of about 15 engineers. The project provides unique learning opportunities related to advanced mixed signal design verification techniques. Responsibilities include, but not limited to: Verification of mixed signal designs and sub-systems using leading edge verification methodologies. Contribute and influence the decisions on methodologies to be adopted for the verification. Architect the testbench and develop in UVM or Formal based verification approaches. Integrate the block testbench in chip-level UVM environment and verify integration. Define testplans, tests and verification methodology for block / chip-level verification. Work with the design team in generating test-plans and closure of code and functional coverage. Continuous interaction with analog and digital teams in enabling top-level chip verification. Support post-silicon verification activities of the products working with design, product evaluation, and applications engineering team. Minimum qualifications Bachelor's or Master's degree in Electrical or Computer Engineering. 7+ years of hands-on experience in SystemVerilog/UVM. Experience in EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments. Experience in architecting and implementing Design Verification infrastructure and executing the full verification cycle. Preferred qualifications Experience in developing test benches using System Verilog and OVM/UVM. Knowledge of test-plan generation, coverage analysis, transaction level modeling, pseudo and constrained random techniques, assertion based and formal verification techniques with System Verilog. Experience of pre and post-silicon verification test flow and automated test benches. Familiarity with verification on multiphase DC-DC controllers. Experience with verification of ARM/RISC-V based sub-systems or SoCs. Experience with verification of voltage interfaces like PMBUS, AVS, SVID, SVI3 etc. Experience with revision control systems like Perforce, Git etc. Verilog, C/C++, System C, TCL/Perl/Python/shell-scripting. RTL design/front-end design experience. Experience with analog SV-RNM/EE-net modeling Experience with formal verification methodology. Strong interpersonal, teamwork and communication skills. Self-motivated and enthusiastic. For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position - except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) - may have to go through an export licensing review process. Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group. EEO is the Law: Notice of Applicant Rights Under the Law. Job Req Type: ExperiencedRequired Travel: Yes, 10% of the time Shift Type: 1st Shift/Days

The Global Clinical System Engineer II is responsible for end-to-end product ownership and contributing to worldwide serviceability throughout the entire product lifecycle-from successful launches to effective obsolescence management. This role combines complaint handling process, investigation management, technical support excellence including coaching, and contributing to service projects to foster cross-functional alignment, accelerate customer issue resolution, enhance long-term product performance in the field and respond to strategic priorities while addressing regional market dynamics. Working in close cross functional collaboration with R&D, Marketing, Manufacturing/Supply Chain/QA, vigilance and regional (local) teams, this role ensures service strategy definition for the Franchise, operational execution, technical proactivity, and continuous improvement across the product lifecycle to optimize field support and operational excellence, and therefore reach business growth expectations and enhance customer experience. Applies practical knowledge of job area typically obtained through advanced education and work experience. Responsibilities typically include Works independently with general supervision. Problems faced are difficult but typically not complex. May influence others within the job area through explanation of facts, policies and practices. Individual contributor, no direct responsibility for leading others. Facilitate consensus with external parties to bio Merieux through adaptable approaches that rely on explanation and occasionally on persuasion, while encouraging flexibility and compromise where there is a common interest to find solutions. Make minor changes in existing processes and occasionally identify problems and adapt or modify working methods in own role to increase efficiency in day-to-day activities. Problems and issues may be only vaguely defined and require understanding and consideration of other disciplines and job areas. Possesses a broad understanding of service operations, with growing expertise in coordination and efficiency Primary Duties Investigation & Technical support ownership Manage technical support requests and customer complaints from subsidiaries and Distributors: Provide leadership in delivering effective technical support to subsidiaries and distributors Promote proactive troubleshooting and technical coaching to local ional support teams Share best practices and contribute to project transformation and continuous improvement initiatives based on trend analyses Manage and coordinate end-to-end technical investigations with Manufacturing, R&D, and Quality Contribute to the Field Action process: contribute in audit preparation - Participate to audit. Follow CAPA activity relative to technical complaints. Participate to FA boards Establish and maintain ERP certification: Meet quality plan standards and all departmental KPIs, including those with impact on CHP and service Service Project Execution & Strategy Contribute to services launches & support Coordinate peers for service deliverables (documentation, validation, CSNs, etc.) and service project activities during product development and launch (PDP/G2M/GOM processes), working in alignment with Marketing, Training, and Global Deploy service strategies in alignment with Marketing, Training, and Global Operations Contribute in Go-To-Market strategy and support transition to obsolescence phases Represent the technical voice of the field to influence upstream and downstream decisions / Go out of market Contribute to other Franchise projects and initiatives as needed Hypercare & Lifescience Management Contribute to hypercare efforts to secure products launches, stabilize product performance, strengthen GO live of our solutions ensuring rapid resolution Contribute to phase out (obsolescence) with associated KPI Experience Bachelor's degree in a biological science, engineering, or other related field. In lieu of Bachelor's degree, 4+ years of relevant laboratory, engineering, and/or industry experience. 4+ years of relevant laboratory, engineering, and/or industry experience Clinical laboratory experience in Microbiology, Molecular Biology and/or Immunoassays experience preferred. 3+ years of customer service experience. Knowledge, Skills & Abilities Knowledge of bio Merieux products and Salesforce is a plus. Excellent written and oral communication skills. English speaking Proficiency in a variety of computer programs including Microsoft Office Suite. Attention to detail, great organizational skills, and ability to multitask in a fast-paced environment. Promotes teamwork and cooperation, previous project management experience a plus. Proven ability to coordinate critical technical investigations and field escalation actions. Experience in cross-functional project coordination (R&D, SC, QA, MFG, Marketing, etc.) and working with global, subsidiaries, distributors. Knowledge with PDP process, G2M, GOM, CHP, Field deployment and post launch service stabilization The estimated salary range for this role is between $75,000 - $105,000. This role is eligible to receive a variable annual bonus based on company, team, and individual performance per bio Merieux's bonus program. This range may differ from ranges offered for similar positions elsewhere in the country given differences in cost of living. Actual compensation within this range is determined based on the successful candidate's experience and will be presented in writing at the time of the offer.In addition, bio Merieux offers a competitive Total Rewards package that may include: A choice of medical (including prescription), dental, and vision plans providing nationwide coverage and telemedicine options Company-Provided Life and Accidental Death Insurance Short and Long-Term Disability Insurance Retirement Plan including a generous non-discretionary employer contribution and employer match. Adoption Assistance Wellness Programs Employee Assistance Program Commuter Benefits Various voluntary benefit offerings Discount programs Parental leaves #LI-US#biojobs Please be aware that recruitment related scams are on the rise. Fraudulent job postings are being placed on other websites, and individuals posing as bio Merieux Talent Acquisition team members are reaching out via email or text message in an attempt to collect your personal and confidential information. In some cases, these scammers are also conducting bogus interviews prior to extending fraudulent offers of employment. Beware of individuals reaching out using general phone numbers and non-bio Merieux email domains (i.e. Hotmail.com, Gmail.com, Yahoo.com, etc.). If you are concerned that an interview experience or offer of employment might be a scam, please make sure you are searching for the posting on our careers site or contact us at [emailprotected]. BioMerieux Inc. and its affiliates are Equal Opportunity/Affirmative Action Employers. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, protected veteran or disabled status, or genetic information. Please be advised that the receipt of satisfactory responses to reference requests and the provision of satisfactory proof of an applicant's identity and legal authorization to work in the United States are required of all new hires. Any misrepresentation, falsification, or material omission may result in the failure to receive an offer, the retraction of an offer, or if already hired, dismissal. If you are a qualified individual with a disability, you may request a reasonable accommodation in BioMerieux's or its affiliates' application process by contacting us via telephone at , by email at [emailprotected], or by dialing 711 for access to Telecommunications Relay Services (TRS).

NVIDIA is seeking an outstanding Senior ASIC Verification Engineer to verify the design and implementation of the world's leading SoC's and GPU's. This position offers the opportunity to have a real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. What you'll be doing: * As a Senior Verification Engineer at NVIDIA, you will be responsible for verifying the design, architecture and micro-architecture using advanced verification methodologies * Define the verification scope, and contribute to the development of the verification infrastructure for memory subsystem units * Collaborate with architects, designers, software engineers across sites to accomplish your goals What we need to see: * You have a Bachelors or Masters Degree in Electrical Engineering or Computer Science or Computer Engineering or equivalent experience * 5+ years of relevant work or research experience * Strong history of working on verification methodology, creating reusable verification components * Knowledgeable in verification using random stimulus along with functional coverage and assertion-based verification methodologies * Fluency in Object Oriented Programming with C++ and/or SystemVerilog * Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB), and methodologies (UVM or equivalent) * Your work displays a passion for debugging and strong problem solving skills * Strong communication skills are required Ways to stand out from the crowd: * Prior verification experience related to high speed IO protocols, or memory coherence is a big plus NVIDIA is widely considered to be one of the technology world's most desirable employers. We have some of the most brilliant and talented people in the world working for us. Are you creative and autonomous? Do you love the challenge of crafting the highest performance & lowest power silicon possible? If so, we want to hear from you. Come, join our GPU ASIC team and help build the real-time, cost-effective computing platform driving our success in this exciting and quickly growing field. #LI-Hybrid Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4. You will also be eligible for equity and benefits. Applications for this job will be accepted at least until January 13, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

At Apple, we work every single day to craft products that enrich people's lives. Do you love working on challenges that no one has solved yet and changing the game? We have an opportunity for an outstandingly hardworking design verification engineer! As a member of our wide-ranging group, you will have the rare and extraordinary opportunity to craft upcoming products that will delight and encourage millions of Apple's customers daily. This role is for a DV engineer who will enable us to produce fully functional first silicon for IP designs. The responsibilities include all phases of pre-silicon verification including but not limited to: establishing DV methodology, test-plan development, verification environment development including stimulus and checkers, test-writing, debug, coverage, sign-off for RTL freeze and tape-out. In this role, you will be responsible for ensuring bug-free first silicon for part of the SoC / IP and are encouraged to develop detailed test and coverage plans based on the micro-architecture You are responsible for developing verification methodology suitable for the IP, ensuring a scalable and portable environment. You will get to develop verification environment, including all the respective components such as stimulus, checkers, assertions, trackers, coverage. A mindset to break the design is highly desirable. Furthermore, you will learn to develop verification plans for all features under your care, implement verification plans, including design bring-up, DV environment bring- up, regression enabling all features under your care, and debug of the test failures. You will also learn to develop block, IP and SoC level test-benches track and report DV progress using a variety of metrics, including bugs and coverage. You will also be expected to make use of LLM and related technologies to achieve efficient execution and improved quality. Strong knowledge of OOP, SystemVerilog and UVM Strong knowledge in developing scalable and portable test-benches Proven experience with verification methodologies and tools such as simulators, waveform viewer, build and run automation, coverage collection, gate level simulations Some working experience using LLMs for efficiency and quality Experience with power-aware (UPF) or similar verification methodology Knowledge of one of the scripting languages such as Python, Perl, TCL Some experience with serial protocols such as PCIe or USB, parallel protocol such as DDR is a plus but not required Knowledge of formal verification methodology is a plus but not required Knowledge of emulation for verification technologies is a plus but not required BS degree in technical subject area and a minimum 3 years relevant industry experience.

The Compute Silicon & Manufacturing Engineering (CSME) organization within SCHIE is responsible for design, development, manufacturing and packaging of Microsoft's state of the art custom computer chips, notably the Azure Cobalt. Our solutions provide sustainable strategic advantage to Microsoft and enable our customers to achieve more. Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft's expanding Cloud Infrastructure and responsible for powering Microsoft's "Intelligent Cloud" mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission. As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the **Compute Silicon and Manufacturing Engineering (CSME)** team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for seasoned engineers with a dedicated passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure. We are looking for a **Senior Verification Engineer** to join the team. **Responsibilities** + Establish yourself as an integral member of a pre-silicon verification team, owning verification of SOC and integration of it's components and/or SoC level flows + Become knowledgeable on the overall SoC architecture, implementation of complex features/flows/protocols, and their interactions with other parts of the SoC, with the platform, and with software. + Develop verification strategy, test plans, requirements, environments, tools, and methodologies. + Apply your knowledge of verification principles and techniques and your judgement to write test plans and implement them by developing tests, test generators, test benches, checkers, coverage, and other verification collateral. + Run tests, debug failures to root cause, and recommend fixes. + Apply your growth mindset to learn and adapt in a complex and dynamic environment. + Engage with partners to drive continuous improvement to both the design, to verification plans/collateral, and to methodology to prevent, reduce, and/or find bugs sooner, more easily, or more reliably. + Mentor and coach team members + Apply your One Microsoft mentality to collaborate with and influence architects, logic designers, post-silicon validators, other verification engineers, and IP and tool providers. + Embody our culture (*************************************************** and values. (******************************************************* **Qualifications** **Required Qualifications:** + Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience + OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience + OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience + OR equivalent experience **Other Requirements:** Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter. **Preferred Qualifications:** + BS/MS in Electrical Engineering, Computer Engineering, Computer Science or related degree. + 3+ years of experience working on Computer Architecture and SoC design and verification principles, including using industry standard HDLs like System Verilog. + 3+ years of experience developing and using verification environments in industry standard languages like SVTB UVM or formal verification. + 3+ years of experience writing scripts/software with industry standard languages like Python or C/C++. + Verification experience as part of a CPU, SoC and/or IP development team + Demonstrated expertise in one or more of the following: + DFD, JTAG, and debug protocols + Memory Controller/PHY IPs, DDR protocols, and related firmware/BIOS/MRC + CPU cores, protocols, and related firmware + Coherent and non-coherent fabric IPs and protocols + PCIe Controller/PHY IPs, protocols and related firmware + Manageability IPs, protocols, and related firmware + Security IPs, firmware, SoC level features/flows, OS/software interactions. + Knowledge of full chip and system level flows and protocols + Proficient communication, collaboration and teamwork skills and ability to contribute to diverse and inclusive teams. Silicon Engineering IC4 - The typical base pay range for this role across the U.S. is USD $119,800 - $234,700 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $158,400 - $258,000 per year. Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here: **************************************************** This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled. Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations. (**************************************************************

Sr Design Verification Engineer (Remote) Full-time: Salary + Benefits + Bonuses / Contractor Work Status: US citizen or Lawful Permanent Resident. About the Role: The ASIC Verification Engineer will play a crucial role in executing a comprehensive test strategy for future ASIC development. You will be part of a team creating automated regression suites, executing verification methodologies. As our ASIC Design Verification Engineer, you will: Test Strategy & Development Collaborate with design and other verification engineers to develop and execute test strategies. Write testbenches and test cases based on test plans. Develop and improve UVM frameworks. Contribute to unit-level and system-level verification deliverables. Become a key contributor to our ASIC verification framework, methodology, and test automation. Implement DSP verification environments to facilitate testing of the RTL against reference MATLAB and Python models Testing & Automation: Run and automate regression tests. Analyze code and functional coverage and provide actionable feedback to the development and verification team. Prepare and present detailed reports on testing outcomes and verification strategies. Qualities of a Successful Candidate: BS or MS in Electrical/Computer Engineering or equivalent. 10+ years of experience in ASIC verification. Proficiency in SystemVerilog and UVM for verification. Knowledge of verification for DSP algorithms and Mixed Signal systems. Nice to Have: Familiarity with Cadence Xcelium simulators or similar tools. Knowledge of scripting languages such as Python or TCL. Experience working on Linux-based systems. The anticipated annual base salary for this position is between $135,000 to $165,000, which also includes a comprehensive benefits package. Full-Time Benefits: • 15 days of PTO per calendar year • 10 paid Holidays per calendar year • Comprehensive Medical Benefits: Company covers 80% of premiums for Employee and Dependents • Dental & Vision: Company covers 50% of premiums for Employee and Dependents • Voluntary Benefits: Life Insurance, FSA (Health and Dependent, Limited Purpose), HAS, and Gap Insurance • Employee Assistant Program (EAP) • 401k - Traditional & Roth • Life/AD&D and Long-Term Disability • Tuition reimbursement Equal Opportunity Policy Statement Encore Semi, Inc. is an Equal Opportunity Employer that does not discriminate on the basis of actual or perceived race, religion, creed, color, age, sex, sexual orientation, gender, gender identity or expression, national origin, genetics, ancestry, marital status, civil union status, medical condition, disability (mental and physical), military and veteran status, pregnancy, childbirth and related medical conditions, or any other characteristic protected by applicable federal, state, or local laws and ordinances. Encore Semi is also committed to compliance with all fair employment practices regarding citizenship and immigration status. LinkedIn:: ************************************

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE The Memory Subsystem team at AMD is hiring a Verification Engineer - Memory Subsystem to contribute to the design, development, and verification of high-speed LPDDR/DDR memory subsystem solutions and associated IP. This role involves IP- and subsystem-level verification and participation in pre-silicon firmware and hardware co-verification using hybrid simulation environments and Universal Verification Methodology (UVM). THE PERSON We are looking for a collaborative and detail-oriented professional who is passionate about verification engineering and eager to contribute to innovative memory subsystem solutions. The ideal candidate thrives in a team environment, communicates effectively, and approaches challenges with curiosity and problem-solving skills. You should be comfortable working with experienced engineers, sharing ideas, and learning continuously while contributing to the success of complex verification projects. KEY RESPONSIBILITIES * Develop and maintain UVM-based verification environments for memory subsystems and associated IP * Create and execute test plans, testcases, and regressions * Participate in firmware and hardware co-verification efforts * Integrate and debug Memory VIP, transactors, monitors, and checkers * Analyze functional and code coverage and assist in closing coverage gaps * Debug simulation failures and collaboration with cross-functional teams PREFERRED EXPERIENCE * Strong fundamental and foundational knowledge and application of Object-Oriented Programming * Proficiency in System Verilog, UVM, and C/C++ * Experience in digital design verification or related coursework * Understanding of testbench architecture, assertions, and coverage * Experience with Python or shell scripting * Familiarity with Git and/or Perforce * Exposure to DDR/JEDEC standards, DDR PHY, or memory controllers * Experience with assertions (SVA/OVL) * Exposure to firmware and hardware co-verification using UVM and C-DPI * Familiarity with System C or architectural modeling * Exposure to emulation platforms such as Zebu ACADEMIC CREDENTIALS * Bachelor's or master's degree in electrical engineering, Computer Engineering, Computer Science, or a related field. LOCATION * Austin, TX or Raleigh, NC This role is not eligible for Visa sponsorship. #LI-DP1 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here. This posting is for an existing vacancy.

Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Formal Verification to build IP and System On Chip (SoC) for data center applications. As a Formal Verification Engineer, you will be part of a team working with the best in the industry, focused on developing innovative ASIC solutions for Meta's data center applications. You will be developing comprehensive formal testplans and be responsible for complete formal verification sign-off of single or multiple complex blocks. The role also provides ample opportunities to partner and collaborate with full stack software, hardware, ASIC Design, Emulation and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer, Formal Verification Responsibilities: 1. Provide technical leadership in Formal Verification 2. Propose, implement and evangelize the Formal Verification Methodology to be used across the group, both at the top level and at the block level 3. Work with Architecture and Design team to come up with formal specification and implementation 4. Define formal verification scope, create formal environment and close coverage with targeted Formal Verification Techniques at IP, Subsystem and SoC level 5. Build reusable/scalable environments for Formal Verification and deploying the tools 6. Evaluate and recommend EDA solutions for Formal Verification 7. Provide training for internal teams and mentoring engineers related to Formal Verification Technology **Minimum Qualifications:** Minimum Qualifications: 8. Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience 9. 8+ years of experience in Design Verification 10. 5+ years of experience in Formal Verification 11. Experience with Formal Verification applications including Datapath, sequential equivalence, Xprop, Clock Gating, connectivity etc 12. Proven understanding of Formal Verification methodologies, complexity reduction techniques and abstraction techniques 13. Proven analytical skills to craft novel solutions to tackle industry-level complex designs 14. Demonstrated experience with effective collaboration with cross functional teams 15. Fluency in hardware description languages, such as SystemVerilog and SVA 16. Proficiency in scripting languages such as Python, Perl, or Tcl 17. Experience with JasperGold or VC-Formal **Preferred Qualifications:** Preferred Qualifications: 18. Experience to quickly understand and interpret specifications and extract design behaviors/properties 19. Experience in formal property verification of complex compute blocks such as DSP, CPU, GPU or HW accelerators 20. Experience with complex SoCs 21. Formal verification experience in clock domain crossing, IP-XACT based register verification and low power 22. Experience with development of fully automated flows from specification to fully verified designs 23. Experience with simulators and waveform debugging tools **Public Compensation:** $178,000/year to $250,000/year + bonus + equity + benefits **Industry:** Internet **Equal Opportunity:** Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment. Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@fb.com.

At BETA Technologies, we apply our intellectual curiosity, passion for aviation, and commitment to sustainability toward a shared mission of revolutionizing electric aviation. Regardless of the position one holds, each team member brings their talent and desire to positively impact the environment and lives of others in a refreshing, vibrant, and inclusive culture. The Verification Engineer will work as part of the team developing BETA's electric aircraft and supporting systems. As a Verification Engineer, you will be responsible for developing and executing Hardware, Software and System-level tests for products used in flight controls, health monitoring and battery management as part of an integrated team helping to develop and certify electronic components for BETA's electric aircraft.How you will contribute to revolutionizing electric aviation: Create requirements-based test cases and execute verification tests on airborne electronic hardware Develop automated test tools in Matlab/Simulink or using Python Coordinate with hardware and software development teams to design test setups and test racks Use standard lab probing and troubleshooting test equipment Execute automated test scripts and troubleshoot issues Document test results with clarity and attention to detail Minimum Qualifications: B.S. in Mechanical, Aerospace, Electrical or Computer Engineering or a related degree Experience with Python and MATLAB Experience with automated test execution Experience documenting test environments and test results Thorough and meticulous with an attention to detail Above and Beyond Qualifications: >2 years of Requirements Based Verification per DO-178, DO-254, or ARP4754 Experience with test rack systems using LabView, Test Rack Experience with communication buses like RS232, RS422, CAN, ARINC429, etc. Experience with DO-160, MIL-STD-810, or equivalent qualification testing Experience in a team environment with configuration management tools (GIT, SVN, etc.) Experience with DAQ hardware like National Instruments , Speedgoat or LabView Experience creating GUIs in Matlab Experience with automated testers and formal acceptance testing Experience in a production environment either aerospace, medical or industrial Build electric airplanes with us! We encourage all driven candidates to apply, even if they do not meet every listed qualification. We are an equal opportunity employer. Employment decisions are based on merit, competence and qualifications and will not be influenced in any manner on race, color, religion, age, sex, sexual orientation, gender identity, national origin, ancestry, citizenship, disability, veteran or military status, genetic information, pregnancy, or any other protected characteristic under federal, state, or local law. BETA complies with all applicable federal, state and local non-discrimination laws and does not tolerate discrimination of any kind in our workplace. Employment offers are contingent upon the successful completion of a background check. BETA Technologies participates in E-Verify.

Are you a Senior Software Engineer (Firmware) looking for a new contract opportunity? In this position, you will have the opportunity to work with an innovative drug delivery firm. Ventura Solutions is a trusted medical device and pharmaceutical staffing, consulting, and training firm. We believe that the best way to advance healthcare is through innovation and continuous improvement. We value our commitment to solving healthcare's toughest problems and delivering world-class products, services, and human resource solutions. We are a company of problem solvers, inventors, teachers, and friends. Experience and passion are what we desire for this role and we're looking for the best! While working in this role you will have the ability to: Description The individual works within cross-functional teams and provides software requirements, design and implementation for current or next generation software and systems projects. He or she develops a thorough understanding of design requirements to ensure that the system's objectives are properly defined and ultimately achieved. This individual must have strong technical skills complemented by great communications and teamwork qualities. Experience in a software development background in a structured/regulated environment such as medical device development is required. Responsibilities Design, develop, and support embedded, Windows embedded and desktop applications. Contribute to requirements definition at the functional level. Participate in software work product reviews/inspections. Interface, integrate, troubleshoot and debug software and hardware components. Generate required product development documentation including Functional Specifications and design documents. Execute manual or automated tests for verification and validation of software applications. Design, code and validate software tools for use in the manufacturing of the product. Work with Software Test, Support and Manufacturing to resolve software issues. Drive improvements to product and process quality. Qualifications BS in Software Engineering, Electronics Engineering, Computer Science education. At least 10 years of software design and development experience Experience with embedded system programming with C/C++, C#/.Net. Proficient with Real time software development. Must have work experience on embedded Microcontrollers such as SP Microcontrollers, Ti C2800 or Microchip Familiar with in-circuit debugger. Experience in structured software and systems development and integration, including experience in software design methodologies, design patterns, component-oriented software architecture to produce high-quality software applications. Experience in developing event driven, multi-threaded applications. Comfortable with Electrical Engineering fundamentals. Understand hardware schematics and write software to control it. Experience with Bluetooth, UART and SPI. Some understanding of control algorithms such as PID. Prior experience of motion control or fluid management is preferred. Experience in medical devices or similarly controlled software environment preferred. Knowledge of software life cycle processes used in regulated development environments. Result-oriented, self-motivated and able to participate as both a team member and an individual contributor. Location Raleigh-Durham-Chapel hill area/Research Triangle Employment Type W2 employee, open to 1099 engagements Benefits for W2 Employees Choice of medical, dental, and vision plans. Paid vacation time. Competitive hourly rate. 401(k) Offering world-class solutions for our clients is only part of our mission. Providing a rewarding and fulfilling place to work is a top priority for us. From an industry-leading compensation package to a focus on work-life balance, we offer a challenging and flexible place to achieve your career dreams. Make your impact today! About Ventura Solutions Ventura Solutions is a reputable end-to-end medical device and combination product consulting, staffing, and training firm. With our deep industry expertise spanning medical devices and combination products, coupled with an outstanding talent pool, we stand out as the preferred option for a diverse array of projects. On the consulting side, we integrate seamlessly into your team and manage small to complex Statement of Work (SOW) projects. On the staffing side, we help source, screen, and on-board reputable employees to fill temporary, temp to permanent, and permanent job openings. We accelerate product development, keep products compliant, and help build great organizations. For more information, visit us at ************************** Equal Opportunity Employer Minorities/Women/Veterans/Disabled

**About the Role:** We are looking for a talented, curious, and highly motivated Staff Conversational AI Designer to join our Voice & Sound team. The ideal candidate will breathe design and have deep expertise in Voice and Multimodal interfaces. You will join a team of experts working on end-to-end multimodal customer experiences, driving innovation in the rapidly evolving and expanding high-tech world of AI through user-centric practices and design. In this role, you will lead with vision and collaborate with other designers, researchers, technologists, and product stakeholders to craft effective and exceptional experiences through data-driven design. **Responsibilities:** + Lead design vision and execution for AI-based conversational and multimodal experiences, advocating usability and user-centered design principles. + Develop and promote conversation design best practice standards, reusable interactional patterns, and processes. + Deliver effective design documentation to communicate experience requirements, design principles, best practices, prototypes, and multimodal flows to convey voice forward interactions that leverage AI. + Identify opportunities for usability testing and research efforts by leading and supporting the creation of prototypes, participating in clinic sessions, analyzing, brainstorming, ideating etc. + Build strong relationships with internal stakeholders to understand priorities, collaborate on actions to implement product and service solutions, and ensure a connected end-to-end user experience. + Identify, track, and monitor industry/experience trends and drivers of customer needs and satisfaction. + Lead visualization of experiences using storyboards, customer journeys, user flows, low-fidelity wireframes and voice prototypes to illustrate vision and influence impactful experiences in AI + Balance user needs, technical constraints, and product objectives to solve problems effectively, crafting world-class multimodal user experiences. **Requirements:** + 9 + years creating conversational design experiences. + Ability to combine vision with strong creative design execution. + Strong portfolio with work samples showcasing expertise, craft, aesthetics, and depth of thought. + Experience designing for Generative or Agentive AI-powered experiences + Understanding of machine learning & natural language processing (NLP) fundamentals. + Experience incorporating research into the design process. + Subjet-matter expert. Ability to work independently, be organized, self-motivated, and have attention to detail. + Excellent written, visual, and verbal communication skills. + Proficient in common design tools (e.g.Figma, VoiceFlow, ProtoPie, etc). + Demonstrated experience documenting for **voice-only, voice-forward, and multi-modal** experiences + **Demonstrated experience** **creating interactive** prototypes formultimodal experiences (voice, sound, visuals, touch, chat, etc) **Preferred** **Qualifications:** + Deep understanding of Generative AI for Conversational Experiences, foundational elements of Conversation Design, and LLMs. + Ability to communicate technical concepts to a non-technical audience (verbal and written). + Ability to work effectively within an environment that leverages robust design systems and libraries, while seeking to delight and impress users with innovative concepts and experiences. **About GM** Our vision is a world with Zero Crashes, Zero Emissions and Zero Congestion and we embrace the responsibility to lead the change that will make our world better, safer and more equitable for all. **Why Join Us** We believe we all must make a choice every day - individually and collectively - to drive meaningful change through our words, our deeds and our culture. Every day, we want every employee to feel they belong to one General Motors team. **Benefits Overview** From day one, we're looking out for your well-being-at work and at home-so you can focus on realizing your ambitions. Learn how GM supports a rewarding career that rewards you personally by visiting Total Rewards resources (************************************************************* . **Non-Discrimination and Equal Employment Opportunities (U.S.)** General Motors is committed to being a workplace that is not only free of unlawful discrimination, but one that genuinely fosters inclusion and belonging. We strongly believe that providing an inclusive workplace creates an environment in which our employees can thrive and develop better products for our customers. All employment decisions are made on a non-discriminatory basis without regard to sex, race, color, national origin, citizenship status, religion, age, disability, pregnancy or maternity status, sexual orientation, gender identity, status as a veteran or protected veteran, or any other similarly protected status in accordance with federal, state and local laws. We encourage interested candidates to review the key responsibilities and qualifications for each role and apply for any positions that match their skills and capabilities. Applicants in the recruitment process may be required, where applicable, to successfully complete a role-related assessment(s) and/or a pre-employment screening prior to beginning employment. To learn more, visit How we Hire (********************************************* . **Accommodations** General Motors offers opportunities to all job seekers including individuals with disabilities. If you need a reasonable accommodation to assist with your job search or application for employment, email (Careers.Accommodations@GM.com) us or call us at ************. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying. We are leading the change to make our world better, safer and more equitable for all through our actions and how we behave. Learn more about: **Our Company (************************************************** **Our Culture** **How we hire (************************************************ Our diverse team of employees bring their collective passion for engineering, technology and design to deliver on our vision of a world with Zero Crashes, Zero Emissions and Zero Congestion. We are looking for adventure-seekers and imaginative thought leaders to help us transform mobility. Explore our global locations (******************************************** We are determined to lead change for the world through technology, ingenuity and harnessing the creativity of our diverse team. Join us to help lead the change that will make our world better, safer and more equitable for all by becoming a member of GM's Talent Community (beamery.com) (*********************************************** . As a part of our Talent Community, you will receive updates about GM, open roles, career insights and more. Please note that filling out the form below will not add you to our Talent Community automatically; you will need to use the link above. If you are seeking to apply to a specific role, we encourage you to click "Apply Now" on the job posting of interest. The policy of General Motors is to extend opportunities to qualified applicants and employees on an equal basis regardless of an individual's age, race, color, sex, religion, national origin, disability, sexual orientation, gender identity/expression or veteran status. Additionally, General Motors is committed to being an Equal Employment Opportunity Employer and offers opportunities to all job seekers including individuals with disabilities. If you need a reasonable accommodation to assist with your job search or application for employment, email us at Careers.Accommodations@GM.com .In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.

Arizona - Remote; Arkansas - Remote; Florida - Remote; Georgia - Remote; Idaho - Remote; Illinois - Remote; Indiana - Remote; Iowa - Remote; Kansas - Remote; Kentucky - Remote; Louisiana - Remote; Michigan - Remote; Minnesota - Remote; Mississippi - Remote; Missouri - Remote; Montana - Remote; Nebraska - Remote; Nevada - Remote; New Mexico - Remote; North Carolina - Remote; North Dakota - Remote; Ohio - Remote; Oklahoma - Remote; South Carolina - Remote; South Dakota - Remote; Tennessee - Remote; Texas - Remote; Utah - Remote; Virginia - Remote; West Virginia - Remote; Wisconsin - Remote; Wyoming - Remote **Company Description** We are Olsson. We engineer and design solutions that improve the world around us. As a company, we promise to always be responsive, transparent, and focused on results - for our people, our clients, and our company. We're a people-centric firm, so it's no surprise our greatest asset is our people. The impact this creates is an environment that encourages our people to grow and be creative with their talents. This approach builds a culture that is uniquely Olsson. It allows us to grow our people as we grow our business. This, in turn, creates a lasting impact on the world around us. **Job Description** As a Senior Electrical Engineer, you will work directly with some of the world's largest technology companies and other mission-critical clients. You will serve as an electrical engineer on projects, design calculations, write technical reports, and prepare documents. Experience in performing short circuit analysis and producing arc flash studies is required. You will also coordinate with other Olsson teams, professional staff, technical staff, and clients. You may travel to job sites for observation and attend client meetings. _We currently have one opening and will consider candidates interested in being located in most locations across the United States._ **Qualifications** **You are passionate about:** + Working collaboratively with others. + Having ownership in the work you do. + Using your talents to positively affect communities. **You bring to the team:** + Strong communication skills + Ability to contribute and work well on a team + Ability to be a self-starter to take on a variety of tasks to best serve the client and their project work + Investigation and troubleshooting of problems to find solutions + Ability to contribute and work well on a team + Bachelor's Degree in electrical engineering + 8+ years or related electrical engineering experience + Registered professional engineer (PE) required + SKM and ETAP software experience is preferred \#LI-DD1 **Additional Information** Olsson specializes in engineering and design, client advisory services, planning, field services, and environmental. Improving the world has been our mindset from the very beginning, back when Olsson first opened for business in 1956. And it will be our mindset for years to come. As an Olsson employee, you will: + Receive a competitive 401(k) match + Be empowered to build your career with tailored development paths + Have the possibility for flexible work arrangements + Engage in work that has a positive impact on communities + Participate in a wellness program promoting balanced lifestyles In addition, full-time employees will receive our traditional benefits package (health care, vision, dental, paid time off, etc.) and the opportunity to participate in a bonus system that rewards performance. Olsson is an Equal Opportunity Employer. We encourage qualified minority, female, veteran, and disabled candidates to apply and be considered for open positions. We do not discriminate against any applicant for employment or any employee because of race, color, religion, national origin, sex, sexual orientation, gender identity, gender, disability, age, military status, or other protected status. Olsson understands the importance of privacy and is committed to protecting job applicants' personal information. Pursuant to the California Consumer Privacy Act, as amended by the California Privacy Rights Act (collectively, the "CCPA"), this notice explains Olsson's practices regarding the collection, use, and disclosure of personal information for job applicants residing in California. Please read this Notice carefully to understand our privacy practices. For more information about the types of information we collect and how we use it in connection with your general access and use of our website, please review our general California Privacy Noticehere (************************************** . Create a Job Alert Interested in building your career at Olsson? Get future opportunities sent straight to your email.

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Built on decades of expertise and execution, Marvell's custom Processor/ASIC solution offers a differentiated approach with a best-in-class portfolio of data infrastructure intellectual property (IP) and a wide array of flexible business models. In this unique role, you'll have the opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance processor chips in a leading-edge CMOS process technology, targeted at server, 5G/6G, and networking applications. What You Can Expect You will work with both local and global team members on the physical design of complex chips as well as the methodology to enable an efficient and robust design process. This position also provides an exciting platform to engage with diverse engineering challenges within a collaborative and innovative environment at Marvell. We are hiring for multiple office locations. This is a full-time, on-site role, and employees are expected to work at their designated team location. Relocation assistance is available for qualified candidates. Key responsibilities include: * Work with design teams across various disciplines such as Digital/RTL/Analog to ensure design convergence and integration in a timely manner * Implement/support designs with multi-voltage designs through all aspects of implementation (place and route, static timing, physical verification) using industry standard EDA tools * Work with RTL design teams to drive assembly and design closure. * Provide technical direction, coaching, and mentoring to junior employees and colleagues when necessary to achieve successful project outcomes * Write scripts in Shell, Python, and TCL to extract data and achieve productivity enhancements through automation What We're Looking For * Bachelor's degree in Computer Science, Electrical Engineering or related fields and 5-10 years of related professional experience or Master's degree and/or PhD in Computer Science, Electrical Engineering or related fields with 3-5 years of experience or equivalent professional experience in lieu of a formal degree. * 5+ years experience in back-end physical design * Expertise in full-chip & sub-hierarchy integration * Experience integrating and taping out large designs utilizing a digital design environment. * Good understanding of RTL to GDS flows and methodology * Good scripting skills in Perl, tcl and Python * Good understanding of digital logic and computer architecture * Knowledge of Verilog * Good communication skills and self-discipline contributing in a team environment * Working knowledge of static timing analysis tools such as Tempus or PrimeTime and EM/IR-Drop/Crosstalk analysis tools like Voltus or PrimeRail is advantageous * Working knowledge of physical verification and formal verification tools (e.g., Calibre, LEC, Formality) is advantageous * Experience with multi-voltage and low-power design techniques is advantageous * Experience with Cadence Innovus is preferred Expected Base Pay Range (USD) 125,900 - 186,260, $ per annum The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions. Additional Compensation and Benefit Elements At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at *****************. Interview Integrity As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews. Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process. This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-VM1

About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Built on decades of expertise and execution, Marvell's custom Processor/ASIC solution offers a differentiated approach with a best-in-class portfolio of data infrastructure intellectual property (IP) and a wide array of flexible business models. In this unique role, you'll have the opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance processor chips in a leading-edge CMOS process technology, targeted at server, 5G/6G, and networking applications. What You Can Expect You will work with both local and global team members on the physical design of complex chips as well as the methodology to enable an efficient and robust design process. This position also provides an exciting platform to engage with diverse engineering challenges within a collaborative and innovative environment at Marvell. We are hiring for multiple office locations. This is a full-time, on-site role, and employees are expected to work at their designated team location. Relocation assistance is available for qualified candidates. Key responsibilities include: Work with design teams across various disciplines such as Digital/RTL/Analog to ensure design convergence and integration in a timely manner Implement/support designs with multi-voltage designs through all aspects of implementation (place and route, static timing, physical verification) using industry standard EDA tools Work with RTL design teams to drive assembly and design closure. Provide technical direction, coaching, and mentoring to junior employees and colleagues when necessary to achieve successful project outcomes Write scripts in Shell, Python, and TCL to extract data and achieve productivity enhancements through automation What We're Looking For Bachelor's degree in Computer Science, Electrical Engineering or related fields and 5-10 years of related professional experience or Master's degree and/or PhD in Computer Science, Electrical Engineering or related fields with 3-5 years of experience or equivalent professional experience in lieu of a formal degree. 5+ years experience in back-end physical design Expertise in full-chip & sub-hierarchy integration Experience integrating and taping out large designs utilizing a digital design environment. Good understanding of RTL to GDS flows and methodology Good scripting skills in Perl, tcl and Python Good understanding of digital logic and computer architecture Knowledge of Verilog Good communication skills and self-discipline contributing in a team environment Working knowledge of static timing analysis tools such as Tempus or PrimeTime and EM/IR-Drop/Crosstalk analysis tools like Voltus or PrimeRail is advantageous Working knowledge of physical verification and formal verification tools (e.g., Calibre, LEC, Formality) is advantageous Experience with multi-voltage and low-power design techniques is advantageous Experience with Cadence Innovus is preferred Expected Base Pay Range (USD) 125,900 - 186,260, $ per annum The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions. Additional Compensation and Benefit Elements At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at *****************. Interview Integrity As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews. Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process. This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-VM1

Unleash the Power of Multi-Mission Excellence: Safeguarding the Seas for the World's Navies. Step into a world where cutting-edge technology meets unparalleled expertise. Ultra Maritime pioneers delivering multi-mission solutions that protect and empower the naval forces worldwide. With our extensive portfolio of capabilities, our innovations are utilized on naval fleets across our allied navies around the globe. As the maritime and underwater battlespace evolves, we tirelessly push the boundaries to develop advanced specialist systems that provide our 'five-eyes' Defense customers with an unbeatable warfighting edge. From surface vessels to sub-surface operations and unmanned platforms, we are revolutionizing the way naval missions are executed. We thrive on collaboration and partnering with our customers to ensure mission success. Our expert solutions encompass an array of game-changing technologies, including state-of-the-art sonar, radar, and expendables. Join us in shaping the future of naval warfare and together, we will safeguard the seas and empower navies worldwide! Leads small-to-medium sized systems Engineering projects or technical work packages within cost and quality requirements as assigned and may allocate or coordinate work with the project or work package. Nationality Requirements Candidates must be eligible to obtain the relevant security clearance required for the role, due to the nature of the programmes we deliver for our customers. Job Description Ultra Maritime is searching for a highly motivated and detail oriented Systems Engineer to support the development of Radar systems. Working closely with RF, Mechanical, Electrical, and Software Engineers, the Systems Engineer will guide the development of the Radar System from initial design, through finalization of the design, and finally through the integration and test events. The Systems Engineer is expected to provide system level trade-space assessments of approaches working with the Project Engineer to determine the benefit trade-offs. At Ultra Maritime, the Systems Engineer will have the opportunity to guide the development and selection of key technologies for the Navy and will have the opportunity to work with complex software algorithms and cutting-edge digital signal processing hardware. The Systems Engineer will have the opportunity to contribute to key strategic approaches for future proposals, IR&D, and additional development activities. Primary Experience: * Strong attention to detail and work ethic. * Knowledge of proper systems engineering discipline and rigor required for disciplined systems development. * Significant experience with Radar systems or similar signal processing systems. * Experience and knowledge of algorithms used for navigation, periscope detection, discrimination or other parts of traditional Radar signal processing. * Laboratory knowledge including setup and use of Linux-based system integration, test, and execution. * Experience planning, reviewing, and executing integration and test events for combined hardware and software systems * Ability to document and specify system and subsystem level requirements. * Experience working with a team to jointly develop a system during all phases of the development lifecycle. * Review/provide technical input and cost estimation support. * Provide systems engineering leadership to a small group of systems or mixed discipline engineers. * Willingness to travel (10%). Preferred Experience: (Optional) * Automated testing of software baselines * Knowledge of Navy platforms or common Navy platforms interfaces. * Knowledge or understanding of X-band system trade-offs. * Experience working with MIL STDs for all types of test requirements (MIL-STD-454, MIL-STD-901, etc.). * Matlab, Mathcad, or other Modeling Languages. Qualifications: * 6+ years with BS Degree in Systems/EE Engineering or related discipline Typically, a Bachelor Degree (or equivalent) in a related field and 6+ years of related experience within a relevant complex engineering environment. May be required to maintain security clearance. Diverse & Inclusive Employer Ultra Maritime is a proud Equal Opportunity Employer committed to fostering a respectful, and diverse workplace. We welcome applicants from all backgrounds and do not tolerate discrimination of any kind. Employment decisions are made without regard to race, color, religion, sex (including pregnancy, childbirth, and related medical conditions), sexual orientation, gender identity or expression, age, national origin, ancestry, ethnicity, marital status, disability, genetic information, protected veteran status, citizenship status, or any other characteristic protected by applicable federal, state, or local laws. As a defense contractor, we are dedicated to maintaining the highest standards of integrity and security. We operate a drug-free workplace and, where permitted by law, conduct pre-employment background checks and substance abuse screening. We offer competitive benefits including medical, dental, vision, 401k match, paid time off and family leave, and much more! Reasonable accommodation statement: if you need an accommodation for any part of the application process, please email ************************ Company: Ultra Maritime

About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at ************** and on LinkedIn and Twitter (X). Engineer Position - DV Job Description Summary Analog Devices is committed to investing in our people and their growth. One way we can do this is by establishing a cutting-edge Entry Level Hiring program. This program features high impact professional development, opportunities to drive meaningful projects that are directly tied to business goals, and unique executive exposure. Our duty is to develop the next generation of talent in our communities and provide them with a pathway to apply their academic skills in the real-world. At ADI, our early career hires will learn from the brightest minds who are dedicated to their growth, development, and success. From an industry perspective, incoming new career hires are surrounded by employees that represent the best of the best minds in their respective fields. Apply now for the opportunity to grow your career and help innovate ahead of what's possible! The Data Center & Energy team is seeking a motivated design engineer to provide support to our Cloud Power BU located in Durham, NC, USA. As an individual contributor, the candidate will be working closely with a group of about 15 engineers. The project provides unique learning opportunities related to advanced mixed signal design verification techniques. Responsibilities include, but not limited to: * Verification of mixed signal designs and sub-systems using leading edge verification methodologies. * Contribute and influence the decisions on methodologies to be adopted for the verification. * Architect the testbench and develop in UVM or Formal based verification approaches. Integrate the block testbench in chip-level UVM environment and verify integration. * Define testplans, tests and verification methodology for block / chip-level verification. Work with the design team in generating test-plans and closure of code and functional coverage. * Continuous interaction with analog and digital teams in enabling top-level chip verification. * Support post-silicon verification activities of the products working with design, product evaluation, and applications engineering team. Minimum qualifications * Bachelor's or Master's degree in Electrical or Computer Engineering. * 7+ years of hands-on experience in SystemVerilog/UVM. * Experience in EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments. * Experience in architecting and implementing Design Verification infrastructure and executing the full verification cycle. Preferred qualifications * Experience in developing test benches using System Verilog and OVM/UVM. * Knowledge of test-plan generation, coverage analysis, transaction level modeling, pseudo and constrained random techniques, assertion based and formal verification techniques with System Verilog. * Experience of pre and post-silicon verification test flow and automated test benches. * Familiarity with verification on multiphase DC-DC controllers. * Experience with verification of ARM/RISC-V based sub-systems or SoCs. * Experience with verification of voltage interfaces like PMBUS, AVS, SVID, SVI3 etc. * Experience with revision control systems like Perforce, Git etc. * Verilog, C/C++, System C, TCL/Perl/Python/shell-scripting. * RTL design/front-end design experience. * Experience with analog SV-RNM/EE-net modeling * Experience with formal verification methodology. * Strong interpersonal, teamwork and communication skills. * Self-motivated and enthusiastic. For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position - except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) - may have to go through an export licensing review process. Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group. EEO is the Law: Notice of Applicant Rights Under the Law. Job Req Type: Experienced Required Travel: Yes, 10% of the time Shift Type: 1st Shift/Days

NVIDIA is seeking elite ASIC Verification Engineers to verify the design and implementation of the world's leading SoC's and GPU's. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. In this position, you will help to build the high-performance processor elements that implement programmable compute and graphics functionality. What you'll be doing: * As a key member of our ASIC Verification team, you will verify the design and implementation of the industry's leading GPUs * You will be responsible for verification of the ASIC design, architecture, golden models and micro-architecture using advanced verification methodologies such as UVM * Understand the design and implementation of your unit, define the verification scope, develop the verification infrastructure and verify the correctness of the design * Collaborate with architects, designers, and pre and post silicon verification teams to accomplish your tasks What we need to see: * Bachelors Degree in EE, CS or CE or equivalent experience * 5+ years of relevant experience * Experience in verification using random stimulus along with functional coverage and assertion-based verification methodologies * Experience with design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB) * Expertise in System Verilog or similar HVL * You display strong debugging and analytical skills * Perl and C/C++ programming language experience desirable * Prior experience with arbiters, interconnect networks and/or caches is desirable * Strong communication skills and ability & desire to work as a great teammate are huge plus * Experience in crafting test bench environments for unit and system level verification NVIDIA is widely considered to be one of the technology world's most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Come join our GPU ASIC Verification team and help us build future architectures that will continue to drive us forward in the fields of computing, graphics and AI. #LI-Hybrid Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4. You will also be eligible for equity and benefits. Applications for this job will be accepted at least until January 13, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

At Apple, we work every single day to craft products that enrich people's lives. Do you love working on challenges that no one has solved yet and changing the game? We have an opportunity for an outstandingly hardworking design verification engineer! As a member of our wide-ranging group, you will have the rare and extraordinary opportunity to craft upcoming products that will delight and encourage millions of Apple's customers daily. This role is for a DV engineer who will enable us to produce fully functional first silicon for IP designs. The responsibilities include all phases of pre-silicon verification including but not limited to: establishing DV methodology, test-plan development, verification environment development including stimulus and checkers, test-writing, debug, coverage, sign-off for RTL freeze and tape-out. In this role, you will be responsible for ensuring bug-free first silicon for part of the SoC / IP and are encouraged to develop detailed test and coverage plans based on the micro-architecture. You are responsible for developing verification methodology suitable for the IP, ensuring a scalable and portable environment. You will get to develop verification environment, including all the respective components such as stimulus, checkers, assertions, trackers, coverage. A mindset to break the design is highly desirable. Furthermore, you will develop verification plans for all features under your care, execute verification plans, including design bring-up, DV environment bring- up, regression enabling features, and debug of the test failures. You will also learn to develop block, IP and SoC level test-benches track and report DV progress using a variety of metrics, including bugs and coverage. You will also be expected to make use of LLM and related technologies to achieve efficient execution and improved quality. Deep knowledge of OOP, SystemVerilog and UVM Deep knowledge in developing scalable and portable test-benches Strong experience with verification methodologies and tools such as simulators, waveform viewers, Build and run automation, coverage collection, gate level simulations Working experience using LLMs for efficiency and quality Experience with power-aware (UPF) or similar verification methodology Excellent knowledge of one of the scripting languages such as Python, Perl, TCL Experience with serial protocols such as PCIe or USB, parallel protocol such as DDR is a plus but not required Knowledge of formal verification methodology is a plus but not required Knowledge of emulation for verification technologies is a plus but not required BS degree in technical subject area and a minimum 10 years relevant industry experience.

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft's expanding Cloud Infrastructure and responsible for powering Microsoft's "Intelligent Cloud" mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for a Senior SOC Fabric Verification Engineer to help achieve that mission. The Compute Silicon & Manufacturing Engineering (CSME) organization within SCHIE is responsible for design, development, manufacturing and packaging of Microsoft's state-of-the-art computer chips, notably the Azure Cobalt. Our solutions provide sustainable strategic advantage to Microsoft and enable our customers to achieve more. As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the Compute Silicon and Manufacturing Organization (CSME) team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for a Senior SOC Fabric Verification Engineer with a dedicated passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure. We are looking for a Senior SOC Fabric Verification Engineer as an individual contributor to join the team. Responsibilities * Own verification of complex flows at the SOC or subsystems levels * Learn about the design and interact with partner teams to define verification strategies and test plans * Develop verification environments and run and debug simulations to drive quality * Apply random-stimulus and coverage-based techniques to find bugs and meet test plan goals * Innovate to improve verification efficiency through methodologies or tools * Apply industry leading generative AI solutions to verification work * Coach and mentor others in your areas of expertise * Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion Qualifications Required Qualifications: * Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience. Other Requirements: Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter. Preferred Qualifications: * Demonstrated experience in one or more of the following: Coherent Hub Interface (CHI), Advanced eXtensible Interface (AXI) and Advanced Microcontroller Bus Architecture (AMBA) protocols; coherency, fabrics, integration of Central Processing Unit (CPU) cores, power management, reset, virtualization, interrupts, security, clocking, or other complex SOC flows and protocols * Experience with SOC or chip level verification for more than one product cycle from definition to silicon, including writing test plans, developing tests, debugging failures and signing off coverage * Experience creating, maintaining, or integrating test benches, checkers and stimulus using C, System Verilog Test Bench (SVTB), Universal Verification Methodology (UVM), and/or Formal Verification * Aptitude for writing scripts/software with industry standard languages like Python * Experience applying AI to day-to-day tasks #SCHIE #CSME Silicon Engineering IC4 - The typical base pay range for this role across the U.S. is USD $119,800 - $234,700 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $158,400 - $258,000 per year. Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here: **************************************************** This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled. Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.