Senior verification engineer jobs in Quincy, MA

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Systems Engineer II
Raytheon 4.6
Senior verification engineer job in Lowell, MA
Country: United States of America Onsite U.S. Citizen, U.S. Person, or Immigration Status Requirements: The ability to obtain and maintain a U.S. government issued security clearance is required. U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance Security Clearance: DoD Clearance: Secret At Raytheon, the foundation of everything we do is rooted in our values and a higher calling - to help our nation and allies defend freedoms and deter aggression. We bring the strength of more than 100 years of experience and renowned engineering expertise to meet the needs of today's mission and stay ahead of tomorrow's threat. Our team solves tough, meaningful problems that create a safer, more secure world. The Radar Systems Engineer II is responsible for generating new and updated specifications for radar development programs while following the systems engineering processes for updating, reviewing, and releasing the specifications. The Radar Systems Engineer ensures that the System Capabilities and Requirements are appropriately flowed from the System Spec through the Radar System and Subsystem specs to the design and verification teams. You will be responsible for creation, review, and submittal for approval of all Radar Performance, Functional, Hardware, Interface, Environmental, Manufacturing, and Fabrication Requirements changes that leverage Radar Software Capabilities. You will also be responsible for but is not limited to: support of concept development, testing, integration and verification activities, and coordination between design, software, and systems requirements teams. What You will Do: Generate specification changes that reflect the new and obsolescence development programs related to radar upgrades and maintenance Collaborate with Software and Systems Test teams and the USG customer on radar capabilities driven by new hardware and algorithm development Provide technical oversight for the execution of Radar Systems Requirement Development Collaborate with the Systems Engineering Lead and Chief Engineers to ensure that the Hardware, Software, and System Requirements are all being met in a consistent manner Support Independent Research and Development and other sources of internal funding for future Radar capability upgrades and innovations Support internal and external Program and Gate Reviews including Systems Requirements Reviews, Preliminary Design Reviews, Critical Design Reviews, and Test Readiness Reviews. Support the Independent Reviews (IRs) that precede each gate. Qualifications You Must Have:: Typically requires a Bachelor's in Science, Technology, Engineering, or Mathematics (STEM preferred) and a minimum of 2 years of prior engineering experience or equivalent experience. Ability to obtain and maintain U.S. government issued security clearance is required. U.S. citizenship is required, as only U.S. citizens are eligible for the required security clearance. Experience with tactical air defense systems, product line development processes, and software development Experience interfacing with external customers Experience across the product development life cycle Qualifications We Prefer: Existing DoD Secret Clearance Radar Knowledge Experience making challenging technical decisions and setting priorities Experience designing, implementing and testing radar waveforms and signal processing algorithms Familiarity with Raytheon Integrated Product Development System (IPDS) and gating processes Ability to travel domestically and internationally What We Offer: Our values drive our actions, behaviors, and performance with a vision for a safer, more connected world. At RTX we value: Safety, Trust, Respect, Accountability, Collaboration, and Innovation. Learn More & Apply Now! Please consider the following role type definition as you apply for this role. Onsite: Employees who are working in Onsite roles will work primarily onsite. As part of our commitment to maintaining a secure hiring process, candidates may be asked to attend select steps of the interview process in-person at one of our office locations, regardless of whether the role is designated as on-site, hybrid or remote. The salary range for this role is 66,000 USD - 130,000 USD. The salary range provided is a good faith estimate representative of all experience levels. RTX considers several factors when extending an offer, including but not limited to, the role, function and associated responsibilities, a candidate's work experience, location, education/training, and key skills.Hired applicants may be eligible for benefits, including but not limited to, medical, dental, vision, life insurance, short-term disability, long-term disability, 401(k) match, flexible spending accounts, flexible work schedules, employee assistance program, Employee Scholar Program, parental leave, paid time off, and holidays. Specific benefits are dependent upon the specific business unit as well as whether or not the position is covered by a collective-bargaining agreement.Hired applicants may be eligible for annual short-term and/or long-term incentive compensation programs depending on the level of the position and whether or not it is covered by a collective-bargaining agreement. Payments under these annual programs are not guaranteed and are dependent upon a variety of factors including, but not limited to, individual performance, business unit performance, and/or the company's performance.This role is a U.S.-based role. If the successful candidate resides in a U.S. territory, the appropriate pay structure and benefits will apply.RTX anticipates the application window closing approximately 40 days from the date the notice was posted. However, factors such as candidate flow and business necessity may require RTX to shorten or extend the application window. RTX is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability or veteran status, or any other applicable state or federal protected class. RTX provides affirmative action in employment for qualified Individuals with a Disability and Protected Veterans in compliance with Section 503 of the Rehabilitation Act and the Vietnam Era Veterans' Readjustment Assistance Act. Privacy Policy and Terms: Click on this link to read the Policy and Terms
$63k-80k yearly est. 1d ago
Senior Analog Design Verification Engineer
Analog Devices 4.6
Senior verification engineer job in Wilmington, MA
Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at ************** and on LinkedIn and Twitter (X). Analog Devices, Inc is looking for a Senior Analog Design Verification Engineer with deep technical expertise and strategic vision to lead verification efforts for complex analog and mixed-signal ICs to join our Automotive Connectivity Design Verification team. Our team is responsible for complete design verification for our automotive connectivity silicon products including block-level, chip-level, and system-level verification. The team works closely with our design and product test engineering teams to maximize the quality of our silicon products. Key Responsibilities Own and drive the end-to-end verification strategy for high-performance analog and mixed-signal IPs and subsystems. Architect and implement advanced verification methodologies, including assertion-based verification, coverage-driven verification, and mixed-signal co-simulation. Lead the development of behavioral models, testbenches, and automated regression environments using Verilog, SystemVerilog, and scripting languages. Perform deep analysis of simulation results, including statistical and corner case evaluations (Monte Carlo, mismatch, PVT). Collaborate with design leads to influence architecture decisions and ensure verification coverage of critical design features. Interface with design teams, digital verification teams, and post-silicon validation to ensure seamless integration and testability. Mentor junior engineers and contribute to the development of internal best practices, tools, and reusable verification IP. Job Requirements Master's or Ph.D. in Electrical Engineering 7+ years of relevant experience in mixed signal design verification. Advanced knowledge of design verification flows including UVM methodology and mixed signal co-simulation. Expert-level proficiency in simulation tools including Spectre (or similar) and SystemVerilog. Strong understanding of analog design fundamentals Demonstrated leadership in verification planning, execution, and cross-functional collaboration. Candidates should have strong analytical and problem-solving skills and the ability to work on multiple projects as required Strong interpersonal, teamwork and communication skills are required #LI-PG1 For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position - except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) - may have to go through an export licensing review process. Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group. EEO is the Law: Notice of Applicant Rights Under the Law. Job Req Type: ExperiencedRequired Travel: Yes, 10% of the time Shift Type: 1st Shift/DaysThe expected wage range for a new hire into this position is $125,250 to $187,875. Actual wage offered may vary depending on work location, experience, education, training, external market data, internal pay equity, or other bona fide factors. This position qualifies for a discretionary performance-based bonus which is based on personal and company factors. This position includes medical, vision and dental coverage, 401k, paid vacation, holidays, and sick time, and other benefits.
$125.3k-187.9k yearly Auto-Apply 60d+ ago
Design Verification Engineer
Apple Inc. 4.8
Senior verification engineer job in Waltham, MA
Does making the next great technology product excite you? Imagine what you could do here. At Apple, our new ideas have a way of becoming great products, services, and customer experiences very quickly. We bring passion and dedication to our job and when you are a part of that team there's no telling what you could accomplish. Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple's premier SOCs. This is a critical job within Apple's Hardware Technology organization, and we'd love to have you join us. As part of a very dedicated team you will be at the heart of the chip design effort collaborating with all fields (vertical product model). You own ensuring the quality of the SOC or an IP or subsystem. This requires you to review design and architecture specifications and work closely with design u0026 micro-architecture teams. A key component to the job is understanding the functional u0026 performance goals of the design and you use this knowledge to test effectively. You develop test plans, tests u0026 coverage plans as well as define our next generation verification methodology u0026 testbenches. You will actively communicate and collaborate with design, architecture and software to understand the use cases and corner conditions and drive test cases. The SOC contains many subsystems and IP, so you may be working on one or several of the following types of IP: - Neural Engine hardware - DRAM subsystem, memory controller logic - Encode and Decode systems for ProRes and other codec formats such as VP9, AV1 - Hardware security, including cryptographic algorithm implementations - High-Speed IO standards such as PCI Express, DisplayPort, MIPI - Power management and fabric infrastructure - Memory cache management - Display Subsystem for variety of panels and products These are just some examples of the exciting designs that are part of our team. Joining SOC DV allows you to focus deeply on one main IP or expand your breadth as you work on a collection of subsystems. It's up to you! Skilled in many aspects of digital verification such as constrained random verification process, functional coverage, code coverage, assertion methodology u0026 philosophy Knowledge of SystemVerilog, digital simulation and debug Knowledge of computer architecture and digital design fundamentals Good SW programming skills with knowledge of data structures and algorithms Experience with Python, Perl, or similar scripting language Ability to work independently to deliver the project goals Knowledge of verification methodologies like UVM Experience with C/C++, assembly is a plus. Excellent interpersonal and communication skills and the dream to take on diverse challenges. Minimum of BS + 3 years relevant industry experience.
$121k-161k yearly est. 60d+ ago
Design Verification Engineer
Advanced Micro Devices, Inc. 4.9
Senior verification engineer job in Boxborough, MA
WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: We are looking for an adaptive, self-motivated Design Verification Engineer to join our growing team. As a key contributor, you will help develop and execute verification strategies that ensure AMD delivers high-quality, industry-leading technologies to market. The Verification Engineering team fosters continuous technical innovation and supports career development through collaboration and learning. THE PERSON: You are passionate about modern processor architectures, digital design, and verification methodologies. You thrive in a collaborative environment, communicate effectively across teams and time zones, and bring strong analytical and problem-solving skills. You are eager to learn and ready to tackle complex challenges. KEY RESPONSIBILITIES: * Develop and maintain functional and performance verification tests at the core level. * Build testbench components to support next-generation IP. * Maintain and enhance test libraries for IP-level testing. * Create and optimize hardware emulation builds to verify IP functionality and * performance. * Improve emulation environments to accelerate runtime and enhance debug capabilities. * Provide technical support and collaborate with cross-functional teams. PREFERRED EXPERIENCE: * Strong object-oriented programming skills. * Proficiency in UVM, SystemVerilog, and C++. * Background in computing or graphics architectures. * Familiarity with OpenGL, OpenCL, or Direct3D programming. * Experience with ARM protocols is a plus. ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering This role is not eligible for visa sponsorship. #LI-BS1 #LI-Hybrid Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.
$95k-122k yearly est. 4d ago
Senior Design Verification Engineer
HPR 3.8
Senior verification engineer job in Needham, MA
HPR is a leading provider of high-performance and ultra-low latency electronic trading and capital markets infrastructure solutions offered as a managed service. Our cutting-edge technology is used by tier-1 financial institutions to monitor and execute trades rapidly and efficiently. As we continue to innovate and grow, we're searching for a forward-thinking Senior Design Verification Engineer to help us build the future of capital markets infrastructure. As a Senior Design Verification Engineer at HPR, you will: Verify and maintain high-performance FPGA compute and networking systems used in electronic trading Own the verification process from specification, test planning, and testbench development through execution and coverage closure Partner with design engineers to review and execute comprehensive test plans Create and maintain reusable verification components and testbenches written in SystemVerilog Lead and mentor junior engineers, promoting our culture of continuous learning and collaboration Contribute to improving our verification processes, tools, and methodologies Required Qualifications BS/MS in Computer Engineering, Electrical Engineering, Computer Science, or related 5+ years of experience in design verification for FPGAs or ASICs Proficiency in SystemVerilog for verification Familiarity with advanced verification methods, including constrained randomization, functional coverage, and assertion-based checking Experience with industry-standard simulation and debugging tools (e.g., VCS, Verdi) Comfortable working in a Linux environment Strong problem solving, debugging, and communication skills Desired Qualifications Deep understanding of computer architecture and digital design concepts In-depth knowledge of networking protocols (IP, TCP, UDP) Experience verifying designs with high-speed interfaces (PCIe, Ethernet, and/or DDR) Familiarity with C programming and scripting in Python and/or Perl Compensation: In compliance with Massachusetts law, the anticipated annual base salary range for this position is $ $159,300 to $215,000. Please note that this range represents the expected base salary for this role at the time of posting. The final offer may vary based on factors such as the candidate's experience, skills, and qualifications. This range does not include other forms of compensation such as potential bonuses, equity, or benefits. This position requires being on-site at our office in Needham, MA full-time (5 days per week) HPR does not currently provide employment sponsorship
$159.3k-215k yearly Auto-Apply 52d ago
Senior FPGA Design Verification Engineer
Career Renew
Senior verification engineer job in Dedham, MA
Job Description Career Renew is recruiting for one of its clients a Senior FPGA Design Verification Engineer in Dedham, MA. Our engineers redefine what's possible and our manufacturing team brings it to life, building the brains behind the brawn on submarines, ships, combat vehicles, aircraft, satellites, and other advanced systems. We pride ourselves in being a great place to work with this shared sense of purpose, committed to a diverse and exciting employee experience that drives innovation and creates a community where all feel welcome and a part of something amazing. As a Senior Cyber FPGA Design Verification engineer, you'll be a member of a cross functional team responsible for product design from system architecture & requirements allocation through product release and production of cost-sensitive secure products. Requirements Bachelor's degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field, plus a minimum of 8 years of relevant experience; or Master's degree plus a minimum of 6 years of relevant experience. Experience with OVM / UVM design verification methodology: bash/csh, Perl, TCL, Python or similar scripting languages; VHDL or similar hardware description languages. CLEARANCE REQUIREMENTS: Department of Defense Secret security clearance is required at time of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required. What sets you apart: Experience defining verification methodology for complex FPGAs. Ability to analyze requirements, create test plan, build and set up scalable simulation environments from the ground up using SystemVerilog/UVM Familiarity with testing complex designs, code coverage, functional coverage, assertions. Ability to work in a dynamic environment that includes working with changing needs and requirements. FPGA/ASIC design experience is a plus. Familiarity with Xilinx FPGA & Questa Advanced Functional Verification tools is a plus. Team player who thrives in collaborative environments and revels in team success Benefits An exciting career path with opportunities for continuous learning and development. Research oriented work, alongside award winning teams developing practical solutions for our nation's security Flexible schedules with every other Friday off work, if desired (9/80 schedule) Competitive benefits, including 401k matching, flex time off, paid parental leave, healthcare benefits, health & wellness programs, employee resource and social groups, and more
$94k-125k yearly est. 16d ago
SoC/ASIC Design Verification Engineer
Zerorisc
Senior verification engineer job in Boston, MA
Job DescriptionzeroRISC zero RISC is redefining chip security and supply chain integrity by empowering device owners and operators in crucial sectors like silicon production, IoT, and critical infrastructure with full device ownership, control, and visibility. Led by the founders of the OpenTitan secure silicon project, zero RISC is driving commercial adoption of high assurance software and services rooted in open silicon. Our products forge an immutable connection between hardware and software, enabling users to trust their devices no matter where they're built or where they're deployed. Role Overview As a zero RISC SoC/ASIC Design Verification Engineer, you will develop, verify, and maintain silicon in security-sensitive settings, including root-of-trust technology. You will elevate and solidify zero RISC's status as the leading provider of secure silicon IP by developing essential verification collateral. You will interact directly with zero RISC customers to understand their requirements and deliver solutions benefitting both customer and zero RISC alike. You will participate in the whole chip design process from architecture to tapeout and silicon validation. By engaging with the world's premier open-source silicon community, you will support our mission of open secure silicon everywhere. We're looking for engineers with strong design verification skills (and a long view of secure system architecture) who are also fast, flexible learners and enthusiastic about open source.Key Responsibilities: Verify ASIC/SoC functionality, performance, security, and power throughout the full chip design life cycle, from test plan definition to sign-off Build high quality verification environments at the chip/top and block levels following engineering best practices Write thorough verification documentation including test plans Diagnose, debug, and resolve regression failures and other errors Achieve coverage closure Ensure design functionality while upholding stringent timelines in collaboration with architecture, design, software, system, and silicon validation teams as well as engineering program managers What We're Looking For: Bachelor's degree in Electrical Engineering or Computer Science, or a related technical field or equivalent experience 4 years of experience with simulation-based verification methodologies and languages such as UVM and SystemVerilog or formal verification-based techniques including industry standard tools Experience developing and maintaining testbenches, test cases, and verification environments for simulation-based verification or formal verification environments Preferred Qualifications (not required): Master's or PhD in Electrical Engineering or Computer Science, or a related technical field or equivalent experience Knowledge of security ASICs or accelerators (e.g. cryptography accelerators or GPUs) Knowledge of computer architecture and memory subsystem architectures Experience verifying low power designs Experience with scripting languages such as Python Why Join Us? Your work will directly contribute to the development of cutting-edge security solutions, protecting critical systems in industrial and IoT environments As a seed-stage startup, this role offers significant opportunities for learning and career growth Join a close-knit, innovative team where you can learn, grow, and contribute to building something meaningful in the security space We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses. These tools assist our recruitment team but do not replace human judgment. Final hiring decisions are ultimately made by humans. If you would like more information about how your data is processed, please contact us.
$94k-125k yearly est. 19d ago
Senior Embedded Engineer
Whoop 4.0
Senior verification engineer job in Boston, MA
Job DescriptionAt WHOOP, we're on a mission to unlock human performance. WHOOP empowers members toperform at a higher level through a deeper understanding of their bodies and daily lives. WHOOP is seeking a Senior Embedded Engineer to drive the development and optimization ofthe hardware systems behind our cutting-edge wearable technology. As a critical member ofthis team, you will drive the design, development, and optimization of embedded systems thatpower WHOOP's devices, ensuring they meet the high standards of reliability and performanceour members expect. Your expertise will directly impact WHOOP's ability to innovate and delivertransformative experiences.RESPONSIBILITIES: Drive the development and optimization of the hardware systems behind our cutting-edge wearable technology. Develop and optimize hardware systems for low-power, resource-constrained embedded environments, ensuring efficient and reliable device performance. Collaborate with cross-functional teams to define hardware requirements and support the integration of sensors, communication modules, and power management systems. Design, prototype, and test hardware components to ensure quality, scalability, and functionality align with product goals. Debug and resolve complex issues across the hardware stack, leveraging advanced diagnostic tools and methodologies. Support the selection and validation of electronic components, ensuring reliability and performance in real-world conditions. Contribute to the development and optimization of communication interfaces such as I2C, SPI, UART, and BLE for seamless connectivity. Conduct hardware performance analysis and testing to meet stringent power and reliability requirements for wearable devices. Collaborate with manufacturing teams to ensure robust design-for-manufacturing (DFM) and design-for-test (DFT) processes. QUALIFICATIONS: Master's degree in Computer Engineering, Electrical Engineering, or related technical field or foreign degree equivalent and 6 months experience with developing and debugging embedded hardware and software systems. 6 months of experience with programming languages (Python or similar); 6 months of experience with C, C++ or other scripting language. 6 months of experience working with microcontrollers, RTOS, and peripheral interfaces including I2C, SPI, UART, and BLE. 6 months of experience with low-power design and optimization techniques for battery-powered devices. 6 months of experience with debugging using tools including oscilloscopes, logic analyzers, and similar equipment. 6 months of experience solving problems and developing innovative solutions in the wearable or IoT space. 6 months of experience effectively communicating across technical and non-technical teams. Partial telecommuting permissible from home office within normal commuting distance. Interested in the role, but don't meet every qualification? We encourage you to still apply! At WHOOP, we believe there is much more to a candidate than what is written on paper, and we value character as much as experience. As we continue to build a diverse and inclusive environment, we encourage anyone who is interested in this role to apply. WHOOP is an Equal Opportunity Employer and participates in E-verify to determine employment eligibility. It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability. The WHOOP compensation philosophy is designed to attract, motivate, and retain exceptional talent by offering competitive base salaries, meaningful equity, and consistent pay practices that reflect our mission and core values. At WHOOP, we view total compensation as the combination of base salary, equity, and benefits, with equity serving as a key differentiator that aligns our employees with the long-term success of the company and allows every member of our corporate team to own part of WHOOP and share in the company's long-term growth and success. The U.S. base salary range for this full-time position is $155,000 - $245,000 . Salary ranges are determined by role, level, and location. Within each range, individual pay is based on factors such as job-related skills, experience, performance, and relevant education or training. In addition to the base salary, the successful candidate will also receive benefits and a generous equity package. These ranges may be modified in the future to reflect evolving market conditions and organizational needs. While most offers will typically fall toward the starting point of the range, total compensation will depend on the candidate's specific qualifications, expertise, and alignment with the role's requirements.
$155k-245k yearly 5d ago
Design Verification Staff Engineer
Marvell
Senior verification engineer job in Westborough, MA
Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Custom Compute & Storage (CCS) Business Unit, is one of Marvell's fastest growing business units. In CCS, we focus on helping our customers with their custom designs for cloud-based AI applications as well as customers in the enterprise and carrier markets.Custom Compute & Storage (CCS) Business Unit, is one of Marvell's fastest growing business units. In CCS, we focus on helping our customers with their custom designs for cloud-based AI applications as well as customers in the enterprise and carrier markets. What You Can Expect . * Develop and execute verification plans for ethernet or memory subsystems/ * Create and maintain testbenches and test cases. * Perform functional and performance verification. * Debug and resolve design and verification issues. * Collaborate with design and architecture teams to ensure verification coverage. Other Skills: * Excellent problem-solving and analytical skills. * Strong communication and teamwork abilities. * Develop and execute verification test plans. * Create and maintain testbenches and test cases. * Perform functional and performance verification. * Debug and resolve design and verification issues. * Collaborate with design and architecture teams to ensure verification coverage. Other Skills: * Excellent problem-solving and analytical skills. * Strong communication and teamwork abilities. What We're Looking For . * Bachelor's degree in Computer Science, Electrical Engineering, or related fields and 3+ years of related professional experience. * Master's degree and/or PhD in Computer Science, Electrical Engineering or related fields with 2+years of experience. * Proficiency in SystemVerilog and UVM (Universal Verification Methodology). * Experience with simulation tools (e.g., VCS). * Knowledge of scripting languages (Python, Perl, TCL). * Knowledge in one of the following areas preferred PCIe, Ethernet. UEC, or DDR. Expected Base Pay Range (USD) 118,500 - 175,380, $ per annum The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions. Additional Compensation and Benefit Elements At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at *****************. Interview Integrity As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews. Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process. This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-SA1
$94k-125k yearly est. Auto-Apply 60d+ ago
Senior Design Verification Engineer
Marvell Technology
Senior verification engineer job in Westborough, MA
About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Infrastructure Processor Business Unit, a part of Networking and Processor Business Group, encompasses OCTEON and the award-winning OCTEON Fusion-M product families. The SoC family of multi-core CPU processors and Radio Access SoCs offer best-in-class performance, low power, rich software ecosystem, virtualization features, and open source application support with highly optimized custom ARM CPU cores providing an excellent solution for a highly flexible end-to-end optimized 5G platform. As part of the Infrastructure Processor unit at Marvell, you will verify all of the circuitry that goes inside our chips for the general market and for specific customers. These chips use cutting-edge technology to facilitate data transfers at high speeds, and you will help verify that each design meets our customers' specifications whether they're a major telecom organization or automotive company, etc. What You Can Expect In this in-office role, you will work in a team developing system exerciser tools used to functionally test individual logic units, integrated subsystems, and full SoC's. You will be responsible for the development and maintenance of drivers and test code in an embedded Linux environment with the opportunity to work with hardware designers and architecture teams driving leading edge processor technology. What We're Looking For To be successful in this role you must: Have completed a Bachelor's or Master's Degree in Electrical Engineering, Computer Engineering, or Computer Science. Have included programming classes in C/C++ or similar language in your coursework. Be comfortable working in a Linux environment and doing scripting with Python. Be extremely detail-oriented and ready to iterate a design over and over again until it is refined completely. Work and communicate well with your team, keeping them in the loop about your progress, issues you encounter, and any deviations from planned schedule. Expected Base Pay Range (USD) 100,400 - 148,630, $ per annum The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions. Additional Compensation and Benefit Elements At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at *****************. #LI-AR2
$94k-125k yearly est. Auto-Apply 60d+ ago
ASIC Design/Verification Engineer
Carlton National Resources, Inc. 3.7
Senior verification engineer job in Wakefield, MA
We are looking for an experienced ASIC Design/Verification Engineer with extensive expertise in design verification. Proficiency in HDL (VHDL/Verilog) and HVL (SystemVerilog), along with experience in SystemVerilog Assertions (SVA) and UVM, is essential. Key Responsibilities: * Verify ASIC designs using VHDL/Verilog and SystemVerilog with coverage-driven methodologies. * Implement SystemVerilog Assertions (SVA) and use UVM for thorough verification. * Develop and monitor verification plans, refining strategies as necessary. * Use scripting (Tcl, Python, Perl) to streamline verification workflows. * Collaborate with design engineers to debug and ensure quality. Required Qualifications: * 9+ years of experience in ASIC verification. * Expertise in HDL and HVL languages, SystemVerilog Assertions, and UVM. * Knowledge of industry-standard interfaces. Preferred Skills: * Proficiency in scripting languages. * Strong communication skills for collaborative verification efforts.
$88k-115k yearly est. 60d+ ago
Systems Engineer II
Raytheon 4.6
Senior verification engineer job in Salem, NH
Country: United States of America Onsite U.S. Citizen, U.S. Person, or Immigration Status Requirements: The ability to obtain and maintain a U.S. government issued security clearance is required. U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance Security Clearance: DoD Clearance: Secret At Raytheon, the foundation of everything we do is rooted in our values and a higher calling - to help our nation and allies defend freedoms and deter aggression. We bring the strength of more than 100 years of experience and renowned engineering expertise to meet the needs of today's mission and stay ahead of tomorrow's threat. Our team solves tough, meaningful problems that create a safer, more secure world. The Radar Systems Engineer II is responsible for generating new and updated specifications for radar development programs while following the systems engineering processes for updating, reviewing, and releasing the specifications. The Radar Systems Engineer ensures that the System Capabilities and Requirements are appropriately flowed from the System Spec through the Radar System and Subsystem specs to the design and verification teams. You will be responsible for creation, review, and submittal for approval of all Radar Performance, Functional, Hardware, Interface, Environmental, Manufacturing, and Fabrication Requirements changes that leverage Radar Software Capabilities. You will also be responsible for but is not limited to: support of concept development, testing, integration and verification activities, and coordination between design, software, and systems requirements teams. What You will Do: Generate specification changes that reflect the new and obsolescence development programs related to radar upgrades and maintenance Collaborate with Software and Systems Test teams and the USG customer on radar capabilities driven by new hardware and algorithm development Provide technical oversight for the execution of Radar Systems Requirement Development Collaborate with the Systems Engineering Lead and Chief Engineers to ensure that the Hardware, Software, and System Requirements are all being met in a consistent manner Support Independent Research and Development and other sources of internal funding for future Radar capability upgrades and innovations Support internal and external Program and Gate Reviews including Systems Requirements Reviews, Preliminary Design Reviews, Critical Design Reviews, and Test Readiness Reviews. Support the Independent Reviews (IRs) that precede each gate. Qualifications You Must Have:: Typically requires a Bachelor's in Science, Technology, Engineering, or Mathematics (STEM preferred) and a minimum of 2 years of prior engineering experience or equivalent experience. Ability to obtain and maintain U.S. government issued security clearance is required. U.S. citizenship is required, as only U.S. citizens are eligible for the required security clearance. Experience with tactical air defense systems, product line development processes, and software development Experience interfacing with external customers Experience across the product development life cycle Qualifications We Prefer: Existing DoD Secret Clearance Radar Knowledge Experience making challenging technical decisions and setting priorities Experience designing, implementing and testing radar waveforms and signal processing algorithms Familiarity with Raytheon Integrated Product Development System (IPDS) and gating processes Ability to travel domestically and internationally What We Offer: Our values drive our actions, behaviors, and performance with a vision for a safer, more connected world. At RTX we value: Safety, Trust, Respect, Accountability, Collaboration, and Innovation. Learn More & Apply Now! Please consider the following role type definition as you apply for this role. Onsite: Employees who are working in Onsite roles will work primarily onsite. As part of our commitment to maintaining a secure hiring process, candidates may be asked to attend select steps of the interview process in-person at one of our office locations, regardless of whether the role is designated as on-site, hybrid or remote. The salary range for this role is 66,000 USD - 130,000 USD. The salary range provided is a good faith estimate representative of all experience levels. RTX considers several factors when extending an offer, including but not limited to, the role, function and associated responsibilities, a candidate's work experience, location, education/training, and key skills.Hired applicants may be eligible for benefits, including but not limited to, medical, dental, vision, life insurance, short-term disability, long-term disability, 401(k) match, flexible spending accounts, flexible work schedules, employee assistance program, Employee Scholar Program, parental leave, paid time off, and holidays. Specific benefits are dependent upon the specific business unit as well as whether or not the position is covered by a collective-bargaining agreement.Hired applicants may be eligible for annual short-term and/or long-term incentive compensation programs depending on the level of the position and whether or not it is covered by a collective-bargaining agreement. Payments under these annual programs are not guaranteed and are dependent upon a variety of factors including, but not limited to, individual performance, business unit performance, and/or the company's performance.This role is a U.S.-based role. If the successful candidate resides in a U.S. territory, the appropriate pay structure and benefits will apply.RTX anticipates the application window closing approximately 40 days from the date the notice was posted. However, factors such as candidate flow and business necessity may require RTX to shorten or extend the application window. RTX is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability or veteran status, or any other applicable state or federal protected class. RTX provides affirmative action in employment for qualified Individuals with a Disability and Protected Veterans in compliance with Section 503 of the Rehabilitation Act and the Vietnam Era Veterans' Readjustment Assistance Act. Privacy Policy and Terms: Click on this link to read the Policy and Terms
$60k-76k yearly est. 1d ago
Design Verification Engineer
Analog Devices, Inc. 4.6
Senior verification engineer job in Wilmington, MA
About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at ************** and on LinkedIn and Twitter (X). Design Verification Engineer About the Role As a Design Verification Engineer at Analog Devices, you will develop test benches and perform design verification of new digital, analog, and mixed-signal products prior to tape-out. You'll create advanced environments that support comprehensive, metric-driven verification processes and ensure the accuracy and reliability of designs through code coverage analysis. Working with moderate supervision, you'll collaborate with cross-functional teams to meet project timelines and quality standards, applying your technical expertise to solve verification challenges. Key Responsibilities * Develop and execute comprehensive test benches for mixed-signal product verification using SystemVerilog and UVM methodologies * Create and maintain verification plans, focusing on functional and code coverage metrics to ensure design quality * Perform black box testing for complex designs to identify potential issues early in the verification cycle * Debug verification issues using advanced troubleshooting techniques and provide effective solutions * Collaborate with design teams to align verification strategies with project requirements * Create and maintain detailed documentation for verification processes and results * Participate in design reviews and provide verification insights to improve overall product quality * Apply scripting skills to automate verification tasks and improve efficiency Must Have Skills * SystemVerilog and UVM: Proficiency in developing and maintaining verification environments using SystemVerilog and Universal Verification Methodology for complex designs * Test Bench Development: Ability to develop comprehensive test benches for mixed-signal product verification, focusing on coverage-driven methodologies * Scripting: Capability to create and implement automation scripts using Python, Perl, or TCL to enhance verification workflows * Verilog RTL: Strong understanding of Register Transfer Level design concepts and their application in verification * EDA Tools: Experience with electronic design automation tools and simulators for effective design verification * Debugging: Demonstrated ability to analyze and resolve moderately complex verification issues with limited supervision * Communication Protocols: Working knowledge of standard interfaces such as I2C, SPI, and UART, and their verification requirements Preferred Education and Experience * Bachelor's or Master's degree in Electrical Engineering, Electronics and Communications Engineering, Computer Engineering, or related field * 0-2 years of relevant experience in digital design verification Why You'll Love Working HereAt Analog Devices, you'll be part of a collaborative and innovative team that's shaping the future of technology. We offer a supportive environment focused on professional growth, competitive compensation and benefits, work-life balance, and the opportunity to work on cutting-edge projects that make a real impact on the world. You'll have access to continuous learning opportunities and mentorship from industry experts. Join us and help create the technologies that bridge the physical and digital worlds, making a tangible difference in how people live, work, and connect. For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position - except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) - may have to go through an export licensing review process. Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group. Job Req Type: Required Travel: Shift Type:
$84k-109k yearly est. Auto-Apply 60d+ ago
Design Verification Engineer
Apple Inc. 4.8
Senior verification engineer job in Waltham, MA
Does making the next great technology product excite you? Imagine what you could do here. At Apple, our new ideas have a way of becoming great products, services, and customer experiences very quickly. We bring passion and dedication to our job and when you are a part of that team there's no telling what you could accomplish. Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple's premier SOCs. This is a critical job within Apple's Hardware Technology and we'd love to have you join us As part of a very dedicated team you will be at the heart of the chip design effort collaborating with all teams (vertical product model). You own ensuring the quality of the SOC or an IP or subsystem. This requires you to review design and architecture specifications and work closely with design u0026 micro-architecture teams. A key component to the job is understanding the functional u0026 performance goals of the design and you use this knowledge to test effectively. You develop test plans, tests u0026 coverage plans as well as define our next generation verification methodology u0026 testbenches. You will actively communicate and collaborate with design, architecture and software to understand the use cases and corner conditions and drive test cases. We also require additional responsibilities such as running and triaging regressions, tracking bugs, and analyzing coverage to achieve top results. Knowledge of computer architecture and digital design fundamentals Knowledge of Verilog or SystemVerilog, digital simulation and debug Experience with Python, Perl, or similar scripting language Ability to work independently to deliver the project goals Experience with C/C++, assembly is a plus. Excellent interpersonal skills and the dream to take on diverse challenges Minimum of BS + 0 years relevant industry experience.
$121k-161k yearly est. 40d ago
SOC Core Data Path Design Verification Engineer
Advanced Micro Devices, Inc. 4.9
Senior verification engineer job in Boxborough, MA
WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: As a SOC Core Data Path Design Verification Engineer on AMD's Strategic Silicon Solutions (S3) team, you will plan, create, and execute tests, testbenches, and verification environments to integrate IP blocks into complex SOC projects. You will help create custom advanced SOCs for external customers such as Sony (PlayStation 5), Microsoft (Xbox Series X), and Valve (Steam Deck) along with customers outside the game console space. You will collaborate closely with architects, design engineers, and software teams to ensure design functionality, performance, and quality for cutting-edge SOC products. THE PERSON: You are passionate about modern processor architecture, digital design, and SOC-level verification. You thrive in complex technical environments, are eager to understand legacy processes to improve them, and excel at problem-solving. You communicate effectively across global teams and are motivated to learn and innovate continuously. KEY RESPONSIBILITIES: * Collaborate with architects, hardware engineers, and others to understand the new features to be verified * Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases * Estimate the time required to write the new feature tests and any required changes to the test environment * Build the directed and random verification tests * Debug test failures to determine the root cause; work with RTL engineers to resolve design defects and correct any test issues * Review functional and code coverage metrics - modify or add tests or constrain random tests to meet the coverage requirements PREFERRED EXPERIENCE: * Strong background in SOC and IP-level ASIC verification. * Proficient in debugging RTL using industry-standard simulation tools. * Hands-on experience with UVM-based testbenches in both Linux and Windows environments. * Skilled in Verilog, SystemVerilog. * Experience developing and maintaining UVM verification frameworks, test environments, and automation flows. * Knowledge of distributed compute environments, workflow automation, and regression management. * Familiarity with simulation profiling, acceleration, or HLS tools/processes. * Strong C++ programming skills, especially on Linux; Windows exposure is a plus. * Working knowledge of SystemC and TLM methodologies. * Scripting experience in Perl, Ruby, Makefile, or shell. * Leadership or mentorship experience is considered an asset. ACADEMIC CREDENTIALS: * Bachelor's or Master's degree in Computer Engineering, Electrical Engineering, or a related discipline. LOCATION: * Boxborough, MA This role is not eligible for Visa Sponsorship. #LI-IA1 #LI-Hybrid Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.
$95k-122k yearly est. 45d ago
Design Verification Engineer II
HPR 3.8
Senior verification engineer job in Needham, MA
HPR is a leading provider of high-performance and ultra-low latency electronic trading and capital markets infrastructure solutions offered as a managed service. Our cutting-edge technology is used by tier-1 financial institutions to monitor and execute trades rapidly and efficiently. As we continue to innovate and grow, we're searching for a forward-thinking Design Verification Engineer II to help us build the future of capital markets infrastructure. As an Design Verification Engineer II at HPR, you will: Verify and maintain high-performance FPGA compute and networking systems used in electronic trading Contribute to the verification process from specification, test planning, and testbench development through execution and coverage closure Partner with design engineers to review and execute comprehensive test plans Create and maintain reusable verification components and testbenches written in SystemVerilog Help improve our verification processes, tools, and methodologies Required Qualifications BS/MS in Computer Engineering, Electrical Engineering, Computer Science, or related 2+ years of experience in design verification for FPGAs or ASICs Working knowledge of SystemVerilog for verification Comfortable working in a Linux environment Strong problem solving, debugging, and communication skills Desired Qualifications Exposure to constrained-random verification techniques and functional coverage Experience with industry-standard simulation and debugging tools (e.g., VCS, Verdi) Familiarity with computer architecture and digital design concepts Knowledge of networking protocols (IP, TCP, UDP) Some knowledge of C programming and scripting in Python and/or Perl Compensation: In compliance with Massachusetts law, the anticipated annual base salary range for this position is $129,000 to $166,000. Please note that this range represents the expected base salary for this role at the time of posting. The final offer may vary based on factors such as the candidate's experience, skills, and qualifications. This range does not include other forms of compensation such as potential bonuses, equity, or benefits. This position requires being on-site at our office in Needham, MA full-time (5 days per week) HPR does not currently provide employment sponsorship
$129k-166k yearly Auto-Apply 52d ago
SoC/ASIC Design Verification Engineer
Zerorisc
Senior verification engineer job in Boston, MA
zero RISC zero RISC is redefining chip security and supply chain integrity by empowering device owners and operators in crucial sectors like silicon production, IoT, and critical infrastructure with full device ownership, control, and visibility. Led by the founders of the OpenTitan secure silicon project, zero RISC is driving commercial adoption of high assurance software and services rooted in open silicon. Our products forge an immutable connection between hardware and software, enabling users to trust their devices no matter where they're built or where they're deployed. Role Overview As a zero RISC SoC/ASIC Design Verification Engineer, you will develop, verify, and maintain silicon in security-sensitive settings, including root-of-trust technology. You will elevate and solidify zero RISC's status as the leading provider of secure silicon IP by developing essential verification collateral. You will interact directly with zero RISC customers to understand their requirements and deliver solutions benefitting both customer and zero RISC alike. You will participate in the whole chip design process from architecture to tapeout and silicon validation. By engaging with the world's premier open-source silicon community, you will support our mission of open secure silicon everywhere. We're looking for engineers with strong design verification skills (and a long view of secure system architecture) who are also fast, flexible learners and enthusiastic about open source.Key Responsibilities: Verify ASIC/SoC functionality, performance, security, and power throughout the full chip design life cycle, from test plan definition to sign-off Build high quality verification environments at the chip/top and block levels following engineering best practices Write thorough verification documentation including test plans Diagnose, debug, and resolve regression failures and other errors Achieve coverage closure Ensure design functionality while upholding stringent timelines in collaboration with architecture, design, software, system, and silicon validation teams as well as engineering program managers What We're Looking For: Bachelor's degree in Electrical Engineering or Computer Science, or a related technical field or equivalent experience 4 years of experience with simulation-based verification methodologies and languages such as UVM and SystemVerilog or formal verification-based techniques including industry standard tools Experience developing and maintaining testbenches, test cases, and verification environments for simulation-based verification or formal verification environments Preferred Qualifications (not required): Master's or PhD in Electrical Engineering or Computer Science, or a related technical field or equivalent experience Knowledge of security ASICs or accelerators (e.g. cryptography accelerators or GPUs) Knowledge of computer architecture and memory subsystem architectures Experience verifying low power designs Experience with scripting languages such as Python Why Join Us? Your work will directly contribute to the development of cutting-edge security solutions, protecting critical systems in industrial and IoT environments As a seed-stage startup, this role offers significant opportunities for learning and career growth Join a close-knit, innovative team where you can learn, grow, and contribute to building something meaningful in the security space
$94k-125k yearly est. Auto-Apply 18d ago
Design Verification Staff Engineer
Marvell Technology
Senior verification engineer job in Westborough, MA
About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Custom Compute & Storage (CCS) Business Unit, is one of Marvell's fastest growing business units. In CCS, we focus on helping our customers with their custom designs for cloud-based AI applications as well as customers in the enterprise and carrier markets.Custom Compute & Storage (CCS) Business Unit, is one of Marvell's fastest growing business units. In CCS, we focus on helping our customers with their custom designs for cloud-based AI applications as well as customers in the enterprise and carrier markets. What You Can Expect . Develop and execute verification plans for ethernet or memory subsystems/ Create and maintain testbenches and test cases. Perform functional and performance verification. Debug and resolve design and verification issues. Collaborate with design and architecture teams to ensure verification coverage. Other Skills: Excellent problem-solving and analytical skills. Strong communication and teamwork abilities. Develop and execute verification test plans. Create and maintain testbenches and test cases. Perform functional and performance verification. Debug and resolve design and verification issues. Collaborate with design and architecture teams to ensure verification coverage. Other Skills: Excellent problem-solving and analytical skills. Strong communication and teamwork abilities. What We're Looking For . Bachelor's degree in Computer Science, Electrical Engineering, or related fields and 3+ years of related professional experience. Master's degree and/or PhD in Computer Science, Electrical Engineering or related fields with 2+years of experience. Proficiency in SystemVerilog and UVM (Universal Verification Methodology). Experience with simulation tools (e.g., VCS). Knowledge of scripting languages (Python, Perl, TCL). Knowledge in one of the following areas preferred PCIe, Ethernet. UEC, or DDR. Expected Base Pay Range (USD) 118,500 - 175,380, $ per annum The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions. Additional Compensation and Benefit Elements At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at *****************. Interview Integrity As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews. Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process. This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-SA1
$94k-125k yearly est. Auto-Apply 60d+ ago
Design Verification Engineer
Marvell
Senior verification engineer job in Westborough, MA
Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Infrastructure Processor Business Unit, a part of Networking and Processor Business Group, encompasses OCTEON and the award-winning OCTEON Fusion-M product families. The SoC family of multi-core CPU processors and Radio Access SoCs offer best-in-class performance, low power, rich software ecosystem, virtualization features, and open source application support with highly optimized custom ARM CPU cores providing an excellent solution for a highly flexible end-to-end optimized 5G platform. As part of the Infrastructure Processor unit at Marvell, you will verify all of the circuitry that goes inside our chips for the general market and for specific customers. These chips use cutting-edge technology to facilitate data transfers at high speeds, and you will help verify that each design meets our customers' specifications whether they're a major telecom organization or automotive company, etc. What You Can Expect In this role, the successful candidate will: * Develop the architecture for a functional verification environment, including reference models and bus-functional monitors and drivers. * Write a verification test plan using random techniques and coverage analysis, and work with designers to ensure it is complete. * Develop tests and tune the environment to achieve coverage goals. * Debug failures and work with designers to resolve issues. Other Skills: * Diligent, detail-oriented, and willing to take initiative and handle assignments with minimal supervision. * Requires the ability to accept and work with differing opinions * Must be able to learn on the fly and work in a fast-paced environment. What We're Looking For Candidate should possess: * Proficiency using C/C++ * Experience with Verilog and SystemVerilog, preferably with UVM. * Experience with writing a detailed test plan and building a sophisticated, directed, random-verification environment. * Experience with scripting language such as Python or Perl and EDA Verification tools. * A good understanding of Linux OS. Education: BS or MS is Computer Engineering, Electrical Engineering, or Computer Science with 3+ years of verification and firmware and software development experience. Expected Base Pay Range (USD) 118,500 - 175,380, $ per annum The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions. Additional Compensation and Benefit Elements At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at *****************. Interview Integrity As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews. Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process. This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-SA1
$94k-125k yearly est. Auto-Apply 60d+ ago
Senior Embedded Engineer
Whoop 4.0
Senior verification engineer job in Boston, MA
At WHOOP, we're on a mission to unlock human performance. WHOOP empowers members to perform at a higher level through a deeper understanding of their bodies and daily lives. WHOOP is seeking a Senior Embedded Engineer to drive the development and optimization of the hardware systems behind our cutting-edge wearable technology. As a critical member of this team, you will drive the design, development, and optimization of embedded systems that power WHOOP's devices, ensuring they meet the high standards of reliability and performance our members expect. Your expertise will directly impact WHOOP's ability to innovate and deliver transformative experiences. RESPONSIBILITIES: * Develop and optimize hardware systems for low-power, resource-constrained embedded environments, ensuring efficient and reliable device performance. Collaborate with cross-functional teams to define hardware requirements and support the integration of sensors, communication modules, and power management systems. Design, prototype, and test hardware components to ensure quality, scalability, and functionality align with product goals. Debug and resolve complex issues across the hardware stack, leveraging advanced diagnostic tools and methodologies. Support the selection and validation of electronic components, ensuring reliability and performance in real-world conditions. Contribute to the development and optimization of communication interfaces such as I2C, SPI, UART, and BLE for seamless connectivity. Conduct hardware performance analysis and testing to meet stringent power and reliability requirements for wearable devices. Collaborate with manufacturing teams to ensure robust design-for-manufacturing (DFM) and design-for-test (DFT) processes. QUALIFICATIONS: * Bachelor's degree in Computer Engineering, Electrical Engineering, or a related field; * Master's degree preferred. * Significant experience in embedded hardware development, with a proven track record of delivering high-quality hardware for commercial products. Mastery of programming languages like Python, and familiarity with C, C++ or other scripting languages. Experience working with microcontrollers, RTOS, and peripheral interfaces such as I2C, SPI, UART, and BLE. Understanding of low-power design and optimization techniques for battery-powered devices. Strong debugging skills with tools such as oscilloscopes, logic analyzers, and similar equipment. Strong problem-solving skills and a passion for developing innovative solutions in the wearable or IoT space. Effective communication skills to collaborate across technical and non-technical teams.Strong commitment to embracing and leveraging AI tools in day-to-day tasks, ensuring AI-assisted work aligns with the same high-quality standards as personal contributions. Interested in the role, but don't meet every qualification? We encourage you to still apply! At WHOOP, we believe there is much more to a candidate than what is written on paper, and we value character as much as experience. As we continue to build a diverse and inclusive environment, we encourage anyone who is interested in this role to apply. WHOOP is an Equal Opportunity Employer and participates in E-verify to determine employment eligibility. It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability. The WHOOP compensation philosophy is designed to attract, motivate, and retain exceptional talent by offering competitive base salaries, meaningful equity, and consistent pay practices that reflect our mission and core values. At WHOOP, we view total compensation as the combination of base salary, equity, and benefits, with equity serving as a key differentiator that aligns our employees with the long-term success of the company and allows every member of our corporate team to own part of WHOOP and share in the company's long-term growth and success. The U.S. base salary range for this full-time position is $150,000 - $215,000. Salary ranges are determined by role, level, and location. Within each range, individual pay is based on factors such as job-related skills, experience, performance, and relevant education or training. In addition to the base salary, the successful candidate will also receive benefits and a generous equity package. These ranges may be modified in the future to reflect evolving market conditions and organizational needs. While most offers will typically fall toward the starting point of the range, total compensation will depend on the candidate's specific qualifications, expertise, and alignment with the role's requirements.
$150k-215k yearly 5d ago

Learn more about senior verification engineer jobs

How much does a senior verification engineer earn in Quincy, MA?

The average senior verification engineer in Quincy, MA earns between $85,000 and $146,000 annually. This compares to the national average senior verification engineer range of $94,000 to $171,000.

Average senior verification engineer salary in Quincy, MA

$111,000

$85,00010%

$111,000Median

$146,00090%

What are the biggest employers of Senior Verification Engineers in Quincy, MA?

The biggest employers of Senior Verification Engineers in Quincy, MA are:

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Senior Verification Engineer Quincy, MA Jobs

Senior verification engineer jobs in Quincy, MA

Systems Engineer II

Senior Analog Design Verification Engineer

Design Verification Engineer

Design Verification Engineer

Senior Design Verification Engineer

Senior FPGA Design Verification Engineer

SoC/ASIC Design Verification Engineer

Senior Embedded Engineer

Design Verification Staff Engineer

Senior Design Verification Engineer

ASIC Design/Verification Engineer

Systems Engineer II

Design Verification Engineer

Design Verification Engineer

SOC Core Data Path Design Verification Engineer

Design Verification Engineer II

SoC/ASIC Design Verification Engineer

Design Verification Staff Engineer

Design Verification Engineer

Senior Embedded Engineer

Learn more about senior verification engineer jobs

How much does a senior verification engineer earn in Quincy, MA?

What are the biggest employers of Senior Verification Engineers in Quincy, MA?