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Computer aided design designer jobs in Mountain View, CA - 1,008 jobs
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Principal Product Designer - Design Systems
Expedia, Inc.
Computer aided design designer job in San Francisco, CA
Expedia Group brands power global travel for everyone, everywhere. We design cutting‑edge tech to make travel smoother and more memorable, and we create groundbreaking solutions for our partners. Our diverse, vibrant, and welcoming community is essential in driving our success. Why Join Us? To shape the future of travel, people must come first. Guided by our Values and Leadership Agreements, we foster an open culture where everyone belongs, differences are celebrated and we know that when one of us wins, we all win. We provide a full benefits package, including exciting travel perks, generous time‑off, parental leave, a flexible work model (with some pretty cool offices), and career development resources, all to fuel our employees' passion for travel and ensure a rewarding career journey. We're building a more open world. Join us. The Product Team creates high‑quality end‑to‑end experiences for travelers, partners, and Expedia Group. Our customer‑first mindset focuses on developing products that encourage loyalty and repeat business from our travelers and partners. We partner closely with teams across Expedia Group to achieve growth and results for our customers and company. Team Description This role is responsible for advancing the craft and adoption of Expedia's design system, ensuring that our products are consistent, accessible, and globally scalable. You will contribute thought leadership, deliver high‑quality design solutions, and serve as a trusted partner to design, engineering, and brand teams. Working closely with system leadership, you will help bring the strategy to life by translating vision into practice, raising design standards, and mentoring others in how to design with systems at scale. You will be a hands‑on builder of the foundational components and guidelines that power our digital experiences, while also influencing adoption across the organization. Your work will directly impact traveler trust, satisfaction, and loyalty by ensuring Expedia's experiences feel cohesive, inclusive, and designed with care. In this role, you will: Design the next generation of Expedia's multi‑brand design system, creating a shared set of elements that are highly brand flexible. Contribute to the evolution of Expedia's design system by creating components, tokens, and patterns that scale across brands and platforms. Collaborate with engineering partners to deliver reliable libraries, tooling, and documentation. Ensure the system reflects accessibility, inclusivity, and localization standards, supporting diverse travelers across the globe. Champion design craft and quality by raising the bar for both visual and interaction design standards. Partner with product, engineering, brand, and marketing teams to encourage adoption and alignment. Mentor designers and advocate for systems thinking across the design organization. Translate system strategy into actionable, usable solutions that empower teams and accelerate delivery. Minimum Qualifications Bachelor's degree or higher in a related field (Design, Human‑Computer Interaction, User Experience or similar) or equivalent relevant experience. Relevant academic qualifications that help grow the team's knowledge or expertise are welcomed but not required. 12+ years of experience in product, visual, or systems design, with a portfolio that shows impact at scale. Deep expertise in design systems and cross‑platform frameworks, with hands‑on experience creating and evolving component libraries. Strong craft in visual and interaction design, with the ability to balance brand expression and usability. Experience collaborating with engineering to deliver production‑ready components and documentation. Figma expertise is preferred. Ability to influence adoption and drive consistency in a large, matrixed organization. Excellent communication and storytelling skills, with the ability to bring clarity and inspire confidence. A systems thinker who thrives in complexity but delivers solutions that are clear, usable, and scalable. Preferred Qualifications Craft Expert: Elevates design quality through detail, polish, and systems excellence. Collaborative Partner: Works seamlessly across design, engineering, product, and brand functions. Adoption Advocate: Champions the system's value and helps teams integrate it into their workflows. Mentor and Influencer: Inspires designers through coaching and thought leadership. Execution‑Oriented: Brings clarity, speed, and precision to system delivery. Culture Builder: Embodies Expedia Group's values and fosters a sense of purpose in systems work. Expedia Group is proud to offer a wide range of benefits to support employees and their families, including medical/dental/vision, paid time off, and an Employee Assistance Program. To fuel each employee's passion for travel, we offer a wellness & travel reimbursement, travel discounts, and an International Airlines Travel Agent (IATAN) membership. View our full list of benefits. The total cash range for this position varies by location. In Virtual (Los Angeles, CA) the range is $224,000 - $313,500 with potential to increase up to $358,000 based on performance. In San Francisco the range is $242,000 - $338,500 with potential to increase up to $387,000. In New York the range is $242,000 - $338,500 with potential to increase up to $387,000. Starting pay for this role will vary based on multiple factors, including location, available budget, and an individual's knowledge, skills, and experience. Pay ranges may be modified in the future. Accommodation requests If you need assistance with any part of the application or recruiting process due to a disability, or other physical or mental health conditions, please reach out to our Recruiting Accommodations Team through the Accommodation Request. We are proud to be named as a Best Place to Work on Glassdoor in 2024 and be recognized for award‑winning culture by organizations like Forbes, TIME, Disability:IN, and others. Expedia Group's family of brands includes: Brand Expedia, Hotels.com, Expedia Partner Solutions, Vrbo, trivago, Orbitz, Travelocity, Hotwire, Wotif, ebookers, CheapTickets, Expedia Media Solutions, Expedia Local Expert, CarRentals.com, and Expedia Cruises. Expedia is committed to creating an inclusive work environment with a diverse workforce. All qualified applicants will receive consideration for employment without regard to race, color, religion, gender, gender identity or expression, sexual orientation, national origin, genetics, disability, age, or veteran status. This employer participates in E‑Verify. The employer will provide the Social Security Administration (SSA) and, if necessary, the Department of Homeland Security (DHS) with information from each new employee's I‑9 to confirm work authorization. #J-18808-Ljbffr$242k-338.5k yearly 3d agoPrincipal Product Designer: AI Platform & UX Leader
King River Capital Group
Computer aided design designer job in San Francisco, CA
A leading technology firm in San Francisco seeks a Principal Product Designer to redefine user interactions with AI in the property management sector. You will lead user experience initiatives, collaborate closely with executive teams, and innovate interaction patterns while nurturing a user-centric design culture. Ideal candidates have over 10 years of experience in high-growth settings, keen insights into human psychology, and a passion for autonomous systems. This demanding role offers an opportunity to shape industry evolution while enjoying competitive benefits. #J-18808-Ljbffr$101k-159k yearly est. 2d agoProduct Design Engineer
Mission Resourcing LLC
Computer aided design designer job in Oakland, CA
Vision Affordable, natural, factory-built homes. We've embarked on a homebuilding renaissance where affordability,sustainability, and beauty come together. Out beyond ideas of right angles and hard lines, there's a bioceramic dome. The Geodesic Dome, introduced by the Visionary Architect Buckminster Fuller, is the world's most efficient structure. But to manufacture domes, we needed a material science breakthrough. Enter bioceramics a new class of earth-friendly materials that mimic human bone. Bioceramic domes maximize efficiency at the most fundamental levels - geometry, materials, and manufacturing method. In the future, we won't live in boxes. Join us there! Project After successfully achieving factory-built housing certification from the State of California and breaking ground on our flagship Amma dome build, we are hiring key team members to help us complete the design of the Amma product. We have a strong preference for team members to locate full-time onsite in Grass Valley, California, although hybrid/remote arrangements are possible for standout candidates. Role Geoship is seeking a Product Design Engineer to advance and finalize the design of our first Amma dome system. This role is for a first-principles problem solver and a multidisciplinary engineer who thrives in ambiguity and rapid iteration. You will integrate structural, mechanical, materials, and relevant building and safety standards into elegant, manufacturable solutions that bring a new form of sustainable housing into reality. You will work closely with studio designers, materials scientists, manufacturing engineers, and operations teams to develop bioceramic molded parts, connection systems, structural components, interior systems, and other assemblies that seamlessly integrate into the finished dome. Your work will span concept development, detailed design, prototyping, design-for-manufacturing, analysis, testing, documentation, supplier engagement, and hands-on support during prototype builds. This is a rare opportunity to build a new housing technology from the ground up. If you think beyond conventional solutions, care deeply about regenerative design, and want to help shape the future of homes, we'd love to meet you! Description ● Product & Component Design: Own the design of bioceramic components, connection systems, and mechanical assemblies from initial concept through release-applying first-principles reasoning, strong engineering fundamentals, and comprehensive system-level design that includes performing energy and load calculations, flow and pressure analysis, and MEP equipment selection; developing schematics, layouts, and installation instructions for HVAC ducting, piping, and related infrastructure; and ensuring compliance with all relevant building codes and industry standards. ● Design for Manufacturing: Ensure designs are compatible with casting, mixing, material-handling, and assembly processes; create clear specifications, tolerances, and performance requirements to enable high-quality, repeatable, scalable production ● Prototyping & Testing: Build and test prototypes, develop test rigs when needed, and conduct design analyses, validate mechanical behavior and assembly methods, and iterate rapidly based on real-world results ● Compliance & Standards Integration: Ensure mechanical designs align with relevant structural, safety, and building standards, translating regulatory and performance requirements into clear engineering specifications. ● Cross-Functional Collaboration: Partner with studio design, engineering, materials, and operations teams to develop system architectures, resolve tradeoffs, and support prototype and pilot builds ● Documentation & Communication: Produce clear CAD models, drawings, BOMs, specifications, DFMEAs, test summaries, and design justifications; present design options and tradeoffs to facilitate alignment and decision-making Qualifications ● Bachelor's degree in Mechanical Engineering, or related field ● 3 ~ 7+ years of professional experience in mechanical/product design, preferably involving large complex assemblies ● Strong analytical and problem-solving skills, with a proven ability to identify and implement effective solutions using first principles, modeling, and hands-on experimentations ● Strong CAD proficiency (SolidWorks, Fusion, Onshape, or similar) ● Demonstrated ability to take hardware products from concept through prototyping and into production ● Experience with tolerance stacks, design-for-manufacturing, and geometric dimensioning & tolerancing (GD&T) ● Ability to thrive in a fast-paced startup environment-proactive, self-directed, resourceful ● Strong communication skills and ability to collaborate effectively across disciplines Desired Experience ● Takes ownership and responsibility for current and past results ● Takes risks, learns from mistakes, and drives to improve the performance of oneself, others, and the company ● Experience working with cast or molded materials, especially ceramics and composites ● Familiarity with structural analysis techniques and tools (FEA and hand calcs) ● Experience designing components for modular building systems, architectural hardware, or complex mechanical assemblies ● Hands-on prototyping experience: machining, molding, 3D printing, fabrication, or test rig development Benefits ● Base pay between $125,000 and $170,000, based on experience and qualifications ● Comprehensive healthcare coverage ● Stock options ● Health savings account ● 401k ● Opportunity to join a conscious, future-building team$125k-170k yearly 5d agoSoC Physical Design Engineer, PnR
Apple Inc.
Computer aided design designer job in Sunnyvale, CA
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hardworking people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product! In this visible role, you will be directly responsible for the physical implementation of design partition(s) (from netlist to tapeout) for a highly complex SOC utilizing innovative process technology. Description Work with the logic design team to understand partition architecture and drive physical aspects early in the design cycle. Complete netlist to GDS2 implementation for partition(s) meeting schedule and design goals. Timing, physical and electrical verification, and driving the signoff closure for the partitions. Resolve and improve design and flow issues related to physical design, identify potential solutions, and drive execution. Minimum Qualifications Minimum BS and 3+ years of relevant industry experience. Experience with partition level P&R implementation including floorplanning, clock and power distribution, timing closure, physical and electrical verification. Experience with physical design construction and analysis flows and methodology. Preferred Qualifications Ability to adhere to stringent schedule and die size requirements. Experience with large SOC designs (>20M gates) with frequencies in excess of 1GHZ. Experience with sub 10nm tech nodes. Experience with industry standard tools, understanding their capabilities and underlying algorithms. Compensation & Benefits At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role between $147,400 and $272,100, and your base pay will depend on your skills, qualifications, experience, and location. Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program. Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant. #J-18808-Ljbffr$147.4k-272.1k yearly 2d agoPhysical Design Engineer - New College Grad 2026
Nvidia Corporation
Computer aided design designer job in Santa Clara, CA
Physical Design Engineer - New College Grad 2026 page is loaded## Physical Design Engineer - New College Grad 2026locations: US, CA, Santa Claratime type: Full timeposted on: Posted Todayjob requisition id: JR2009983We are now looking for a Physical Design Engineer!NVIDIA has continuously pioneered and reinvented itself over two decades through various avenues of computing: Graphics, High Performance Computing, Artificial Intelligence, Research, and more. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to tackle, that only we can solve, and that matter to the world. This is our life's work, to amplify human creativity, intelligence, and technology. Today, visual computing is becoming increasingly central to how people interact with technology, and there has never been a more exciting time to join our team. We are looking for a Physical Design Engineer who will be responsible for all aspects of physical design and implementation of Graphics processors, integrated chipsets, and other ASICs targeted at the desktop, laptop, workstation, set-top box and home networking markets.**What you will be doing:*** As a member of the team, you will participate in the efforts in establishing CAD and physical design methodologies (flow and tools development) as well as implementation.* Your day to day will include developing chip floor plan, power/clock distribution, chip assembly and P&R, timing closure, power and noise analysis and back-end verification across multiple projects.* This position requires you to work with EDA vendor (Synopsys, Cadence, Mentor, etc.) tool suites such as: ICC2,PrimeTime, dc\_shell, Innovus, SeaHawk.* You will interact with a diverse team engineers.**What we need to see:*** Completing an BSEE, MSEE or PhD (or equivalent experience).* Deep understanding of VLSI and Physical Design related basics & concepts.* Possess a deep understanding of static timing analysis, clock/power distribution and analysis, RC extraction and correlation, place and route, circuit design and analysis.* Experience in scripting and programming using several of the following languages/tools: Perl, C, C++, TCL, Scheme, Skill, or Make.* Previous internship or project experience in physical design implementation With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world's most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our best-in-class engineering teams are rapidly growing. If you're a creative and autonomous engineer with a passion for technology, we want to hear from you!Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 96,000 USD - 161,000 USD for Level 1, and 108,000 USD - 184,000 USD for Level 2.You will also be eligible for equity and .Applications for this job will be accepted at least until December 19, 2025.NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. #J-18808-Ljbffr$132k-175k yearly est. 2d agoHigh-Speed Mixed-Signal IC Design Engineer
Advanced Micro Devices
Computer aided design designer job in San Jose, CA
A leading technology company in San Jose is seeking an experienced engineer to join their analog/mixed signal IP design team. This role involves designing next generation I/O interfaces, with a strong emphasis on mixed signal design and leading technical projects. The ideal candidate will possess a degree in Electrical Engineering and have hands-on experience with high speed designs and communication tools. This position offers competitive benefits and is not eligible for visa sponsorship. #J-18808-Ljbffr$118k-155k yearly est. 2d agoMechanical Design Engineer
Droyd
Computer aided design designer job in San Francisco, CA
About the team Droyd builds autonomous robotic systems that automate repetitive manual work in real environments. Our robots operate in production settings, which means mechanical design has to be robust, manufacturable, and tightly integrated with electronics and control systems. Our mechanical team designs the structures, linkages, and assemblies that make the robots real. This work moves fast and lives on the shop floor as much as it does in CAD. About the role As a Mechanical Design Engineer at Droyd, you'll own mechanical subsystems from first sketch through working prototype. You'll design, build, break, and iterate on real hardware. This is a hands‑on role. You'll spend time in CAD, but also at the printer, in the shop, and on the robot. You'll work closely with electrical, software, and robotics teams to bring systems together. This role is based in Burlingame, CA. We're an in‑person company. We build faster that way. In this role, you'll Own mechanical subsystem design from concept to prototype and iteration Design parts and assemblies in CAD, supported by hand calculations and FEA when needed Design for rapid prototyping methods including 3D printing and CNC machining Make decisions on materials, tolerances, and manufacturing methods Integrate mechanical designs with motors, sensors, electronics, and actuators Build prototypes yourself using 3D printers, shop tools, and CNC equipment Work closely with manufacturing to turn designs into physical hardware quickly We're looking for someone who Has a strong portfolio showing complete systems taken from concept to physical prototype Has experience on hands‑on engineering teams such as Formula SAE, aerospace clubs, or robotics teams Has internship or early‑career experience on real hardware projects or at hardware startups Is proficient with modern CAD tools (Onshape preferred, but not required) Understands manufacturing methods, tolerancing, and assembly workflows Is comfortable with hands‑on fabrication and rapid iteration Nice to have Experience with FEA, topology optimization, or generative design Exposure to electronics, controls, or mechatronic systems Interest in industrial or visual design alongside functional engineering About Droyd Droyd builds autonomous robotic systems to automate manual work for enterprises. We design the hardware, write the control stack, and deploy robots that operate in real environments. If we do this right, robots stop being prototypes and start being infrastructure. Join us and help build hardware that ships. #J-18808-Ljbffr$92k-123k yearly est. 1d agoDesign Engineer
Allstem Connections
Computer aided design designer job in San Jose, CA
The Plumbing Designer will be responsible for executing and leading the full plumbing design projects. You will draw new designs and update our current designs. During the creation process, you will ensure that our designs meeting all necessary design responsibilities. Responsibilities Draw, update, and maintain (layouts, risers, details, system narratives). Strong understanding of plumbing system design, codes, constructability and coordination Manage multiple complex projects at the same time Support estimating efforts using industry estimating software (quality takeoffs, scope development, ROM pricing, design-build budgeting) Ensure that all design projects are completed within budget and time Qualifications Bachelor's Degree or equivalent experience in Mechanical Engineering or relevant technical degree AutoCAD, Revit (BIM experience a plus)$90k-127k yearly est. 3d agoPhysical Design Engineer at Apple Cupertino, CA
Itlearn360
Computer aided design designer job in Cupertino, CA
Physical Design Engineer Job at Apple, Cupertino, CAJob Description Physical Design Engineer Department: Hardware Imagine what you can do here. Apple is a place where extraordinary people gather to do their best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do. Description Apple Inc. has the following available in Cupertino, California, and various unanticipated locations throughout the USA. Responsible for physical design and implementation of partitions. Build partition architecture and drive physical aspects early in the design cycle. Physically implement design partitions (from netlist to tape-out) for a highly complex System-on-Chip (SoC) utilizing state-of-the-art process technology. Work on partition-level place and route (P&R) implementation, including floor planning, clock and power distribution, timing closure, physical and electrical verification. Complete netlist to GDSII implementation for partitions meeting schedule and design goals. Oversee timing, physical, and electrical verification, and drive the signoff closure for the partitions. Resolve design and flow issues related to physical design, identify potential solutions, and drive execution. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. The base pay range for this role is between $151,091 - $214,500/year, depending on skills, qualifications, experience, and location. PAY & BENEFITS: Apple employees have the opportunity to participate in Apple's stock programs, receive benefits including medical and dental coverage, retirement benefits, discounts, free services, educational reimbursement, and potential bonuses or relocation assistance. Learn more about Apple Benefits. Minimum Qualifications Master's degree or foreign equivalent in Electrical Engineering or related field. 2 years of relevant experience. 1 year of experience with each of the following: Encounter Design System tool, QRC, Calibre, Voltus, Primetime. Preferred Qualifications N/A Apple is an equal opportunity employer committed to inclusion and diversity. We promote equal opportunity for all applicants regardless of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or other protected characteristics. Note: Apple benefits, compensation, and employee stock programs are subject to eligibility and other terms. This job posting appears to be active and does not indicate it is expired. #J-18808-Ljbffr$151.1k-214.5k yearly 2d agoPhysical Design Engineer
Theconstructsim
Computer aided design designer job in Milpitas, CA
Pre-layout STA to ascertain feasibility, timing constraint validation and feedback to customers and design teams Chip/Block Level Floorplanning and pin assignment Review top-level/block-level clock specifications for completeness and feasibility Handle all the Physical design tasks (Placement, Timing Optimization, Clock Tree Synthesis, Routing) Perform sign-off tasks (RC Extraction, Static Timing Analysis, IR drop analysis and Physical Verification) Presentations and Customer Interaction in customer meetings Necessary Qualifications: BSEE, with 9+ years of experience or equivalent experience. MSEE preferred. Experience in ASIC Physical Design; Experience in an SoC product development organization with tapeouts at 28nm/16nm design nodes. Hands-on Experience with implementation EDA tools like ICC2/Innovus. Scripting (Perl/Tcl/Python) is required. Good understanding of ASIC frontend design. Experience in both Flat and Hierarchical layouts. Strong problem‑solving skills and ability to analyze and resolve physical design issues related to library, timing constraints or CAD tools is required. Experience with power analysis and IR‑drop tools (primepower/Redhawk) and Static Timing Analysis (Primetime). Experience with Physical Verification and fix PV errors in layout. Expert handling of Verilog HDL based Netlists, Physical design libraries. Team player with good interpersonal and communication skills; ability to explain processes and answer customer questions during meetings. Compensation: $190,000.00 - $200,000.00 per year MAKING THE INDUSTRY'S BEST MATCHES DBSI Services is widely recognized as one of the industry's fastest growing staffing agencies. Thanks to our longstanding experience in various industries, we have the capacity to build meaningful, long‑lasting relationships with all our clients. Our success is a result of our commitment to the best people, the best solutions and the best results. Our Story: Founded in 1995 Privately Owned Corporation Managing Partner Business Model Headquartered in New Jersey US Based Engineers Only Methodology and Process Driven Top performing engineers are the foundation of our business. Our priority is building strong relationships with each employment candidate we work with. You can trust our professional recruiters to invest the time required to fully understand your skills, explore your professional goals and help you find the right career opportunities. #J-18808-Ljbffr$190k-200k yearly 3d agoPhysical Design Engineer
Altera
Computer aided design designer job in San Jose, CA
Altera .# **Job Details:**### ## **Job Description:****About the Role:**As a Physical Design Engineer at Altera, you will play a critical role in the backend implementation flow - from RTL/netlist through GDSII/tape-out for FPGA/SoC devices. You will collaborate with architecture, logic design, DFT, CAD/EDA, and manufacturing teams to achieve performance, power, and area (PPA) goals, with a particular emphasis on programmable logic structures, block and full-chip integration, and the unique demands of FPGA technologies (e.g., configurable logic blocks, routing fabrics, I/O rings, on-chip power domains).**Key Responsibilities:*** Execute physical design implementation tasks (floorplanning, power planning, placement, clock tree synthesis (CTS), routing, engineering change orders (ECO), extraction, sign-off preparation) from netlist to GDSII.* Apply PPA optimization techniques (performance/timing closure, power reduction, area efficiency) across block-level and full-chip hierarchies.* Collaborate with front-end design, architecture, and CAD/EDA tool teams to ensure physical design constraints, timing budgets, power budgets, and DFT insertions are met.* Develop and enhance physical design flows, methodologies, scripts, and automation frameworks (TCL, Python, Perl) to accelerate turnaround, improve QoR, and reduce manual intervention.* Participate in timing, power, EM/IR integrity, signal/power noise, and DRC/LVS/ERC verification for sign-off readiness.* Integrate FPGA-specific physical design aspects: configurable logic block placement, fabric routing, I/O ring optimization, power domains for programmable regulation, and yield optimization.* Debug physical design issues and interact with CAD tool vendors and internal tool teams to drive tool enhancements or workarounds.**Salary Range**The pay range below is for Bay Area California only. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance.**$127,400 - $184,400 USD**We use artificial intelligence to screen, assess, or select applicants for the position.### ## **Qualifications:****Minimum Qualifications:**Bachelor's degree in Electrical Engineering, Computer Engineering, or related field with 6+ years of experience in:* Hands-on digital/SoC physical design (synthesis through P&R and sign-off).* Industry-standard EDA tools (e.g., Synopsys IC Compiler/Fusion, Cadence Innovus/Encounter, PrimeTime, STAR-RCX, Calibre) for high-speed digital ASIC/SoC implementation.* Scripting/programming (TCL, Python, Perl, shell) for flow automation and productivity enhancement.* Physical design flow: floorplanning, CTS, placement, routing, power domain gating, clock domain crossing, multi-power domain design, timing closure, ECOs, and DRC/LVS/DFM resolution.* Power/IR analysis, signal/power integrity reporting, and corrective action planning.* Interfacing with front-end teams (RTL, architecture), CAD/EDA tool teams, and manufacturing/packaging teams.**Preferred Qualifications:*** Experience with advanced process nodes (7nm, 5nm or smaller) or FPGA/programmable logic device flows.* Familiarity with FPGA architecture: routing fabrics, programmable logic blocks (PLBs), on-chip networks, I/O rings, static/dynamic reconfiguration.* Expertise in low-power design methodologies, power grid design, power gating, multi-voltage domain implementation, and power sign-off flows.* Prior exposure to full-chip integration flows (block-to-chip convergence) and high-frequency (1 GHz+) timing closure.* Experience in high-volume manufacturing environments, including yield and DFM/DFY considerations.* Experience mentoring or leading small physical design sub-teams or owning major P&R blocks.### ## **Job Type:**Regular### ## **Shift:**Shift 1 (United States of America)### ## **Primary Location:**San Jose, California, United States### ## **Additional Locations:**### ## **Posting Statement:**All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. #J-18808-Ljbffr$127.4k-184.4k yearly 5d agoPhysical Design Engineer
Etched.Ai, Inc.
Computer aided design designer job in San Jose, CA
About Etched Etched is building the world's first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history. Job Summary Etched is looking for exceptional PD engineers to join our team. The candidate will be responsible for working with 3rd party design services to implement and verify physical designs, and will help Etched as we work to improve iteration speed on physical design. Representative projects Supervise the outsourcing of physical design to a 3rd party service Deeply understand what is involved in physical design Running Physical Design flows to close blocks, support ASIC infrastructure, automate Physical Design flows, improve CAD infrastructure Drive dashboards that show the convergence of projects related to Physical Design Optimize tool flows, working with EDA vendors to incorporate the latest features Accountable for block level closure Requirements 2+ years of previous experience with PD Tools, flow, and design methodology from RTL synthesis to GDSII sign-off Experience with back-end design and timing closure on 3nm-7nm Experience with UPF-based low power design methodology, power verification, synthesis, scan insertion/ATPG, formal verification, floorplanning, placement, CTS, routing, IR drop, and EM/antenna analysis Deeply creative and able to think from first principles Desired qualifications: Familiarity with transformer models and machine learning. Familiarity with Cadence or Synopsys automated RTL-to-GDSII flows Ability to program with Python or another scripting language. We encourage you to apply even if you do not believe you meet every single qualification. Benefits: Full medical, dental, and vision packages, with generous premium coverage Housing subsidy of $2,000/month for those living within walking distance of the office Daily lunch and dinner in our office Relocation support for those moving to West San Jose Compensation Range $150,000 - $275,000 How we're different: Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs. We are a fully in-person team in West San Jose, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed. #J-18808-Ljbffr$90k-127k yearly est. 2d agoFounding Design Engineer - AI-Driven Finance UI Expert
Twenty Labs
Computer aided design designer job in San Mateo, CA
A leading technology company in San Mateo is seeking an exceptional founding design engineer to create intuitive product experiences. The role requires expertise in TypeScript and React, with responsibilities that include crafting polished user interfaces and translating advanced AI technologies into high-quality products. Candidates should have a strong design sensibility and experience shipping products used by millions. This opportunity offers competitive compensation and a dynamic work culture. #J-18808-Ljbffr$90k-127k yearly est. 5d agoPhysical Design Engineer
Openai
Computer aided design designer job in San Francisco, CA
About the Team OpenAI's Hardware team designs the custom silicon that powers the world's most advanced AI systems. From system‑level architecture to custom circuit implementations, we partner closely with model and infrastructure teams to deliver performance, power, and efficiency breakthroughs across all layers of the stack. About the Role We are seeking a highly skilled Silicon Implementation Engineer with deep expertise in physical design and methodology. This individual contributor role sits within our physical design team and is central to delivering power, performance, and area (PPA) optimized datapath and interconnect solutions for next‑generation AI accelerators. You'll work closely with RTL designers to define and execute on physical design strategies. You will develop tools, flows and methodologies to increase team productivity. Your work will directly impact silicon's performance and cost efficiency, as well as the team's execution velocity and quality. In this role, you will: Develop, build and own tools, flows and methodologies for physical implementation Own physical implementation of floorplan blocks from floorplanning to final signoff Collaborate with RTL designers to drive optimal block implementation solutions Analyze and optimize design for timing, power, and area trade‑offs, working in collaboration with EDA vendors and ASIC partners Qualifications: BS w/ 4+ or MS with 2+ years or PhD with 0-1 year(s) of relevant industry experience in physical design and methodology development Demonstrated success in taping out complex silicon designs Hands‑on experience with block physical implementation and PPA convergence Strong coding experience with python, bazel, TCL Strong experience building physical design tools, flows and methodologies Strong understanding of microarchitecture, RTL design, physical design, circuit design, physical verification and timing closure. Deep familiarity with industry‑standard tools and flows for physical synthesis, PNR, LEC and power estimation Bonus: Experience with AI or HPC‑focused chips Experience with optimizing PPA for high performance compute cores Hands‑on experience with top‑level design methodologies About OpenAI OpenAI is an AI research and deployment company dedicated to ensuring that general‑purpose artificial intelligence benefits all of humanity. We push the boundaries of the capabilities of AI systems and seek to safely deploy them to the world through our products. AI is an extremely powerful tool that must be created with safety and human needs at its core, and to achieve our mission, we must encompass and value the many different perspectives, voices, and experiences that form the full spectrum of humanity. We are an equal opportunity employer, and we do not discriminate on the basis of race, religion, color, national origin, sex, sexual orientation, age, veteran status, disability, genetic information, or other applicable legally protected characteristic. For additional information, please see OpenAI's affirmative Action and Equal Employment Opportunity Policy Statement Background checks for applicants will be administered in accordance with applicable law, and qualified applicants with arrest or conviction records will be considered for employment consistent with those laws, including the San Francisco Fair Chance Ordinance, the Los Angeles County Fair Chance Ordinance for Employers, and the California Fair Chance Act, for US‑based candidates. For unincorporated Los Angeles County workers: we reasonably believe that criminal history may have a direct, adverse and negative relationship with the following job duties, potentially resulting in the withdrawal of a conditional offer of employment: protect computer hardware entrusted to you from theft, loss or damage; return all computer hardware in your possession (including the data contained therein) upon termination of employment or end of assignment; and maintain the confidentiality of proprietary, confidential, and non‑public information. In addition, job duties require access to secure and protected information technology systems and related data security obligations. To notify OpenAI that you believe this job posting is non‑compliant, please submit a report through this form. No response will be provided to inquiries unrelated to job posting compliance. We are committed to providing reasonable accommodations to applicants with disabilities, and requests can be made via link. OpenAI Global Applicant Privacy Policy At OpenAI, we believe artificial intelligence has the potential to help people solve immense global challenges, and we want the upside of AI to be widely shared. Join us in shaping the future of technology. #J-18808-Ljbffr$96k-131k yearly est. 2d agoPhysical Design Engineer
Eridu Corporation
Computer aided design designer job in San Francisco, CA
Eridu AI isa Silicon Valley hardware startup focused on accelerating training and inference performance for large AI models. Today's AI model performance is often gated by infrastructure bottlenecks. Eridu AI introduces multiple industry-first innovations across semiconductors, software and systems to deliver solutions that improves AI data center performance to increase GPU utilization while simultaneously reducing capex and power. Eridu AI's solution and value proposition have been widely validated with several hyperscalers. The company is led by a veteran team of Silicon Valley executives and engineers with decades of experience in state-of-the‑art semiconductors, optics, software, and systems, including serial entrepreneur Drew Perkins, co-founder of Infinera (NASDAQ: INFN), Lightera (acq. by Ciena), Gainspeed (acq. by Nokia) and Mojo Vision (World's leading micro‑LED display company and developer of the first augmented reality contact lens) . Key Responsibilities: Define the Physical Assembly of SOC. involving all aspects of physical design functions such as P&R, timing, floorplan, clocking, electrical analysis, and power. Proficiency in Synthesis design constraints (SDC). Design and Architect Top Level and block Level Floor planning of the entire SoC. Sound Proficiency in either Innovus or Synopsys Fusion Compiler required. Proficiency in synthesis, Floor planning Power Planning and Timing closure are required. Prior experience with large skew optimized clock tree designs like H-Tree preferred. Clock Grid exposure is a plus. Work extensively with Micro-architects to perform feasibility studies and explore performance, power & area (PPA) tradeoffs for design closure. Develop physical design methodologies and customize recipes across various implementation steps to optimize PPA. Work with a multi-functional engineering team to implement and validate physical design by running all signoff flows such as Timing, Power, EM/IR, PDV. Qualifications Master's Degree or bachelor's degree in EE with a minimum of 10+ years of experience. Knowledge using synthesis, place & route, analysis and verification CAD tools. Familiarity with logic & physical design principles to drive low‑power & higher‑performance designs. Fluency in scripting in some of these languages: Unix, Perl, Python, and TCL. Good understanding of device physics and experience in deep sub‑micron technologies 7nm or below. Knowledge of Verilog and System Verilog. Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self‑motivated. Ability to work well in a team and be productive under aggressive schedules. Prior experience of multiple tape‑out in deep submicron 7nm or below is required. Why Join Us? At Eridu AI, you'll have the opportunity to shape the future of AI infrastructure, working with a world‑class team on groundbreaking technology that pushes the boundaries of AI performance. Your contributions will directly impact the next generation of AI networking solutions, transforming data center capabilities. The pay range for this role is: 210,000 - 270,000 USD per year (San Francisco Bay Area) #J-18808-Ljbffr$90k-127k yearly est. 4d agoPhysical Design Engineer
Recooty
Computer aided design designer job in San Francisco, CA
Synapse Design has an exciting opportunity for a Physical Design Engineer to help lead our growing Physical Design Engineering team. We are looking for an experienced engineer. Seniority Level - Mid-Senior level Industry - Semiconductors Employment Type - Full-time Responsibilities 5+ years of industry experience required Skill Set: BS or above in electrical engineering or computer engineering Experience with Hierarchical design is a plus Experience with ICC2 or Innovus Experience in taping out multiple technologies is a plus Expertise in floorplanning large blocks or chip Expertise in power grid design Expertise in clock design and CTS Expertise in low power flow (power gating, multi-Vt, voltage islands, dynamic voltage scaling, body biasing, etc) is a plus Hands-on experience with STA, DRC/LVS, LEC Experience in IR drop analysis is a plus Programming experience in Tcl, and Perl is a plus Involvement in flow development is a plus If you'd like to discuss this opportunity in greater detail, send me a contact phone number and time to reach you. Or feel free to contact me at *****************. #J-18808-Ljbffr$90k-127k yearly est. 2d agoPhysical Design Engineer
Apple Inc.
Computer aided design designer job in Sunnyvale, CA
At Apple we work every single day to craft products that enrich people's lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for a forward‑thinking and unusually hardworking Physical Design Engineer. As a member of our wide‑ranging group, you will have the rare and great opportunity to craft upcoming products that will delight and encourage millions of Apple's customers every single day. In this role, we will be at the center of a PHY design effort working with architecture, CAD, timing, and logic design teams, with a critical impact on delivering outstanding PHY designs. You will be required to do physical designs of outstanding PHY design. Description As a Physical Design engineer you will contribute to all phases of physical design of high performance PHY design from RTL to delivery of our final GDSII. Your responsibilities include but are not limited to: Generate block/chip level static timing constraints. Build full chip floor‑plan including pin placement, partitions and power grid. Develop and validate high performance low power clock network guidelines. Perform block level place and route and close the design to meet timing, area and power constraints. Generate and Implement ECOs to fix timing, noise and EM IR violations. Run Physical Design verification flow at chip/block level and provide guidelines to fix LVS/DRC violations to other designers. Participate in establishing CAD and physical design methodologies for correct by construction designs. Assist in flow development for chip integration. Minimum Qualifications Bachelors of Science in Electrical Engineering and 3+ years experience preferred. Preferred Qualifications The ideal candidate will have deep design experience in high PHY and/or SOC designs Deep Knowledge about industry standards and practices in Physical Design, including Physically aware synthesis, Floor‑planning, and Place & Route Experience in developing and implementing Power‑grid and Clock specifications Strong understanding of all aspects of Physical construction, Integration and Physical Verification Shown Knowledge of Basic SoC Architecture and HDL languages like Verilog to be able with logic design team for timing fixes Power user of industry standard Physical Design & Synthesis tools Deep Understanding of scripting languages such as Perl/Tcl, solid understanding of Extraction and STA methodology and tools Deep Understanding of Physical Design Verification methodology to debug LVS/DRC issues at chip/block level At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $147,400 and $272,100, and your base pay will depend on your skills, qualifications, experience, and location. Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program. Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant. #J-18808-Ljbffr$147.4k-272.1k yearly 1d agoHands-on Mechanical Design Engineer for Robotics Prototyping
Droyd
Computer aided design designer job in San Francisco, CA
A company specializing in robotic systems seeks a Mechanical Design Engineer to design and build mechanical subsystems from concept to prototype. This hands-on role involves using CAD, collaborating with electrical and software teams, and fabricating prototypes in a shop environment. Candidates should have a strong engineering portfolio and experience on hands-on engineering teams. The position is in California and requires in-person presence. #J-18808-Ljbffr$92k-123k yearly est. 1d agoAI Accelerator Silicon Design Engineer
Openai
Computer aided design designer job in San Francisco, CA
A leading AI research organization based in San Francisco is looking for a Silicon Implementation Engineer to develop and optimize physical design strategies for next-generation AI accelerators. The ideal candidate will collaborate with RTL designers and drive implementation solutions while ensuring power, performance, and area optimizations. This role requires strong expertise in physical design and methodology development, with a background in coding and tool creation. Experience with AI-focused chips is a plus. #J-18808-Ljbffr$96k-131k yearly est. 2d agoSoC Physical Design Engineer, PnR
Apple Inc.
Computer aided design designer job in San Jose, CA
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hardworking people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product! In this visible role, you will be directly responsible for the physical implementation of design partition(s) (from netlist to tapeout) for a highly complex SOC utilizing innovative process technology. Description In Physical Design, you will be at the center of design effort collaborating with architecture, CAD, timing and logic design teams, with a critical impact on delivering best in class designs and knowledge of basic chip architecture, back end chip design flow, physical synthesis, floor‑planning, place and route (PnR), power grid, timing (STA), physical design verification (DRC/LVS), EMIR (Redhawk/Totem/Voltus). Responsibilities would include: Working with the logic design team to understand partition architecture and drive physical aspects early in the design cycle. Completing netlist to GDS2 implementation for partition(s) meeting schedule and design goals. Timing, physical and electrical verification and driving the signoff closure for the partitions. Resolve and improve design and flow issues related to physical design, identify potential solutions, and drive execution. Minimum Qualifications Basic understanding of logic gates. Preferred Qualifications Previous internship/co‑op, project work or relevant coursework in computer architecture, VLSI, design, logic design, or circuit design. Strong teamwork skills with the ability to collaborate with multiple functional teams across a variety of fields. Experience with Verilog, VHDL, Python, Perl, TCL and/or SPICE. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $126,800 and $190,900, and your base pay will depend on your skills, qualifications, experience, and location. Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program. Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant. Apple accepts applications to this posting on an ongoing basis. #J-18808-Ljbffr$126.8k-190.9k yearly 2d ago
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How much does a computer aided design designer earn in Mountain View, CA?
The average computer aided design designer in Mountain View, CA earns between $51,000 and $147,000 annually. This compares to the national average computer aided design designer range of $40,000 to $89,000.
Average computer aided design designer salary in Mountain View, CA
$87,000
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