Mechanical design engineer jobs in Los Gatos, CA - 4,412 jobs

About the team Droyd builds autonomous robotic systems that automate repetitive manual work in real environments. Our robots operate in production settings, which means mechanical design has to be robust, manufacturable, and tightly integrated with electronics and control systems. Our mechanical team designs the structures, linkages, and assemblies that make the robots real. This work moves fast and lives on the shop floor as much as it does in CAD. About the role As a Mechanical Design Engineer at Droyd, you'll own mechanical subsystems from first sketch through working prototype. You'll design, build, break, and iterate on real hardware. This is a hands‑on role. You'll spend time in CAD, but also at the printer, in the shop, and on the robot. You'll work closely with electrical, software, and robotics teams to bring systems together. This role is based in Burlingame, CA. We're an in‑person company. We build faster that way. In this role, you'll Own mechanical subsystem design from concept to prototype and iteration Design parts and assemblies in CAD, supported by hand calculations and FEA when needed Design for rapid prototyping methods including 3D printing and CNC machining Make decisions on materials, tolerances, and manufacturing methods Integrate mechanical designs with motors, sensors, electronics, and actuators Build prototypes yourself using 3D printers, shop tools, and CNC equipment Work closely with manufacturing to turn designs into physical hardware quickly We're looking for someone who Has a strong portfolio showing complete systems taken from concept to physical prototype Has experience on hands‑on engineering teams such as Formula SAE, aerospace clubs, or robotics teams Has internship or early‑career experience on real hardware projects or at hardware startups Is proficient with modern CAD tools (Onshape preferred, but not required) Understands manufacturing methods, tolerancing, and assembly workflows Is comfortable with hands‑on fabrication and rapid iteration Nice to have Experience with FEA, topology optimization, or generative design Exposure to electronics, controls, or mechatronic systems Interest in industrial or visual design alongside functional engineering About Droyd Droyd builds autonomous robotic systems to automate manual work for enterprises. We design the hardware, write the control stack, and deploy robots that operate in real environments. If we do this right, robots stop being prototypes and start being infrastructure. Join us and help build hardware that ships. #J-18808-Ljbffr

At Apple, we believe our products begin with our people. By hiring a diverse team, we drive creative thought. By giving that team everything they need, we drive innovation. By hiring incredible engineers, we drive precision. And through our collaborative process, we build memorable experiences for our customers! These elements come together to make Apple an amazing environment for motivated people to do the greatest work of their lives. You will become part of a hands-on development team that sets the standard in cultivating excellence, creativity and innovation. Come help us design the next generation of revolutionary Apple products. We are looking for a forward-thinking and talented engineer. As a member of our team, you will have the opportunity to craft and implement methodologies with high impact on upcoming products that will delight millions of Apple's customers. In this role, you will be involved in our physical design machine learning efforts, collaborating with internal teams, and using your expertise to ensure that our SOCs achieve optimal Power, Performance, and Area (PPA). Description As part of the physical design machine learning architecture team, you will work on building efficient application processors for Apple products. Your experience in physical design and machine learning will help solve complex problems across RTL design, logic synthesis, floor planning, power/clock distribution, place and route, timing/noise analysis, power/thermal analysis, voltage drop analysis, and manufacturing/yield considerations. You will collaborate with design, power, post silicon, CAD, software, and machine learning teams in a dynamic environment. Minimum Qualifications Bachelor's degree and 3+ years of relevant industry experience. Understanding of optimization algorithms, data structures, and linear algebra. Knowledge of VLSI fundamentals, including physical design. Preferred Qualifications Experience with advanced machine learning algorithms like GNNs, VAEs, transformers, diffusion models, LLMs. Programming skills in Python and C/C++. Master's or PhD with relevant publications in Machine Learning or EDA algorithms. Strong communication and organizational skills. At Apple, compensation includes base pay within a range depending on skills and experience, along with stock programs, benefits, and educational reimbursement. The role may also be eligible for bonuses, commissions, or relocation support. Apple is an equal opportunity employer committed to diversity and inclusion. We promote equal opportunity regardless of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or other protected characteristics. #J-18808-Ljbffr

Physical Design Engineer - New College Grad 2026 page is loaded## Physical Design Engineer - New College Grad 2026locations: US, CA, Santa Claratime type: Full timeposted on: Posted Todayjob requisition id: JR2009983We are now looking for a Physical Design Engineer!NVIDIA has continuously pioneered and reinvented itself over two decades through various avenues of computing: Graphics, High Performance Computing, Artificial Intelligence, Research, and more. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to tackle, that only we can solve, and that matter to the world. This is our life's work, to amplify human creativity, intelligence, and technology. Today, visual computing is becoming increasingly central to how people interact with technology, and there has never been a more exciting time to join our team. We are looking for a Physical Design Engineer who will be responsible for all aspects of physical design and implementation of Graphics processors, integrated chipsets, and other ASICs targeted at the desktop, laptop, workstation, set-top box and home networking markets.**What you will be doing:*** As a member of the team, you will participate in the efforts in establishing CAD and physical design methodologies (flow and tools development) as well as implementation.* Your day to day will include developing chip floor plan, power/clock distribution, chip assembly and P&R, timing closure, power and noise analysis and back-end verification across multiple projects.* This position requires you to work with EDA vendor (Synopsys, Cadence, Mentor, etc.) tool suites such as: ICC2,PrimeTime, dc\_shell, Innovus, SeaHawk.* You will interact with a diverse team engineers.**What we need to see:*** Completing an BSEE, MSEE or PhD (or equivalent experience).* Deep understanding of VLSI and Physical Design related basics & concepts.* Possess a deep understanding of static timing analysis, clock/power distribution and analysis, RC extraction and correlation, place and route, circuit design and analysis.* Experience in scripting and programming using several of the following languages/tools: Perl, C, C++, TCL, Scheme, Skill, or Make.* Previous internship or project experience in physical design implementation With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world's most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our best-in-class engineering teams are rapidly growing. If you're a creative and autonomous engineer with a passion for technology, we want to hear from you!Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 96,000 USD - 161,000 USD for Level 1, and 108,000 USD - 184,000 USD for Level 2.You will also be eligible for equity and .Applications for this job will be accepted at least until December 19, 2025.NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. #J-18808-Ljbffr

Dive in and do the best work of your career at DigitalOcean. Journey alongside a strong community of top talent who are relentless in their drive to build the simplest scalable cloud. If you have a growth mindset, naturally like to think big and bold, and are energized by the fast-paced environment of a true industry disruptor, you'll find your place here. We value winning together-while learning, having fun, and making a profound difference for the dreamers and builders in the world. We're looking for a Senior Product Security Engineer who is passionate about partnering with engineers to assess the security risk of new products and features. As a member of the Secure Design team, you will report to the Senior Manager of Product Security. Our Secure Design team enables DigitalOcean to build secure‑by‑design products. We leverage strong relationships with both product teams and the rest of security engineering to be successful. Our scope is primarily focused on reviewing early‑stage decisions, helping develop threat models, scaling impact via automation, curating security patterns, authoring security guidance, training, and championing security initiatives. You will collaborate with other security teams and the rest of DigitalOcean to guide secure architecture design, reduce security risk in the organization, and empower engineers to make informed security decisions. Security at DO means solving incredibly complex problems at a high‑scale that have real impact for our customers, our products, and the larger internet community. What you'll do: Threat model application designs and solutions and provide security risk assessments (70%) Provide deep technical expertise in software and network architecture during holistic assessments of security layers across infrastructure, application, people, and process. Collaborate with product managers, designers, and engineers to threat model and architect secure and resilient systems. Identify the trade‑offs of different solutions and recommend the efficient design to achieve both functional goals and security requirements. Provide hands‑on remediation guidance to development teams. Cultivate and promote a security culture (20%) Champion an internal security culture (developer training, internal CTFs, etc.). Mentor software engineering teams in security best practices. Help DigitalOcean engineers understand how security events impact them. Do they need to worry about the next Log4j CVE? How does RetBleed impact DigitalOcean's fleet? Build security tooling and automations to help scale the Product Security team's practices (10%) Use software architecture and coding patterns to reduce the impact of security issues. Drive architecture, patterns, and processes across engineering that make security the easiest path. Integrate custom security tooling into engineering workflows. What you'll add to DigitalOcean: Required qualifications: Experience leading architectural changes or complex cross team efforts to mitigate security vulnerabilities. Ability to clearly communicate security topics and vulnerability classes (e.g. OWASP Top Ten) and ability to provide actionable direction to product teams. A record of partnering with internal engineering teams to tackle security problems across an entire stack with empathy and creativity. Engineering teams are our partners, not our adversaries. Working knowledge of modern development concepts (virtualized environments, containerization, continuous integration + delivery). Preferred qualifications: 3+ years experience guiding software teams on secure architecture design. Experience building or reviewing threat models and ability to craft malicious user, attacker, and abuse/misuse cases. Working knowledge of hardware and software supply chain security. Compensation Range: $161,000 - $220,000 *This is a remote role. Why You'll Like Working for DigitalOcean We innovate with purpose. You'll be a part of a cutting‑edge technology company with an upward trajectory, who are proud to simplify cloud and AI so builders can spend more time creating software that changes the world. As a member of the team, you will be a Shark who thinks big, bold, and scrappy, like an owner with a bias for action and a powerful sense of responsibility for customers, products, employees, and decisions. We prioritize career development. At DO, you'll do the best work of your career. You will work with some of the smartest and most interesting people in the industry. We are a high‑performance organization that will always challenge you to think big. Our organizational development team will provide you with resources to ensure you keep growing. We provide employees with reimbursement for relevant conferences, training, and education. All employees have access to LinkedIn Learning's 10,000+ courses to support their continued growth and development. We care about your well‑being. Regardless of your location, we will provide you with a competitive array of benefits to support you from our Employee Assistance Program to local Employee Meetups to flexible time off policy, to name a few. While the philosophy around our benefits is the same worldwide, specific benefits may vary based on local regulations and preferences. We reward our employees. The salary range for this position is based on market data, relevant years of experience, and skills. You may qualify for a bonus in addition to base salary; bonus amounts are determined based on company and individual performance. We also provide equity compensation to eligible employees, including equity grants upon hire and the option to participate in our Employee Stock Purchase Program. DigitalOcean is an equal‑opportunity employer. We do not discriminate on the basis of race, religion, color, ancestry, national origin, caste, sex, sexual orientation, gender, gender identity or expression, age, disability, medical condition, pregnancy, genetic makeup, marital status, or military service. #J-18808-Ljbffr

About Commonwealth Fusion Systems: Commonwealth Fusion Systems is on a mission to deliver the urgent transition to fusion energy. Combining decades of research, top talent, and new technologies, we're designing and building commercially viable fusion power plants. And working with policymakers and suppliers to build the energy industry of the future. We're in the best position to make it happen. Since 2018, we've raised nearly $3 billion in capital, making us the largest and leading private fusion company in the world. Now we're looking for more thinkers, doers, builders, and makers to join us. People who'll bring new perspectives, solve tough problems, and thrive as part of a team. If that's you and this role fits, we want to hear from you. Principal Mechanical Engineer We're looking for a Principal Mechanical Engineer to join our R&D and equipment design team to help build the next generation of thin‑film deposition technology. The Principal Mechanical Engineer will be responsible for the design and implementation of advanced R&D equipment and complex machinery. This role requires strong technical expertise, procedural discipline, and the ability to collaborate across engineering and technology functions to ensure safe, reliable, and high‑performance equipment. If you enjoy working on complex design problems, mentoring others, and solving problems in a collaborative, fast‑paced environment, this is your opportunity to make an impact. What you'll do: Lead the design and implementation of advanced R&D equipment for thin‑film processing, including ownership of key mechanical modules and sub‑systems Define system level requirements and drive innovative design concepts to meet these requirements Lead design reviews for overall mechanical system and key mechanical subsystems Generate and maintain interfaces with other engineering subsystems Report on and be accountable for project progress to stakeholders Work effectively within a multi‑disciplinary team of top scientists and engineers Mentor engineering staff for effectiveness and delivery of on‑time & in‑spec outcomes Get things done: drive projects, consistently deliver, act with speed What we're looking for: Master's degree in Mechanical Engineering or related field (or equivalent industrial experience) 15+ years of experience with at least 7 years of experience working as a principal mechanical design engineer or engineering team lead in a relevant context: design and implementation of R&D systems and manufacturing equipment Ability to conceive of novel solutions for complex engineering systems in challenging environments Expertise with 3D modeling; preferred experience with SolidWorks and NX Experience with COMSOL, ANSYS or other FEA tools Ability to select and qualify vendors for components or subsystems Demonstrated ability to lead in either direct or matrix structures Strong verbal and written communication skills and a dedication to high‑quality documentation Bonus points for: Ph.D. in Mechanical Engineering or related field (or equivalent industrial experience) Prior success building first‑of‑kind or experimental tools for material science or semiconductor R&D Familiarity in applying Semi‑S8, ASME, ACI, ASTM, and other mechanical standards to design solutions Experience with the operation of equipment in a manufacturing environment Must‑have Requirements: Ability to occasionally lift up to 50 lbs Perform activities such as stooping, climbing, standing, or sitting for extended periods of time Dedication to safety to mitigate industrial hazards that may include heat, cold, noise, fumes, strong magnets, lead (Pb), high voltage, and cryogenics Willingness to travel or work required nights/weekends/on‑call occasionally $150,000 - $225,000 a year Benefits Competitive compensation with equity 12.5 Company‑wide Holidays Flexible vacation days 10 sick days Generous parental leave policy Health, dental, and vision insurance 401(k) with employer matching Professional growth opportunities Team‑building activities #LI‑Onsite At CFS, we excel in fast‑paced environments, driven by our values of integrity, execution, impact, and self‑critique. As we grow, we're eager to bring on mission‑driven folks who offer diverse perspectives and fresh ways to tackle challenges. We value diversity deeply and are proud to be an equal opportunity employer by choice. We consider all qualified applicants equally, regardless of race, color, national origin, ancestry, citizenship status, protected veteran status, religion, physical or mental disability, marital status, sex, sexual orientation, gender identity or expression, age, or any other basis protected by law. This role requires compliance with U.S. laws concerning the export of controlled or protected technologies or information (collectively, “Export Control Laws #J-18808-Ljbffr

Mill is all about answering a simple question: how can we prevent waste? Less waste can save time, money, energy, maybe even our planet. And there's no better place to start than food. Food waste is one of the most solvable climate problems facing us today. Plus, our trash really stinks. It's gross, heavy, and our least favorite chore. At Mill we are striving to build a better environment for all, as we take on climate and kitchen change. As a member of Mill's Product Design Engineering team you will be part of a cross functional team to design, validate and ship Mill's hardware products. You will work closely with other members of the PD team as well as cross functional groups including Industrial Design, Electrical Engineering, Reliability, Product Management and Operations. Objectives of this role: Design mechanical systems to balance complex tradeoffs between cross functional teams including Industrial Design, Electrical Engineering, Reliability, Product Management and Operations Generate detailed CAD models, specifications and documentation Prototype, Test and Analyze component and system designs Validate and system performance and iterate designs to achieve targets Create predictive models and correlate with real world performance Perform root cause analysis of performance failures and drive corrective actions Work directly with the supply chain to ensure parts are properly manufactured and assembled. Qualifications BS degree in mechanical engineering or equivalent 2 + years experience working in mechanical product design. Consumer Electronics or Home Appliance industries are preferred Expertise in CAD modeling, experience with NX is preferred. Detailed knowledge of plastic and metal part manufacturing processes Solid understanding of product design concepts including Design for Manufacturing (DFM), Design for Assembly (DFA), Tolerance Analysis Demonstrated ability to apply engineering fundamentals to find simple solutions to complex problems A strong desire to work hands-on Strong communication skills The estimated base salary range for this position is $150k to $175k, which does not include the value of benefits or a potential equity grant. A wide range of factors are considered in making compensation decisions, including but not limited to skill sets, market conditions, experience and training, licensure and certifications, and business and organizational needs. #J-18808-Ljbffr

A tech startup focused on CAD intelligence is seeking a talented individual to own the creation and refinement of computational geometry features using Python and C++. You'll collaborate closely with engineers and gain insights from customers to shape the product roadmap. The role offers a generous equity package, opportunities for growth, and relocation assistance to San Francisco. Excellent communication skills and experience with reinforcement learning algorithms are required. #J-18808-Ljbffr

Altera .# **Job Details:**### ## **Job Description:****About the Role:**As a Physical Design Engineer at Altera, you will play a critical role in the backend implementation flow - from RTL/netlist through GDSII/tape-out for FPGA/SoC devices. You will collaborate with architecture, logic design, DFT, CAD/EDA, and manufacturing teams to achieve performance, power, and area (PPA) goals, with a particular emphasis on programmable logic structures, block and full-chip integration, and the unique demands of FPGA technologies (e.g., configurable logic blocks, routing fabrics, I/O rings, on-chip power domains).**Key Responsibilities:*** Execute physical design implementation tasks (floorplanning, power planning, placement, clock tree synthesis (CTS), routing, engineering change orders (ECO), extraction, sign-off preparation) from netlist to GDSII.* Apply PPA optimization techniques (performance/timing closure, power reduction, area efficiency) across block-level and full-chip hierarchies.* Collaborate with front-end design, architecture, and CAD/EDA tool teams to ensure physical design constraints, timing budgets, power budgets, and DFT insertions are met.* Develop and enhance physical design flows, methodologies, scripts, and automation frameworks (TCL, Python, Perl) to accelerate turnaround, improve QoR, and reduce manual intervention.* Participate in timing, power, EM/IR integrity, signal/power noise, and DRC/LVS/ERC verification for sign-off readiness.* Integrate FPGA-specific physical design aspects: configurable logic block placement, fabric routing, I/O ring optimization, power domains for programmable regulation, and yield optimization.* Debug physical design issues and interact with CAD tool vendors and internal tool teams to drive tool enhancements or workarounds.**Salary Range**The pay range below is for Bay Area California only. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance.**$127,400 - $184,400 USD**We use artificial intelligence to screen, assess, or select applicants for the position.### ## **Qualifications:****Minimum Qualifications:**Bachelor's degree in Electrical Engineering, Computer Engineering, or related field with 6+ years of experience in:* Hands-on digital/SoC physical design (synthesis through P&R and sign-off).* Industry-standard EDA tools (e.g., Synopsys IC Compiler/Fusion, Cadence Innovus/Encounter, PrimeTime, STAR-RCX, Calibre) for high-speed digital ASIC/SoC implementation.* Scripting/programming (TCL, Python, Perl, shell) for flow automation and productivity enhancement.* Physical design flow: floorplanning, CTS, placement, routing, power domain gating, clock domain crossing, multi-power domain design, timing closure, ECOs, and DRC/LVS/DFM resolution.* Power/IR analysis, signal/power integrity reporting, and corrective action planning.* Interfacing with front-end teams (RTL, architecture), CAD/EDA tool teams, and manufacturing/packaging teams.**Preferred Qualifications:*** Experience with advanced process nodes (7nm, 5nm or smaller) or FPGA/programmable logic device flows.* Familiarity with FPGA architecture: routing fabrics, programmable logic blocks (PLBs), on-chip networks, I/O rings, static/dynamic reconfiguration.* Expertise in low-power design methodologies, power grid design, power gating, multi-voltage domain implementation, and power sign-off flows.* Prior exposure to full-chip integration flows (block-to-chip convergence) and high-frequency (1 GHz+) timing closure.* Experience in high-volume manufacturing environments, including yield and DFM/DFY considerations.* Experience mentoring or leading small physical design sub-teams or owning major P&R blocks.### ## **Job Type:**Regular### ## **Shift:**Shift 1 (United States of America)### ## **Primary Location:**San Jose, California, United States### ## **Additional Locations:**### ## **Posting Statement:**All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. #J-18808-Ljbffr

A leading tech company in San Francisco is looking for an experienced engineer to develop foundational HTTP proxies for third-party model providers. You will be responsible for designing and building high-performance solutions while ensuring robustness and scalability. The ideal candidate has over 3 years of experience in building HTTP services with Python. This role offers a competitive salary up to $200,000, including equity and comprehensive benefits. #J-18808-Ljbffr

About the Team OpenAI's Hardware team designs the custom silicon that powers the world's most advanced AI systems. From system‑level architecture to custom circuit implementations, we partner closely with model and infrastructure teams to deliver performance, power, and efficiency breakthroughs across all layers of the stack. About the Role We are seeking a highly skilled Silicon Implementation Engineer with deep expertise in physical design and methodology. This individual contributor role sits within our physical design team and is central to delivering power, performance, and area (PPA) optimized datapath and interconnect solutions for next‑generation AI accelerators. You'll work closely with RTL designers to define and execute on physical design strategies. You will develop tools, flows and methodologies to increase team productivity. Your work will directly impact silicon's performance and cost efficiency, as well as the team's execution velocity and quality. In this role, you will: Develop, build and own tools, flows and methodologies for physical implementation Own physical implementation of floorplan blocks from floorplanning to final signoff Collaborate with RTL designers to drive optimal block implementation solutions Analyze and optimize design for timing, power, and area trade‑offs, working in collaboration with EDA vendors and ASIC partners Qualifications: BS w/ 4+ or MS with 2+ years or PhD with 0-1 year(s) of relevant industry experience in physical design and methodology development Demonstrated success in taping out complex silicon designs Hands‑on experience with block physical implementation and PPA convergence Strong coding experience with python, bazel, TCL Strong experience building physical design tools, flows and methodologies Strong understanding of microarchitecture, RTL design, physical design, circuit design, physical verification and timing closure. Deep familiarity with industry‑standard tools and flows for physical synthesis, PNR, LEC and power estimation Bonus: Experience with AI or HPC‑focused chips Experience with optimizing PPA for high performance compute cores Hands‑on experience with top‑level design methodologies About OpenAI OpenAI is an AI research and deployment company dedicated to ensuring that general‑purpose artificial intelligence benefits all of humanity. We push the boundaries of the capabilities of AI systems and seek to safely deploy them to the world through our products. AI is an extremely powerful tool that must be created with safety and human needs at its core, and to achieve our mission, we must encompass and value the many different perspectives, voices, and experiences that form the full spectrum of humanity. We are an equal opportunity employer, and we do not discriminate on the basis of race, religion, color, national origin, sex, sexual orientation, age, veteran status, disability, genetic information, or other applicable legally protected characteristic. For additional information, please see OpenAI's affirmative Action and Equal Employment Opportunity Policy Statement Background checks for applicants will be administered in accordance with applicable law, and qualified applicants with arrest or conviction records will be considered for employment consistent with those laws, including the San Francisco Fair Chance Ordinance, the Los Angeles County Fair Chance Ordinance for Employers, and the California Fair Chance Act, for US‑based candidates. For unincorporated Los Angeles County workers: we reasonably believe that criminal history may have a direct, adverse and negative relationship with the following job duties, potentially resulting in the withdrawal of a conditional offer of employment: protect computer hardware entrusted to you from theft, loss or damage; return all computer hardware in your possession (including the data contained therein) upon termination of employment or end of assignment; and maintain the confidentiality of proprietary, confidential, and non‑public information. In addition, job duties require access to secure and protected information technology systems and related data security obligations. To notify OpenAI that you believe this job posting is non‑compliant, please submit a report through this form. No response will be provided to inquiries unrelated to job posting compliance. We are committed to providing reasonable accommodations to applicants with disabilities, and requests can be made via link. OpenAI Global Applicant Privacy Policy At OpenAI, we believe artificial intelligence has the potential to help people solve immense global challenges, and we want the upside of AI to be widely shared. Join us in shaping the future of technology. #J-18808-Ljbffr

A cutting-edge AI lab in San Francisco is seeking experienced end-to-end engineers to join their small, talent-dense team. The role involves building innovative software products, enhancing user experiences, and collaborating closely with product teams. Ideal candidates should have experience with Python, Typescript, and React. Strong achievers who thrive in fast-moving environments are encouraged to apply. #J-18808-Ljbffr

A leading technology company in San Francisco is seeking a professional to develop AI/ML solutions. You will work closely with various teams to implement and optimize applications based on large language models. The ideal candidate has a Bachelor's or Master's degree in a relevant field and a strong understanding of machine learning algorithms. Join us to contribute to innovative projects and collaborate in a dynamic environment. #J-18808-Ljbffr

A leading electrical contractor in San Francisco is seeking a Project Engineer to support field and project management teams. The ideal candidate will coordinate material deliveries, manage logs, and communicate effectively. Growth opportunities in project management are available, with a competitive compensation package. The role requires a high school diploma, and a bachelor's degree is preferred. Join a dynamic team and contribute to impactful projects! #J-18808-Ljbffr

A company specializing in robotic systems seeks a Mechanical Design Engineer to design and build mechanical subsystems from concept to prototype. This hands-on role involves using CAD, collaborating with electrical and software teams, and fabricating prototypes in a shop environment. Candidates should have a strong engineering portfolio and experience on hands-on engineering teams. The position is in California and requires in-person presence. #J-18808-Ljbffr

A leading cloud infrastructure provider is seeking a Senior Product Security Engineer in San Francisco, CA. In this role, you will assess security risks for new products and features, collaborate with engineering teams, and champion a security culture. The ideal candidate will possess expertise in secure architecture design and a passion for mentoring. This remote role offers a competitive salary, ranging from $161,000 to $220,000, along with benefits and growth opportunities. #J-18808-Ljbffr

An AI-native engineering firm in San Francisco seeks a talented mechanical engineer to lead the design and commissioning of mechanical systems across various industrial applications. The role involves using innovative AI-powered engineering tools and working closely with cross-functional teams to create efficient solutions. Ideal candidates will have foundational knowledge in mechanical engineering, hands-on experience with fluid systems or HVAC, and excellent collaboration skills. This is an opportunity to be part of an engineering-led team driving impactful projects. #J-18808-Ljbffr

A leading fusion energy company in Milpitas is seeking a Principal Mechanical Engineer to join their R&D team focused on advanced thin-film deposition technology. Responsibilities include designing R&D equipment, leading complex projects, and mentoring engineering staff. The ideal candidate will have a Master's in Mechanical Engineering, over 15 years of experience in mechanical design, and familiarity with tools such as SolidWorks and ANSYS. Competitive salary and benefits are offered, including 12.5 holidays and flexible vacation days. #J-18808-Ljbffr

An innovative company is seeking a talented software engineer to join their dynamic Inference team. This role involves designing and implementing infrastructure for large-scale multimodal models, focusing on high-performance delivery of audio and image inputs. You'll collaborate closely with researchers and product teams to push the boundaries of AI technology, ensuring reliable production services. If you thrive in fast-paced environments and enjoy tackling complex challenges, this opportunity offers a chance to make a significant impact in the AI landscape. #J-18808-Ljbffr

A leading technology firm in San Francisco is looking for an innovative engineer to develop generative AI applications. This role requires a PhD in a relevant field and backend development experience, preferably in Go or Python. You will work with cutting-edge technologies and collaborate with world-class teams to create and implement AI solutions. Cisco offers a competitive salary and a collaborative work environment that fosters growth and innovation. #J-18808-Ljbffr