Design Engineer Internship jobs at Cadence Design Systems

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Are you looking to re-enter the workforce as a Physical Design Application Engineer after taking a career break for caregiving? Who is eligible to apply: Please ONLY consider applying if you are a Physical Designer and (IMPORTANT) who has been out of the workforce for caregiving for a period of at least two years and have a minimum of three years of Physical Design work experience. This role is not open to new college grads or interns. Please check our career site for those roles. Cadence is offering an opportunity to qualified candidates who meet our eligibility criteria to participate in a 16-week paid returnship program. You will be entered in a tailored program designed to jump start your skills through training, hands on projects and customer interaction. You will have an opportunity to update your resume, build connections and participate in fun events as you re-enter the workforce. In this program, you will work with best in class EDA tools, collaborate with R&D and the Sales team in a dynamic, innovative environment. Learn processes that are in the forefront of technology, how a company like Cadence works as well as experience how teams solve problems. We are seeking individuals with experience in Digital Synthesis, Place and Route and Signoff Analysis. Where is this returnship located: San Jose, CA What opportunity is offered: Candidates will find opportunities to be in the Application Engineering field spanning across Digital Synthesis, Place and Route and Signoff Analysis. How long is this returnship: 16 weeks Company Description: At Cadence, our core values are more than just words, they are the way we work, laugh, debate, care, question, and innovate together. We are One Cadence-One Team. Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation (EDA) company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Our team's shared passion for solving the world's toughest technical challenges and drive to do meaningful work makes us proud to be part of Cadence. Our unique culture has been recognized on FORTUNE Magazine's 100 Best Companies to Work For list and garnered accolades from the Great Place To Work Institute around the globe. #LI-MA1 The annual salary range for California is $59,500 to $110,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more. We're doing work that matters. Help us solve what others can't.

What you do at AMD changes everything We care deeply about transforming lives with AMD technology to enrich our industry, our communities and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence, while being direct, humble, collaborative and inclusive of diverse perspectives. This is who we are at our best. One Company. One Team. AMD together we advance_ The System Validation team plays a key role in validation of complex SOCs in pre-silicon and post silicon. Our most recent project Versal ACAP, a fully software-programmable, heterogeneous compute platform that combines Scalar Engines, Adaptable Engines, and Intelligent Engines to achieve dramatic performance improvements with dual core ARM processing system and Programmable logic is known for Industry's first Heterogeneous architecture. We are looking for a passionate engineer to work with us on our latest SOC - Versal. We are looking for an aspiring Systems Design Engineer with a strong background in software to join the System-level Test team in San Jose. As a System Validation Engineering Intern, you will be involved in the silicon life cycle from testing of emulated next-generation RTL through to silicon verification and characterization. You will have a view of the full system but also will become an expert in certain IP down to the register-level. We are looking for someone who can span the range of able to develop device drivers in software to debug on hardware. As an intern on our team, you will gain real engineering experience in working with complex SOC and validation software and make a difference to the quality of our products. Responsibilities Assist in bringing up system level validation tool on new silicon Run regressions and experiments to help root cause issues Enhance existing test software for system-level validation and verification of existing and new FPGA features. Design, develop, implement, test, and verify systems based on FPGAs with embedded Micro Blaze or ARM processors Help to develop novel methods for system-level modeling and verification Help automate design, test, and build processes Qualificiations Must be a student enrolled in a bachelor's or master's degree program in Electrical / Computer Engineering with an emphasis on embedded system development and/or computer architecture Computer Architecture class(es) required Programming languages: C, Python, Verilog To support our group, we are looking for a intern that can commit to a full time (40 hr per week), 4-12-month internship starting in January 2023. You must be able to work onsite at are San Jose, CA Office. Located at 2100 Logic Dr, San Jose, CA 95124 Shorter internships will NOT be considered. Requisition Number: 185604 Country: United States State: California City: San Jose Job Function: Student/ Intern/ Temp Benefits offered are described here. AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: As a member of the Graphics and Engineering group, you will help bring to life cutting-edge designs related to Artificial Intelligent/ High Performance Computing SOCs . As a member of the Physical design and SOC teams, you will work closely with the architecture, IP design, RTL design, CAD, silicon technology teams and product engineers to achieve first pass silicon success. THE PERSON: A successful candidate will work with senior silicon design engineers. The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills. KEY RESPONSIBLITIES: * Physical design and signoff methodology development for advanced nodes and High performance * Automation to improve design PPA (Power, Performance, Area) and ensure a high-quality design environment for an SOC * Full chip / sub-system/ Tile level timing analysis with bleeding edge STA methodologies * Full chip / sub system level Clock tree synthesis and advanced clock tree construction and analysis. * Block and top level Formal verification, Physical Verification and chip finishing methodologies. * Top level ECO strategy for RTL, pre-physical and post-route implementation considering timing, congestion, IRdrop and logic equivalence * Statistical and Static Timing Analysis, Variation aware analysis, stdcell Library characterization enhancements * Developing and Integrating ML and LLM applications for Physical Design and Analysis flows * Performing data analysis and identifying design trends * Customizing and implementing solutions for new challenges * Collaborating with multi-site engineering teams to reach project goals * Hands-on in reference flows, excellent debugging skills. * Maintain and update technology collaterals PREFERRED EXPERIENCE: * Experience in ASIC Physical Design and/or CAD development * Hands-on experience with Place and Route, Timing Analysis, and Physical Verification tools from Synopsys, Cadence, like ICC2, Fusion Compiler, DSO.AI, Innovus, Cerebrus, Primetime, Primeshield, PT-PX, Formality, Conformal, RedHawk, etc. * Experience in 5nm and below technologies * Script development, scripting (TCL, Perl, Python, Pandas), ML/AI techniques * Knowledge and Experience in ML and LLM * Experience with data analytics applications, database management ACADEMIC CREDENTIALS: * Bachelors or Masters degree in computer engineering/Electrical Engineering This role is not eligible for Visa Sponsorship. #LI-PA1 #LI-Hybrid Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: The Memory PHY team is looking for a passionate and experienced Design Engineer for RTL and Firmware development of high-speed LPDDR, DDR IPs. Be a part of the definition, design and development phase of industry-leading Memory PHYs and interface IP. This opportunity includes creation of new IO designs as well as working on multiple designs and enhancing methodologies in parallel. Be a part of a team that delivers Industry leading IP and help our experts in RTL, FW, circuit, and architecture teams develop leading edge and differentiating IPs. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: * RTL design for memory I/O * PHY Digital Architecture development from pathfinding, coding, verification to physical implementation * PHY link layer design, implementation & verification with Analog and System architect. * PHY Analog/Digital co-design * Digital design and RTL coding * Timing Synthesis & Drive Physical implementation * Collaborate with architects, hardware engineers, and firmware engineers to understand the new features * Estimate the time required to write the new feature tests and any required changes to the test environment * Build the unit tests * Debug design failures to determine the root cause; work with DV and firmware engineers to resolve design defects and correct any test issues PREFERRED EXPERIENCE: * Digital design engineering experience * Experienced with Verilog, System Verilog, C, and C++ * Excellent knowledge of Verilog, System Verilog and a scripting language; experience with Python, Perl and TCL is a plus * Knowledge of clocking architectures, synchronization, and CDC methodology * Experience with synthesis, Timing closure * SERDES, DDR, Memory Controller, or MAC Design experience is preferred * Proficient in debugging firmware and RTL code using simulation tools * Strong understanding of computer organization/architecture. * Mixed signal RTL, Low power design experience is a plus * Exposure to leadership or mentorship is an asset ACADEMIC CREDENTIALS: * Bachelors or Masters degree in computer engineering/Electrical Engineering LOCATION: Santa Clara, CA or Boxborough, MA This role is not eligible for Visa sponsorship #LI-SC3 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: As a PCB Layout Physical Design Engineer - CAD in our Networking Technology & Solutions Group (NTSG), you will be responsible for ensuring that AMD's next-generation products deliver industry-leading reliability, performance, and efficiency. THE PERSON: In this role, you will closely collaborate with Silicon IP team, ASIC packaging team, PCB team, System Architect and external partners/suppliers to meet the most demanding SerDes requirements while ensuring the manufacturability. KEY RESPONSBILITIES: * PCB physical design for high-speed and high-power boards from initial concept to mass production * Optimize component placement, high-speed signal routing, critical power plane * Create design constraints based on the requirements of Hardware Design engineers, Signal/Power-Integrity engineers, Mechanical/Thermal engineers * Ensure that complex system layouts meet electrical and mechanical/thermal specifications * Adapt designs to fit component availability or manufacturing limitations * Resolve any issue related to PCB physical design and ensure a smooth transition from design to production * Generate comprehensive manufacturing and assembly packages such as Gerber, ODB * Building strong relationships with both engineers and manufacturers to reduce the risk of redesigning * Collaborate with cross-functional teams to drive product development while keeping projects on schedule and within scope. * Stay at the forefront of PCB physical design innovations and technologies to ensure AMD leadership in the industry PREFERRED QUALIFICATIONS: * Strong experience on PCB physical design for high-speed/high-power systems * Strong background in electronic fundamentals * Strong expertise in PCB design software such as Cadence Allegro * Deep knowledge on different types of layers such as copper, silkscreen, solder mask, and different types of component models such as symbol, footprint * Basic knowledge of mechanical, thermal, signal integrity, power integrity * Familiarity with PCB manufacturing processes and standards * Hands-on experience of balancing the technical requirements from hardware engineers and the practical constraints set by manufacturers * Excellent problem-solving and cross-functional collaboration skills ACADEMIC CREDENTIALS: Bachelor or Master degree of Electrical Engineering, Computer Engineering, or related field LOCATION: Santa Clara, CA #LI-BW1 #LI-NTSG-HW Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: This role is an excellent opportunity to work on the cutting-edge next generation technologies that will be part of future AMD Microprocessors powering Servers and Personal Computers as well as Graphics Cards and VR sets. You will join one of the fastest-growing field of Chiplet Interconnect technology rapidly being adopted across the VLSI industry. The team works on supporting both AMD proprietary I/O protocols and is also a key driver for industry standard Universal Chiplet Interconnect Express. The IP portfolio caters to short/ultra-short reach die-2-die interconnect with different bounding boxes tied to beachfront, Power, BER requirements. As a member of this team, you get a chance to work on IP development, drive design-specification, work on digital design and collaborate in the whole spectrum of areas include DFT, Firmware, Design verification, and Physical Design. THE PERSON: Enjoys being an environment where they can grow and learn with sense of team spirit Strong analytical thinking and problem-solving skills, excellent attention to detail. Eager to learn new designs and implementation techniques. Must have good collaboration and interpersonal skills. Excellent communication skills with leadership qualities KEY RESPONSIBILITIES: * Experience with I/O protocols like USB, PCIe, CXL. * Experience in developing micro-architecture for any given module. * RTL design experience with multi-clock, high frequency designs, low latency, low power & high performance. * Debugging/Post Silicon Bring up * Good Documentation and presentation skills. * Micro-architecture of simple to complex digital blocks. * RTL development using best industry practices. * Optimize design for key metrics like Area, Power, Performance etc. * Ability to work with cross-functional teams like DFT, Implementation, Verification, Emulation, Firmware regularly. PREFERRED EXPERIENCE: * Experience in digital front-end implementation, including micro-arch. definition * Experience with scripting/automation languages like Python/Perl * Firmware on Hardware-Firmware co-design * Experience with state-of-the-art industry standard digital tools * Preferred experience in design with multiple clock domains * RTL design experience with multi-clock, high frequency designs * Knowledge in digital RTL Digital Design and Implementation * Experience with Synthesis, Equivalence Checking, Clock-Domain Crossing (CDC) Analysis, Area/Power optimizations, Linting, Static Timing Analysis (STA) ACADEMIC CREDENTIALS: Master's/Bachelor's in electrical engineering or equivalent preferred LOCATION: San Jose, CA #LI-SL3 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

What you do at AMD changes everything We care deeply about transforming lives with AMD technology to enrich our industry, our communities and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence, while being direct, humble, collaborative and inclusive of diverse perspectives. This is who we are at our best. One Company. One Team. AMD together we advance_ Job Requirements: Experience in Digital Design or Silicon characterization Should be knowledgeable about all the internal blocks of FPGA like DSP, BRAM, I/O etc Good understanding of device technology, custom circuit and digital designs and electrical analysis Strong scripting skills using Perl, Python, C-shell or similar scripting languages. Experience with Xilinx FPGA design / implementation tools is a plus Good analytical, communication, presentation and troubleshooting skills are required Education Requirements Minimum of a BS with 2+ year of experience or MS degree in Electrical Engineering, Computer Engineering or related equivalent #LI-JY1 Requisition Number: 167464 Country: United States State: California City: San Jose Job Function: Design Benefits offered are described here. AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

What you do at AMD changes everything We care deeply about transforming lives with AMD technology to enrich our industry, our communities and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence, while being direct, humble, collaborative and inclusive of diverse perspectives. This is who we are at our best. One Company. One Team. AMD together we advance_ TITLE: Design Engineer At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies - building blocks for gaming, immersive platforms, and the data center. Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to take a look at the opportunities available to come join our team. THE ROLE: This position is within the AMD SERDES Technology team in San Jose, CA, looking for a talented and motivated team member with a focus on FPGA design and hands on silicon bring-up. You will use your knowledge of high-speed SerDes and design experience to develop various solutions for common high-speed SerDes interfaces and applications. RESPONSIBILITIES: FPGA design and IP solutions development Develop embedded firmware for validation and applications development Work with internal teams to create IP solution, debug features associated with physical layer functionalities Provide customer support and field debugging as required Preferred Skills & Experience: FPGA design and debug experience C/C++ for embedded system development Knowledge of physical layer specifications in IEEE 802.3 and / or PCIe Programming experience in Python or Perl scripting languages Hands-on experience with various lab equipment for silicon bring-up and validation Knowledge of 50G+ multi-level (i.e. PAM4) SERDES is preferred Excellent verbal and written communication skills ACADEMIC CREDENTIALS: B.S. or M.S. Electrical or Computer Engineering preferred Requisition Number: 179684 Country: United States State: California City: San Jose Job Function: Design Benefits offered are described here. AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

What you do at AMD changes everything We care deeply about transforming lives with AMD technology to enrich our industry, our communities and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence, while being direct, humble, collaborative and inclusive of diverse perspectives. This is who we are at our best. One Company. One Team. AMD together we advance_ SILICON DESIGN ENGINEER 2 THE ROLE: Join a team of silicon design engineers who utilize their skills in logical and physical circuit optimization to innovate and implement programmable logic interfaces. Our team owns the design and implementation from RTL to final layout database delivery, as well as supports silicon validation and characterization. You'll be part of a small and focused design team with a wide scope of responsibilities and technical opportunities using the latest in circuit design tools and methodologies. Your skills will be deployed in simulation, characterization, and model development for circuit performance and power at cell, critical path, and block-level designs. THE PERSON: We are looking for a self-motivated team worker, who possesses good verbal and written communication skills. The ideal candidate strives to tackle challenges in creative ways with solutions that can be applied in a wide range of applications. If you have a drive for high-quality, high-accountability design work, then you will be a great fit for our team! KEY RESPONSIBILITIES: Schematic capture Logical equivalency checks Test bench development Place and route constraint definition Physical design closure in APR tools Critical-path simulations for timing correlation with STA Electrical rule checks commensurate with each stage of the design Generating and characterizing models of circuit timing and power PREFERRED EXPERIENCE: Knowledge in VLSI design, design automation, IC design, and RTL design Knowledge of floor planning, synthesis, place & route, static timing analysis, and EM/IR analysis Knowledge of Cadence SPICE, Synopsys Primetime, and IC compiler preferred ACADEMIC CREDENTIALS: MS (preferred) or BS with additional experience in Electrical Engineering or Computer Engineering or related equivalent #LI-JY1 Requisition Number: 162224 Country: United States State: California City: San Jose Job Function: Design Benefits offered are described here. AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: Join our leading-edge Design and RTL Methodology team as a Hardware Development Engineer, contributing directly to the development of our latest FPGA products. In this role, you will help ensure the highest quality of RTL design that our customers rely on. THE PERSON: You are an experienced, proactive RTL Design Engineer who thrives in a fast-paced environment. You quickly ramp up on new tools and methodologies, and you're comfortable working on a small, highly capable team where you can take on significant responsibility. KEY RESPONSIBILITITES: * Collaborate with the design team to drive continuous improvements in front-end design methodologies, ensuring top-quality RTL across areas such as Lint, CDC, formal equivalence, and low-power verification. * Enhance and develop flows that analyze RTL and Unified Power Format (UPF) Files, including updating or creating new UPF to enable robust verification of power-domain crossings for AMD's next-generation monolithic and stacked FPGA-SoC product families. * Leverage corporate AI systems to increase productivity and streamline workflows. PREFERRED EXPERIENCE: * Proven experience in logic design and static verification (SystemVerilog, Verilog, or VHDL), ideally with contributions to at least two ASIC products brought to market. * Strong background in RTL/logic design, including specifying multi-power-domain architectures using IEEE 1801 Unified Power Format (UPF). * Programming skills in Perl, Python, and TCL. ACADEMIC CREDENTIALS: * Bachelor's degree in Electrical or Computer Engineering; Master's degree preferred. LOCATION: San Jose or other HYBRID office locations. #LI-GW1 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: As a design engineer in our CAD and methodology team, you will be responsible for leading and optimizing the EDA environment for Project CAD team in the Adaptive & Embedded Computing Group (AECG). You will oversee the complete SCH-to-GDS flow, manage tool deployments, and drive methodology development across multiple semiconductor projects. This is an opportunity to shape the technical direction of critical IC design workflows and lead a team of skilled CAD engineers. You will advise on tools selection, and interface with various EDA tool vendors and foundries to run the EDA tools, PDKs and other files necessary for the Silicon Development Team to operate efficiently. You will be responsible for defining and creating a unified environment that sets the versions of the tools, PDK and design for every individual chip in development. Additionally, you will interact with the various Silicon development teams who will be requesting newer versions of the tools and raise trouble tickets with CAD vendors as needed. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: * Execute in CAD infrastructure team supporting multiple IC design projects * Establish and maintain standardized design flows and methodologies * Implement and support customized CAD flows for Fabric design groups * Enable the team to meet design and development targets by working closely with external tool vendors * Develop tools flows methodologies on digital back-end domains, sign-off flows for timing, power, EM/IR, DRC/LVS/DFM, etc. * Improve engineering efficiency while improving design quality in IP release process * Be single point contact for bugs and issues for custom and analog physical design team * Build flow in TCL, Python to ensure quality and faster executions * Understand different methodologies used across industry to adopt best practices * Leverage and deploy AMD AI systems to design teams PREFERRED EXPERIENCE: * Proficiency in TCL, Python, PERL, or other scripting languages * Experience with PDKs and technology enablement * Skilled in Spice and PVT simulation environments * Hands-on expertise with Virtuoso-based custom layout tools and flows * Familiarity with Calibre extraction flows and EM/IR analysis using Totem and Redhawk * Working knowledge of SiliconSmart, PrimeTime, and Physical aspect of VLSI designs * Strong written and verbal communication skills ACADEMIC CREDENTIALS: * Bachelor's degree in Computer or Electrical Engineering, or equivalent; Master's degree preferred LOCATION: * San Jose #LI-GW1 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: As a member of the Adaptive and Embedded Computing Group, you will help bring to life cutting-edge designs. As a member of the front-end design team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success. THE PERSON: You have a passion for modern, complex processor architecture, RTL coding, and digital design in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: * Own the design and implementation of blocks to meet functional, timing, area and power requirements * Guide and review verification for these blocks * Design and implement logic functions that enable efficient test and debug * Implement automation to increase design team efficiency PREFERRED EXPERIENCE: * Strong front-end RTL engineering background * Strong communication skills, able to summarize complex problems for executives as well as drill down to details with architects and engineers * Strong analytic and problem solving skills including the ability to analyze current behavior, identify potential areas for improvement, and design of experiments * Experience with Arm architecture and APB, AXI, CHI protocols * Experience with design reuse, including RTL, constraints, and waivers * Experience with SoC level design integration * Experience with automation using scripting techniques such as PERL, Python, or Tcl * Experience with timing constraints and timing exceptions * Experience running standard quality checks such as LINT and CDC * Experience designing with multiple power domains including writing UPF * Must be a self-starter and self-motivated ACADEMIC CREDENTIALS: * Bachelors or Masters degree in computer engineering/Electrical Engineering LOCATION: San Jose, CA #LI-DW1 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: The candidate will join a highly visible team of physical interface experts concentrated on SERDES interfaces across AMD products. The team works across a large swath of AMD teams and is instrumental in the delivery of leading-edge, high-speed interface capabilities. THE PERSON: The ideal candidate is self-motivated to work independently as well as collaboratively with engineers across a variety of AMD design, verification, and validation teams. KEY RESPONSIBILITIES: * Excellent working knowledge of RTL-based design flows * Strong knowledge of firmware and hardware interaction * FPGA design and prototyping for various MAC or PCS functionalities * Working knowledge of the entire FPGA or ASIC design process and tool flow * Work with internal and external teams to develop transceivers solutions for various applications * Hands-on experience with various lab equipment for silicon bring-up and validation PREFERRED EXPERIENCE: * Familiar with industry standards such as Ethernet and PCIe is a plus * Strong analytical and problem-solving skills with pronounced attention to details ACADEMIC CREDENTIALS: * BS or MS in Electrical or Computer Engineering preferred LOCATION: San Jose, CA #LI-DP1 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

at Wind River Associate Engineer / Intern - P1 Location: Walnut Creek, CA ABOUT WIND RIVER Wind River is a global leader in delivering software for mission-critical intelligent systems. For more than four decades, the company has been an innovator and pioneer, powering billions of systems that require the highest levels of security, safety, and reliability. Wind River helps customers across automotive, aerospace, defense, industrial, medical, and telecommunications industries solve complex technology challenges on their journey toward the new intelligent machine economy. The company's software powers generation after generation of the safest, most secure systems in the world. Examples include playing a key role in NASA space missions such as Artemis I, the James Webb Space Telescope, and multiple Mars rovers. We've achieved recent 5G milestones, including the world's first successful 5G data session with Verizon and building one of the largest Open RAN networks in the world with Vodafone. The company has received industry recognition for its technology innovation and leadership and for its workplace culture, including global Great Place to Work certification and being named a “Top Workplace” for ten consecutive years. If you want to be part of a unique culture where the lived experience is based on our cultural attributes of growth mindset, customer focus, and diversity, equity, inclusion & belonging, come join us and help advance the future software-defined world. YOUR ROLE We are seeking a motivated and technically curious summer intern to join our team in developing QEMU support for Wind River's VxWorks. This internship offers a hands-on opportunity to work at the intersection of virtualization, embedded systems, and real-time operating systems (RTOS), contributing to the enablement of automotive-grade simulation environments.In your daily job you will: Extend QEMU by adding support for a new board specification tailored for VxWorks Design and implement virtual memory layout consistent with the target hardware architecture and RTOS requirements. Develop virtual serial port support to enable console I/O and debugging capabilities within QEMU. Integrate and validate the QEMU model by running a real-world VxWorks binary application. Document your work and present a demo showcasing the simulation of a simple RTOS application in QEMU. Gain experience in low-level system modeling and virtualization. Understand the basic architecture and boot flow of VxWorks. Learn how to simulate embedded platforms using QEMU. Develop skills in debugging and validating real-time systems in virtual environments. HOW YOU WILL CONTRIBUTE Key skills and competencies for succeeding in this role are: Currently pursuing a degree in Computer Engineering, Electrical Engineering, Computer Science, or a related field. Familiarity with C/C++ and Linux development environments. Basic understanding of operating systems and virtualization concepts. Interest in embedded systems and automotive software. Experience with QEMU or other hardware emulators preferred Exposure to RTOS concepts or VxWorks preferred Knowledge of serial communication protocols and memory mapping preferred APPLICANT PRIVACY NOTICE: Your privacy is of the utmost importance to us. At Wind River, we strictly adhere to all applicable data privacy laws. Please review Wind River's Applicant Privacy Notice, which can be found here . “Wind River is an equal employment opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, national origin, sex, gender identity, sexual orientation, disability status, protected veteran status or any other characteristic protected by law” SECURITY CLEARANCE REQUIREMENTS Successful candidates must engage in a security clearance process in regard to their citizenship in order to perform fundamental job duties, as per applicable law. In particular, candidates with certain citizenship may not be able to perform such fundamental job duties. Currently, this includes citizens of the following countries: Belarus; Burma; China; Cuba; Iran; North Korea; Syria; Venezuela; Afghanistan; Cambodia; Central African Republic; Cyprus; Democratic Republic of Congo; Ethiopia; Eritrea; Haiti; Iraq; Lebanon; Libya; Russia; Somalia; South Sudan; Sudan; Zimbabwe. The security clearance process may take a significant amount of time to complete, and any offer of employment will be contingent on the candidate's legal ability to perform the fundamental job duties. Wind River is committed to meeting its obligations to candidates under applicable human rights law and privacy law in this regard.

at Wind River Associate Engineer / Intern - P1 Location: Walnut Creek, CA ABOUT WIND RIVER Wind River is a global leader in delivering software for mission-critical intelligent systems. For more than four decades, the company has been an innovator and pioneer, powering billions of systems that require the highest levels of security, safety, and reliability. Wind River helps customers across automotive, aerospace, defense, industrial, medical, and telecommunications industries solve complex technology challenges on their journey toward the new intelligent machine economy. The company's software powers generation after generation of the safest, most secure systems in the world. Examples include playing a key role in NASA space missions such as Artemis I, the James Webb Space Telescope, and multiple Mars rovers. We've achieved recent 5G milestones, including the world's first successful 5G data session with Verizon and building one of the largest Open RAN networks in the world with Vodafone. The company has received industry recognition for its technology innovation and leadership and for its workplace culture, including global Great Place to Work certification and being named a “Top Workplace” for ten consecutive years. If you want to be part of a unique culture where the lived experience is based on our cultural attributes of growth mindset, customer focus, and diversity, equity, inclusion & belonging, come join us and help advance the future software-defined world. YOUR ROLE We are seeking a motivated and technically curious summer intern to join our team in developing QEMU support for Wind River's VxWorks. This internship offers a hands-on opportunity to work at the intersection of virtualization, embedded systems, and real-time operating systems (RTOS), contributing to the enablement of automotive-grade simulation environments.In your daily job you will: Extend QEMU by adding support for a new board specification tailored for VxWorks Design and implement virtual memory layout consistent with the target hardware architecture and RTOS requirements. Develop virtual serial port support to enable console I/O and debugging capabilities within QEMU. Integrate and validate the QEMU model by running a real-world VxWorks binary application. Document your work and present a demo showcasing the simulation of a simple RTOS application in QEMU. Gain experience in low-level system modeling and virtualization. Understand the basic architecture and boot flow of VxWorks. Learn how to simulate embedded platforms using QEMU. Develop skills in debugging and validating real-time systems in virtual environments. HOW YOU WILL CONTRIBUTE Key skills and competencies for succeeding in this role are: Currently pursuing a degree in Computer Engineering, Electrical Engineering, Computer Science, or a related field. Familiarity with C/C++ and Linux development environments. Basic understanding of operating systems and virtualization concepts. Interest in embedded systems and automotive software. Experience with QEMU or other hardware emulators preferred Exposure to RTOS concepts or VxWorks preferred Knowledge of serial communication protocols and memory mapping preferred BENEFITS - Canada Company-sponsored health, dental, and life insurance. Vacation and various time off policies to encourage work-life balance. Well-being programs: Employee assistance program, mental well-being through Unmind . Learning benefits: LinkedIn Learning subscription and seminars. APPLICANT PRIVACY NOTICE: Your privacy is of the utmost importance to us. At Wind River, we strictly adhere to all applicable data privacy laws. Please review Wind River's Applicant Privacy Notice, which can be found here . “Wind River is an equal employment opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, national origin, sex, gender identity, sexual orientation, disability status, protected veteran status or any other characteristic protected by law” SECURITY CLEARANCE REQUIREMENTS Successful candidates must engage in a security clearance process in regard to their citizenship in order to perform fundamental job duties, as per applicable law. In particular, candidates with certain citizenship may not be able to perform such fundamental job duties. Currently, this includes citizens of the following countries: Belarus; Burma; China; Cuba; Iran; North Korea; Syria; Venezuela; Afghanistan; Cambodia; Central African Republic; Cyprus; Democratic Republic of Congo; Ethiopia; Eritrea; Haiti; Iraq; Lebanon; Libya; Russia; Somalia; South Sudan; Sudan; Zimbabwe. The security clearance process may take a significant amount of time to complete, and any offer of employment will be contingent on the candidate's legal ability to perform the fundamental job duties. Wind River is committed to meeting its obligations to candidates under applicable human rights law and privacy law in this regard.

at Wind River Associate Engineer / Intern - P1 Location: Walnut Creek, CA ABOUT WIND RIVER Wind River is a global leader in delivering software for mission-critical intelligent systems. For more than four decades, the company has been an innovator and pioneer, powering billions of systems that require the highest levels of security, safety, and reliability. Wind River helps customers across automotive, aerospace, defense, industrial, medical, and telecommunications industries solve complex technology challenges on their journey toward the new intelligent machine economy. The company's software powers generation after generation of the safest, most secure systems in the world. Examples include playing a key role in NASA space missions such as Artemis I, the James Webb Space Telescope, and multiple Mars rovers. We've achieved recent 5G milestones, including the world's first successful 5G data session with Verizon and building one of the largest Open RAN networks in the world with Vodafone. The company has received industry recognition for its technology innovation and leadership and for its workplace culture, including global Great Place to Work certification and being named a “Top Workplace” for ten consecutive years. If you want to be part of a unique culture where the lived experience is based on our cultural attributes of growth mindset, customer focus, and diversity, equity, inclusion & belonging, come join us and help advance the future software-defined world. YOUR ROLE The Compiler Group works on compiler toolchains and programming languages for Wind River products including VxWorks and WR Linux. We build C/C++ toolchains based on open source LLVM and GCC technologies and proprietary technologies. We also maintain C/C++ libraries and enable modern programming languages like Rust. Your contribution in this role will impact the success of various Wind River products by improving support for new architecture variants, improve code size and performance and improving adherence to language standards and functional safety standards. Interface & Collaboration Working in the compiler team, you will collaborate with various engineering teams in the Wind River engineering organization that work directly or indirectly with the toolchains and with the open-source community.In your daily job you will: Development and maintenance of the compiler toolchains used in the Wind River products. Working with the open-source community to make improvements the LLVM toolchain. Take the initiative to improve features and processes. Contribute ideas for product improvements. Collaborate effectively with global software engineering teams. HOW YOU WILL CONTRIBUTEKey skills and competencies for succeeding in this role are: Good understanding of embedded systems and familiarity in building and developing SW modules Good understanding of automation tools and testing principles Excellent communication skills, both written and verbal Excellent analytical and debugging skills. BE/BTech or ME/MTech degree in Computer Science, Electronics Engineering, or equivalent Experience in scripting languages e.g., Python Strong C/C++ programming experience Assembly language experience (PowerPC/Arm/Intel/RISC-V) BENEFITS - Canada Company-sponsored health, dental, and life insurance. Vacation and various time off policies to encourage work-life balance. Well-being programs: Employee assistance program, mental well-being through Unmind . Learning benefits: LinkedIn Learning subscription and seminars. APPLICANT PRIVACY NOTICE: Your privacy is of the utmost importance to us. At Wind River, we strictly adhere to all applicable data privacy laws. Please review Wind River's Applicant Privacy Notice, which can be found here . “Wind River is an equal employment opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, national origin, sex, gender identity, sexual orientation, disability status, protected veteran status or any other characteristic protected by law” SECURITY CLEARANCE REQUIREMENTS Successful candidates must engage in a security clearance process in regard to their citizenship in order to perform fundamental job duties, as per applicable law. In particular, candidates with certain citizenship may not be able to perform such fundamental job duties. Currently, this includes citizens of the following countries: Belarus; Burma; China; Cuba; Iran; North Korea; Syria; Venezuela; Afghanistan; Cambodia; Central African Republic; Cyprus; Democratic Republic of Congo; Ethiopia; Eritrea; Haiti; Iraq; Lebanon; Libya; Russia; Somalia; South Sudan; Sudan; Zimbabwe. The security clearance process may take a significant amount of time to complete, and any offer of employment will be contingent on the candidate's legal ability to perform the fundamental job duties. Wind River is committed to meeting its obligations to candidates under applicable human rights law and privacy law in this regard.

at Wind River Associate Engineer / Intern - P1 Location: Walnut Creek, CA ABOUT WIND RIVER Wind River is a global leader in delivering software for mission-critical intelligent systems. For more than four decades, the company has been an innovator and pioneer, powering billions of systems that require the highest levels of security, safety, and reliability. Wind River helps customers across automotive, aerospace, defense, industrial, medical, and telecommunications industries solve complex technology challenges on their journey toward the new intelligent machine economy. The company's software powers generation after generation of the safest, most secure systems in the world. Examples include playing a key role in NASA space missions such as Artemis I, the James Webb Space Telescope, and multiple Mars rovers. We've achieved recent 5G milestones, including the world's first successful 5G data session with Verizon and building one of the largest Open RAN networks in the world with Vodafone. The company has received industry recognition for its technology innovation and leadership and for its workplace culture, including global Great Place to Work certification and being named a “Top Workplace” for ten consecutive years. If you want to be part of a unique culture where the lived experience is based on our cultural attributes of growth mindset, customer focus, and diversity, equity, inclusion & belonging, come join us and help advance the future software-defined world. YOUR ROLE The Compiler Group works on compiler toolchains and programming languages for Wind River products including VxWorks and WR Linux. We build C/C++ toolchains based on open source LLVM and GCC technologies and proprietary technologies. We also maintain C/C++ libraries and enable modern programming languages like Rust. Your contribution in this role will impact the success of various Wind River products by improving support for new architecture variants, improve code size and performance and improving adherence to language standards and functional safety standards. Interface & Collaboration Working in the compiler team, you will collaborate with various engineering teams in the Wind River engineering organization that work directly or indirectly with the toolchains and with the open-source community.In your daily job you will: Development and maintenance of the compiler toolchains used in the Wind River products. Working with the open-source community to make improvements the LLVM toolchain. Take the initiative to improve features and processes. Contribute ideas for product improvements. Collaborate effectively with global software engineering teams. HOW YOU WILL CONTRIBUTEKey skills and competencies for succeeding in this role are: Good understanding of embedded systems and familiarity in building and developing SW modules Good understanding of automation tools and testing principles Excellent communication skills, both written and verbal Excellent analytical and debugging skills. BE/BTech or ME/MTech degree in Computer Science, Electronics Engineering, or equivalent Experience in scripting languages e.g., Python Strong C/C++ programming experience Assembly language experience (PowerPC/Arm/Intel/RISC-V) BENEFITS - Canada Company-sponsored health, dental, and life insurance. Vacation and various time off policies to encourage work-life balance. Well-being programs: Employee assistance program, mental well-being through Unmind . Learning benefits: LinkedIn Learning subscription and seminars. APPLICANT PRIVACY NOTICE: Your privacy is of the utmost importance to us. At Wind River, we strictly adhere to all applicable data privacy laws. Please review Wind River's Applicant Privacy Notice, which can be found here . “Wind River is an equal employment opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, national origin, sex, gender identity, sexual orientation, disability status, protected veteran status or any other characteristic protected by law” SECURITY CLEARANCE REQUIREMENTS Successful candidates must engage in a security clearance process in regard to their citizenship in order to perform fundamental job duties, as per applicable law. In particular, candidates with certain citizenship may not be able to perform such fundamental job duties. Currently, this includes citizens of the following countries: Belarus; Burma; China; Cuba; Iran; North Korea; Syria; Venezuela; Afghanistan; Cambodia; Central African Republic; Cyprus; Democratic Republic of Congo; Ethiopia; Eritrea; Haiti; Iraq; Lebanon; Libya; Russia; Somalia; South Sudan; Sudan; Zimbabwe. The security clearance process may take a significant amount of time to complete, and any offer of employment will be contingent on the candidate's legal ability to perform the fundamental job duties. Wind River is committed to meeting its obligations to candidates under applicable human rights law and privacy law in this regard.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Title: Principal Product Engineer Reports to: Product Engineering Director We are looking for a technically strong, customer-focused Product Engineer to join our Product Engineering team and help drive the success of the data center software platform. This role is ideal for someone with a background in data center power infrastructure, power standards and simulating power usage/availability/failure mechanisms with an interest in software development who enjoys working with customers. We are looking for an individual who understands how modern data centers are powered/configured to ensure that we can capture this in the Cadence Reality digital twin software. The software allows for configurations to be tested and parts of the system failed to test how the data center will respond to failure. While this role has a primary focus on data center power infrastructure, it also requires the ability to work across the other critical domains to ensure holistic data center modeling and optimization within our digital twin software. This position sits at the intersection of software engineering, product management and customer success. You'll be responsible developing the software product roadmaps to match the evolution of data center power systems. Your day-to-day will involve working closely with customers, collaborating with engineering and product teams, and applying your technical skills to deliver tailored solutions and improvements. Based in San Jose, the position will include office time with local team members and working with our global Application Engineering and Sales team. The core Product and Engineering teams are based in the UK and the ideal candidate will be comfortable working independently during non-overlapping hours and proactively engaging with remote colleagues across time zones. Success in this position requires strong communication, technical depth of knowledge, problem-solving agility, and a passion for making software work seamlessly in real-world customer environments. Job Responsibilities: * Collaborate with customers and wider industry to understand gaps in software features * Help design and specify product enhancements for software engineering to build * Support sales engagements where power simulation is a key deliverable * Provide 2nd line support for the product for key customers and work with other technical resources as required to solve issues * Support the product development lifecycle in collaboration with the wider product engineering team * Help design and specify product enhancements for software engineering to build * Contribute towards the quality of the software products and supporting documentation * Develop and maintain high level of knowledge on both technology landscape and the data center industry * Communicate clearly with a wide range of stakeholders, conveying complex technical information to non-technical audiences Job Qualifications: * Degree or equivalent experience in technical science or engineering * 3+ years' recent experience with data center power systems * 3+ year's recent experience in a customer-facing role * Strong problem-solving capabilities and analytical thinking * Strong written and verbal communication skills * Ability to empathise with customers * Ability to remain calm and find solutions to problems under time pressure * Knowledge of Agile development methodologies * Knowledge of Secure Development Lifecycle principles and software security Additional Skills: * Proficiency in power calculations including 3 Phase AC, DC power * Understanding of challenges dues to AI power loads (inferencing/training/failures) * Prior experience of single line diagrams * Prior experience with power monitoring telemetry such as BMS/EMS * Experience in a product role * Experience in the data center industry Additional Information: Cadence is committed to equal employment opportunity and employment equity throughout all levels of the organization. We strive to attract a qualified and diverse candidate pool and encourage diversity and inclusion in the workplace. Be proud and passionate about the work you do. Together, our One Cadence - One Team culture drives our success. Travel: The annual salary range for California is $136,500 to $253,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more. We're doing work that matters. Help us solve what others can't.

Category Engineering Hire Type Employee Job ID 12583 Base Salary Range $157000-$235000 Remote Eligible No Date Posted 21/08/2025 This position requires access to or use of information, which is subject to export restrictions, including the International Traffic in Arms Regulations (ITAR). All applicants for this position must be "U.S. Persons" within the meaning of the ITAR. "U.S. Persons" include U.S. Citizens, U.S. Lawful Permanent Residents (i.e. 'Green Card Holders'), Political Asylees, Refugees or other protected individuals as defined by 8 U.S.C. 1324b(a)(3). This role is required to work onsite in our Sunnyvale CA location. We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and experienced engineer with a deep understanding of the RTL to GDSII flow. You thrive on solving complex technical issues and enjoy working closely with customers to enhance their experience with cutting-edge technology. With your strong background in synthesis, physical design, and static timing analysis, you excel in diagnosing and resolving technical challenges. You are an excellent communicator, capable of conveying technical concepts clearly and effectively to both technical and non-technical stakeholders. Your scripting skills in Perl, Tcl, and Python, along with your knowledge of CAD automation methods, make you a valuable asset to any team. You are motivated to work collaboratively with internal teams and customers to drive product adoption and satisfaction. What You'll Be Doing: * Providing technical and engineering insight to support and improve the usability, applicability, and adoption of Synopsys products. * Diagnosing, troubleshooting, and resolving complex technical issues on customer installations. * Deploying and training customers on new implementations and capabilities. * Reviewing and acting upon product feedback and solutions performance from customers and other application partners. * Working directly with R&D to develop and implement the technical roadmap, specifications, and validation for improvements and enhancements. * Partnering with customer technical managers and Sales to identify business challenges and develop effective technical solutions for new accounts. The Impact You Will Have: * Enhancing customer satisfaction by ensuring seamless product deployment and support. * Driving product adoption and utilization through effective technical training and support. * Contributing to the technical roadmap and product improvements based on customer feedback. * Supporting the sales team in acquiring new accounts by providing technical expertise. * Improving product performance and reliability through collaborative efforts with R&D. * Strengthening customer relationships by addressing and resolving technical challenges promptly. What You'll Need: * 7+ years of RTL to GDSII full flow experience or knowledge. * In depth experience debugging complex engineering issues related to STA, DRC/DRV and PPA optimization * Exceptional interest and knowledge of Advanced Node & Design methodologies. * Proven aptitude and motivation to work with internal and customer groups. * Excellent verbal and written presentation/communication skills. * Hands-on experience in synthesis, physical design, static timing analysis, equivalence checking, parasitic extraction, DRC/LVS, and power analysis. * Knowledge of ASIC implementation domains outside of RTL2GDS including RTL coding, Verification, formal checking is a plus. * Good scripting skills (Python, Tcl, Perl); working knowledge of CAD automation methods. Who You Are: * A collaborative team player who thrives in a dynamic environment. * An excellent communicator with the ability to convey complex technical concepts effectively. * A proactive problem-solver with a keen eye for detail. * Customer-focused, with a passion for delivering exceptional service and support. * A continuous learner, always seeking to expand your technical knowledge and skills. The Team You'll Be A Part Of: You will be part of a highly skilled and dedicated team of engineers focused on providing exceptional technical support and solutions to our customers. Our team collaborates closely with R&D, Sales, and Customer Success to drive product innovation, adoption, and satisfaction. We value continuous learning, open communication, and a customer-centric approach in everything we do. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.