Software Engineer jobs at Lattice Semiconductor - 116 jobs

## **At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.**At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.You will be a member of an expert R&D team creating technologies and products that enable static and dynamic transistor level analysis of the most advanced custom digital and mixed-signal circuits built for communication, IOT and AI markets.**Must haves:****Requirements:*** Experience with quality and software processes* Proficiency designing data structures, algorithms, and software engineering principles* Proficiency in analyzing transistor or gate level schematics* The preferred candidate is expected to have a BS in CS/EE/CE**Nice to haves:*** Experience in development of circuit simulation or library characterization programs* High level understanding of SPICE simulation transistor models* Experience with distributed programming, database design, and cloud APIs for distributed computing**Your work will be focused on:*** Enhancing and expanding the existing tools' architecture to cover timing analysis* Creating new frameworks for analysis of effects dominant at n5 and below* Using machine learning technology to bring order of magnitude speed / capacity / usability improvements over existing solutions*The annual salary range for California is $154,000 to $286,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.*## **We're doing work that matters. Help us solve what others can't.*** 8+ years of experience in development of EDA tools and one or more of transistor level timing, power, noise, aging, reliability, and emir analysis* Hardcore C++ Knowledge - Linux* Proficiency designing data structures, algorithms, and software engineering principles* Industry experience developing and maintaining C++ based applications on a Unix or Linux environment**Equal Employment Opportunity Policy:**Cadence is committed to equal employment opportunity throughout all levels of the organization.We welcome your interest in the company and want to make sure our job site is accessible to all. If you experience difficulty using this site or to request a reasonable accommodation, please contact ********************.**Privacy Policy:**Job Applicant If you are a job seeker creating a profile using our careers website, please see the .E-Verify Cadence participates in theE-Verify program in certain U.S. locations as required by law.Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world's toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence. Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class. #J-18808-Ljbffr

Senior Principal C++ Software Engineer page is loaded## Senior Principal C++ Software Engineerlocations: SAN JOSEtime type: Full timeposted on: Posted Todaytime left to apply: End Date: December 31, 2026 (30+ days left to apply)job requisition id: R51552## **At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.****Cadence** is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world's most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.**The Cadence Advantage*** The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact.* Cadence's employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees.* The unique “One Cadence - One Team” culture promotes collaboration within and across teams to ensure customer success* Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests* You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other-every day The Cadence Protium team is looking for talented software engineer to join and contribute to our Protium compiler TDM route development. You'll have a great opportunity to make a difference by applying your engineering and leadership skills to optimize the compiler for compile time, fclk performance and memory efficiency.Requirements* BS with a minimum of 10 years of experience in engineering, computer science or related field. OR MS with a minimum of 7 years of experience OR PhD with a minimum of 5 years of experience* Strong understanding of data structures, algorithms, and databases.* Demonstrated proficiency in C++, gdb debugging, and general software development skills*The annual salary range for California is $154,000 to $286,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.*## **We're doing work that matters. Help us solve what others can't.****Equal Employment Opportunity Policy:**Cadence is committed to equal employment opportunity throughout all levels of the organization.We welcome your interest in the company and want to make sure our job site is accessible to all. If you experience difficulty using this site or to request a reasonable accommodation, please contact ********************.**Privacy Policy:**Job Applicant If you are a job seeker creating a profile using our careers website, please see the .E-Verify Cadence participates in theE-Verify program in certain U.S. locations as required by law.Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world's toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence. Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class. #J-18808-Ljbffr

Senior Applications Engineer - DDR Design IP page is loaded## Senior Applications Engineer - DDR Design IPlocations: SAN JOSEtime type: Full timeposted on: Posted Todayjob requisition id: R51389## **At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.**### Senior Applications Engineer - DDR Design IP Job Location: San Jose, CA Job Description The Cadence IP team develops industry leading IPs that enable customers in a variety of markets - from the endpoint to the edge to the cloud. At Cadence we're helping set the standard on IP products that get integrated in SoCs that power the world's Data Centers, Automobiles, Cloud and Wireless Systems. We offer amazing opportunities to grow in your career. As a Technical Presales Engineer, you will support the technical presales of DDR IP by generating collateral through simulations, synthesis and publications. As you grow into more senior roles, you will use your knowledge of different memory interface standards to architect memory solutions for customers using Cadence DDR IP. This role offers the benefit of both technical growth and business skill development. You will be part of the Technical Field Organization helping educate customers and providing solutions using our DDR IP portfolio. Our memory PHY and controller IPs are used in data centers, mobile devices, automobiles and consumer devices. Responsibilities include: • Technical presales of Memory IP • Gain expertise in memory controller and PHY IPs and DDR protocols • Work closely with IP Sales staff, marketing and R&D teams to win opportunities • Run Verilog simulations to enable IP benchmarking • Run RTL synthesis for area and timing analysis • Present IP demos to customers • Travel to customer sites may be required occasionally Qualifications: • BS/MS in EE, CE or related majors • Knowledge of Computer Architecture and Electronics circuits • Knowledge of Verilog HDL • Experience with simulation and synthesis tools • Excellent presentation skills and verbal/written communication skills is a must Nice to have: • Familiarity with one or more DRAM protocols - DDR4/5, LPDDR4/5/5X, HBM2/3, GDDR6 • Perl/Python Scripts • Experience on memory subsystem verification and/or performance analysis • Strong knowledge of ASIC flow, RTL design in Verilog, System Verilog and FPGA design • Knowledge of AXI, DFI protocols • Working knowledge of memory controller and memory PHY*The annual salary range for California is $84,000 to $156,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.*## **We're doing work that matters. Help us solve what others can't.****Equal Employment Opportunity Policy:**Cadence is committed to equal employment opportunity throughout all levels of the organization.We welcome your interest in the company and want to make sure our job site is accessible to all. If you experience difficulty using this site or to request a reasonable accommodation, please contact ********************.**Privacy Policy:**Job Applicant If you are a job seeker creating a profile using our careers website, please see the .E-Verify Cadence participates in theE-Verify program in certain U.S. locations as required by law.Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world's toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence. Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class. #J-18808-Ljbffr

A global electronic design automation company seeks a Senior Applications Engineer for DDR Design IP in San Jose, CA. This role involves supporting technical presales, conducting simulations, and presenting solutions to customers. Candidates should have a BS/MS in EE, knowledge of Verilog HDL, and excellent presentation skills. The annual salary range is $84,000 to $156,000, with competitive benefits and incentive compensation. #J-18808-Ljbffr

A leading global semiconductor company in San Jose is seeking a Senior Electrical PCIe Engineer to craft and verify next-generation PCIe components. The ideal candidate will have a BS or MS in Electrical Engineering, expertise in PCIe protocols, and at least 5 years of experience in related roles. You will develop firmware, define device behavior, and collaborate with teams to ensure high-performance PCIe subsystems. This position offers competitive pay and rich benefits. #J-18808-Ljbffr

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. You will work in a team of physical verification experts and will contribute to performance improvements and scalability of an industry-leading software product. You will learn the details of a large project development process in a dynamic corporate environment. Position Requirements: * MS degree in CS/EE or an equivalent with 5+ years of work experience * Quick learning and good communication abilities * Ability to work on a project and do research independently * Excellent programming skills and practical C++ experience * Knowledge of graph algorithms and computational geometry * Python familiarity and EDA domain knowledge are a plus The annual salary range for California is $101,500 to $188,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more. We're doing work that matters. Help us solve what others can't.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence is the leader in hardware emulation-prototyping technology and products. System engineering team is responsible to define, validate and enable the products. We are now looking for a hands-on system integration engineer who wants to expand his/her scope, work with the interactions of a complex multi-rack system and grow his/her career. This position is a highly visible function to bridge and gate-keep the full integration, validation, and characterization of ASIC, HW/PCB, SW, FW, and FPGA subsystems in the whole development cycle. The same discipline also applies to system bring-up and testing, methodology development and verification. Key responsibilities + Leverage silicon verification platform and environment to create necessary post-silicon infrastructure, methodology and automation to allow tests executed in a timely and efficient manner. + Integrate silicon, HW, firmware, and system software into a complete system which includes various InfiniBand and PCIe protocols, PXE booting, virtual machines, secure networks, Ethernet and Ethernet-over-Infiniband, sockets and RPC calls, FPGA, microcontroller interfaces, JTAG, I2C, SPI, SERDES, memory and many other interfaces. + Execute post-silicon tests to expose design issues, validate product against the specifications including performance, and qualify the design for production release. + Review, replicate, and respond to customer issues. Perform initial analysis of error logs from customer design simulation runs. Debug and isolate system-level issues down to ASIC/FPGAs, host servers, subsystems, firmware modules, runtime diagnostics. + Develop silicon and system stress tests. Leverage tests developed by other engineers. Package tests for production and field use. + Define, develop and drive the implementation of validation automation environment. Position Requirements + BS in Electrical Engineering, Computer Engineering or Computer Science + Fluent in at least one functional scripting language, preferably but not limited to Python. Other languages are plus. + Experience with embedded software/firmware, operating systems, and/or HW/SW interfaces is a plus + Experience in developing, maintaining and operating automated engineering processes is a big plus. + Strong interpersonal and communication skills, self-motivated and ability to work with cross-functions teams around the globe. The annual salary range for California is $88,900 to $165,100. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more. We're doing work that matters. Help us solve what others can't. Additional Jobs (************************************************* Equal Employment Opportunity Policy: Cadence is committed to equal employment opportunity throughout all levels of the organization. + Read the policy(opens in a new tab) (******************************************************************************************************************************** We welcome your interest in the company and want to make sure our job site is accessible to all. If you experience difficulty using this site or to request a reasonable accommodation, please contact ********************. Privacy Policy: Job Applicant If you are a job seeker creating a profile using our careers website, please see the privacy policy(opens in a new tab) (**************************************************************** . E-Verify Cadence participates in the E-Verify program in certain U.S. locations as required by law. Download More Information on E-Verify (64K) (************************************************************************************************************************** Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world's toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence. Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class. Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Join the Digital & Signoff Group (DSG) at Cadence and contribute to the development of the Genus Synthesis Solution, a state-of-the-art logic synthesis tool that optimizes Power, Performance, and Area (PPA) for advanced digital ASICs. This internship offers hands-on experience in software development for EDA tools, working closely with R&D and product engineering teams in a collaborative, innovation-driven environment. Responsibilities + Design, implement, troubleshoot, and debug software programs on Unix/Linux platforms. + Develop and enhance algorithms for logic synthesis and physical design flows. + Validate new synthesis features and ensure correctness and optimal configurations. + Assist with customer support by analyzing tool usage and providing feedback to R&D. + Contribute to documentation, including Product Requirement Specifications (PRS) for new features. Required Qualifications + Currently pursuing a PhD in Computer Science, Electrical Engineering, or Computer Engineering. + Strong programming skills in C/C++; exposure to Python and Tcl is a plus. + Solid understanding of data structures, algorithms, and object-oriented programming. + Familiarity with logic synthesis, physical design, and timing analysis. + Experience with Unix/Linux environments. + Excellent analytical and problem-solving skills; strong communication abilities. The annual salary range for California is $28.60 to $53.12 an hour. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid holidays and 401(k) plan with employer match. We're doing work that matters. Help us solve what others can't. Additional Jobs (************************************************* Equal Employment Opportunity Policy: Cadence is committed to equal employment opportunity throughout all levels of the organization. + Read the policy(opens in a new tab) (******************************************************************************************************************************** We welcome your interest in the company and want to make sure our job site is accessible to all. If you experience difficulty using this site or to request a reasonable accommodation, please contact ********************. Privacy Policy: Job Applicant If you are a job seeker creating a profile using our careers website, please see the privacy policy(opens in a new tab) (**************************************************************** . E-Verify Cadence participates in the E-Verify program in certain U.S. locations as required by law. Download More Information on E-Verify (64K) (************************************************************************************************************************** Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world's toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence. Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class. Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. This is an amazing opportunity to work as a software engineering intern at a world leader in computational software. Our customers are the world's most innovative companies, delivering extraordinary electronic products from chips to boards to complete systems for the most dynamic market applications including hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial, and healthcare. As a software engineering intern, you will help design and develop some of the most complex software tools used by designers across multiple verticals. We use advanced math, computer science, graph theory and machine learning to turn design concepts into reality. Responsibilities will include software development, debugging and fixing of software errors, implementing new features, along with writing and running tests. Position Requirements: Enrolled in a MS or BS program in computer science, electrical engineering, computer engineering, or a similar major. Strong understanding of software data structures, algorithms, and proficiency in object-oriented coding, preferably in C or C++. Exposure to Cadence products is a plus. The annual salary range for Cali fornia is $28.60 to $53.12 an hour . Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid holidays and 401(k) plan with employer match. We're doing work that matters. Help us solve what others can't.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. As an R&D intern, your focus area will be developing the next generation routing engine. You will work in a team environment to design, improve, and maintain core routing technology as part of Innovus Digital Implementation system. Routing algorithm knowledge is preferred to implement a robust and efficient routing engine. As an R&D engineer, your focus area will be developing the next generation routing engine. You will work in a team environment to design, improve, and maintain core routing technology as part of Innovus Digital Implementation system. Position Requirements: In progress with MS/Phd in Computer Engineering or Computer Science C/C++ knowledge Unix/Linux The annual salary range for Cali fornia is $28.60 to $53.12 an hour . Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid holidays and 401(k) plan with employer match. We're doing work that matters. Help us solve what others can't.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence is looking for an intern to develop algorithms in the physical design space. The candidate should have a master's degree and be pursuing a BS in algorithms for physical design IC tools. The candidate should have expertise on some set of physical synthesis problems such as placement, routing, clock tree synthesis, buffering, gate sizing, or logic optimization. The candidate should be a strong coder and be able to quickly prototype and test algorithms. An established publication record is preferable. The Position Requirements are...Must be currently enrolled in a BS program, with a primary research focus on VLSI CAD algorithm development. We're doing work that matters. Help us solve what others can't. Additional Jobs (************************************************* Equal Employment Opportunity Policy: Cadence is committed to equal employment opportunity throughout all levels of the organization. + Read the policy(opens in a new tab) (******************************************************************************************************************************** We welcome your interest in the company and want to make sure our job site is accessible to all. If you experience difficulty using this site or to request a reasonable accommodation, please contact ********************. Privacy Policy: Job Applicant If you are a job seeker creating a profile using our careers website, please see the privacy policy(opens in a new tab) (**************************************************************** . E-Verify Cadence participates in the E-Verify program in certain U.S. locations as required by law. Download More Information on E-Verify (64K) (************************************************************************************************************************** Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world's toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence. Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class. Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. The candidate will be responsible for designing, developing, troubleshooting and debugging software programs in the areas of static timing analysis with a focus on statistical analysis in presence of signal integrity effects. We are looking for candidates who have deep algorithmic knowledge and intent to build highly scalable solutions in C/C++, combined with passion to innovate. The graph structure we work upon can be of multi-billion nodes which brings in interesting challenges to build a highly distributed and incremental solution. Also, at lower technologies, modeling of the device variation into the statistical timing engine poses another complexity to the solution. The candidate must also possess good communication and team work skills. We're doing work that matters. Help us solve what others can't. Additional Jobs (************************************************* Equal Employment Opportunity Policy: Cadence is committed to equal employment opportunity throughout all levels of the organization. + Read the policy(opens in a new tab) (******************************************************************************************************************************** We welcome your interest in the company and want to make sure our job site is accessible to all. If you experience difficulty using this site or to request a reasonable accommodation, please contact ********************. Privacy Policy: Job Applicant If you are a job seeker creating a profile using our careers website, please see the privacy policy(opens in a new tab) (**************************************************************** . E-Verify Cadence participates in the E-Verify program in certain U.S. locations as required by law. Download More Information on E-Verify (64K) (************************************************************************************************************************** Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world's toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence. Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class. Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Looking for an individual with strong C++ and software development skills, and with interests in database or integrated circuit design to join the Virtuoso R&D Infrastructure team as a summer intern. The Virtuoso R&D Infrastructure team is responsible for the OpenAccess database, data translation, inter-process collaboration and communication, LLM based search and other infrastructure components of Virtuoso Studio. OpenAccess is an industry standard database used in the design of integrated circuits. Virtuoso Studio is the preeminent platform for full custom/analog design of integrated circuits including RF, mixed-signal, photonics, and advanced heterogenous designs. Candidates working toward a Master's Degree in Computer Science or Electrical Engineering are preferred but we will consider other candidates with sufficient experience. Understand: + Get to know the Virtuoso Infrastructure team and their role. + Understand the projects and products that the team is responsible for. + Participate in the Cadence Virtuoso Infrastructure team's software development methodology. Responsibilities: + Writing code to specification with guidance from software architects + Running tests and performance benchmarks + Participating in code reviews and other software development processes Job Requirements: + Currently enrolled as BS or MS or Phd student majoring in Computer Science or Electrical Engineering + Looking for strong C++, algorithms, and software development skills. + Good written and verbal communication skills. + Must be able to relocate to Headquarters in San Jose, CA We're doing work that matters. Help us solve what others can't. Additional Jobs (************************************************* Equal Employment Opportunity Policy: Cadence is committed to equal employment opportunity throughout all levels of the organization. + Read the policy(opens in a new tab) (******************************************************************************************************************************** We welcome your interest in the company and want to make sure our job site is accessible to all. If you experience difficulty using this site or to request a reasonable accommodation, please contact ********************. Privacy Policy: Job Applicant If you are a job seeker creating a profile using our careers website, please see the privacy policy(opens in a new tab) (**************************************************************** . E-Verify Cadence participates in the E-Verify program in certain U.S. locations as required by law. Download More Information on E-Verify (64K) (************************************************************************************************************************** Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world's toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence. Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class. Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

The Cadence Virtuoso platform powers all of the latest design innovations in consumer, mobile, and enterprise electronics worldwide. We are looking for talented software engineers to join our team and contribute to the continued growth and success of Virtuoso, one of Cadence's most successful products. This job requires proficiency in C++ or another object-oriented language, such as Python or Java. Solid understanding of data structures, databases, algorithms and design patterns is important. In this position, you'll have an excellent opportunity to improve our automatic analog design flow by applying your existing and new skills. Basic Requirements: + Pursuing B.S., M.S., or Ph.D. in engineering, computer science or related field. + Proficiency in C++, with good knowledge of the language specification and debugging. Nice to have: + Experience with the Cadence Virtuoso environment, the Spectre analog simulator or other electronic design platforms. + Knowledge of the standard library, STL containers and algorithms. + Familiarity with Linux/Unix development. + Interest in EE, analog design and integrated circuits. We're doing work that matters. Help us solve what others can't. Additional Jobs (************************************************* Equal Employment Opportunity Policy: Cadence is committed to equal employment opportunity throughout all levels of the organization. + Read the policy(opens in a new tab) (******************************************************************************************************************************** We welcome your interest in the company and want to make sure our job site is accessible to all. If you experience difficulty using this site or to request a reasonable accommodation, please contact ********************. Privacy Policy: Job Applicant If you are a job seeker creating a profile using our careers website, please see the privacy policy(opens in a new tab) (**************************************************************** . E-Verify Cadence participates in the E-Verify program in certain U.S. locations as required by law. Download More Information on E-Verify (64K) (************************************************************************************************************************** Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world's toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence. Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class. Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence is looking for an intern to develop algorithms in the physical design space. The candidate should have a master's degree and be pursuing a BS in algorithms for physical design IC tools. The candidate should have expertise on some set of physical synthesis problems such as placement, routing, clock tree synthesis, buffering, gate sizing, or logic optimization. The candidate should be a strong coder and be able to quickly prototype and test algorithms. An established publication record is preferable. The Position Requirements are…Must be currently enrolled in a BS program, with a primary research focus on VLSI CAD algorithm development. We're doing work that matters. Help us solve what others can't.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Works in R&D group to develop leading edge software for physical verification products at advanced node. With the supervision of senior software developers, performs as individual contributor to work on software development projects involving implementation, validation, maintenance and documentation. Works on complex problems where analysis of data requires an evaluation of intangible variance factors. The position requires BS or Master in Computer Science or Engineering, or equivalent. Excellent programming skill in scripting language is required. Background in physical verification, testing and relational databases is desired. Must have good communication skills to work with geographically distributed team. We're doing work that matters. Help us solve what others can't.

The Cadence Virtuoso platform powers all of the latest design innovations in consumer, mobile, and enterprise electronics worldwide. We are looking for talented software engineers to join our team and contribute to the continued growth and success of Virtuoso, one of Cadence's most successful products. This job requires proficiency in C++ or another object-oriented language, such as Python or Java. Solid understanding of data structures, databases, algorithms and design patterns is important. In this position, you'll have an excellent opportunity to improve our automatic analog design flow by applying your existing and new skills. Basic Requirements: Pursuing B.S., M.S., or Ph.D. in engineering, computer science or related field. Proficiency in C++, with good knowledge of the language specification and debugging. Nice to have: Experience with the Cadence Virtuoso environment, the Spectre analog simulator or other electronic design platforms. Knowledge of the standard library, STL containers and algorithms. Familiarity with Linux/Unix development. Interest in EE, analog design and integrated circuits. We're doing work that matters. Help us solve what others can't.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. The candidate will be responsible for designing, developing, troubleshooting and debugging software programs in the areas of static timing analysis with a focus on statistical analysis in presence of signal integrity effects. We are looking for candidates who have deep algorithmic knowledge and intent to build highly scalable solutions in C/C++, combined with passion to innovate. The graph structure we work upon can be of multi-billion nodes which brings in interesting challenges to build a highly distributed and incremental solution. Also, at lower technologies, modeling of the device variation into the statistical timing engine poses another complexity to the solution. The candidate must also possess good communication and team work skills. We're doing work that matters. Help us solve what others can't.

Lattice Overview There is energy here…energy you can feel crackling at any of our international locations. It's an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you're looking for. Responsibilities & Skills We are looking for a visionary Software Architect who uses GenAI technologies to optimize different aspects of Software Development. Key Responsibilities Define and evolve software architecture for complex, scalable systems. Integrate generative AI tools into daily workflows and architectural design processes. Collaborate with cross-functional teams to align architecture with product and business goals. Mentor engineering teams and promote best practices in software development. Required Qualifications Hands-on experience using generative AI tools for productivity and architectural design. Extensive experience in software architecture for large-scale systems. Expert-level proficiency in C++, including modern standards and best practices. Strong understanding of full-stack development, including front-end, back-end, and integration layers. Solid knowledge of the software development lifecycle, from requirements to deployment and maintenance. Preferred Qualifications Experience with FPGA tools, EDA software, or embedded systems. Advanced degree (MS/PhD) in Computer Science, Electrical Engineering, or related field. Benefits: The base pay for this role is between $260,000 to $280,000 per year. In addition to base salary, we offer an incentive plan bonus, and new hire equity for a competitive total compensation package. Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry. Lattice is an international, service-driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 800 strong, shares a total commitment to customer success and an unbending will to win. For more information about how our FPGA, CPLD and programmable power management devices help our customers unlock their innovation, visit ******************** You can also follow us via Twitter, Facebook, or RSS. At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace. Applications are welcome from all qualified candidates. Lattice Feel the energy.