Electrical Engineer jobs at Tata Technologies - 3546 jobs

Hardware support specialist for NFC Point-Of-Sale, IoT and WireLess Charging domains Supporting FAEs and Tier1 customers over JIRA ticketing system by answering questions, conducting design reviews and evaluating prototypes Design PCBs with microcontrollers and NFC antennas for internal prototypes and for certified Evaluation Kits Develop full-scale NFC wireless charging solutions from Antenna to Battery Be TechLead and take ownership of customer projects and internal development programs Performing measurements with RF lab equipment (in-house and at external laboratories) Perform EMC tests and troubleshooting, maintain documentation repository Write and maintain application notes, articles and presentations Create technical trainings for customers and internal staff Qualifications You bring a MSc in Electrical Engineering and several years of experience in wireless communications and PCB design You are familiar with Altium Designer (a Renesas company) You have hands‑on skills for re‑work, bring‑up and troubleshooting using EE lab equipment You have solid EMC theory knowledge and practical problem‑solving skills You have skills with EE simulation tools like Cadence, LTSpice, Qucs and CST Studio You have experience in NFC/RFID protocols, standards and products You have basic skills for Firmware updates, interface sniffing and protocol debugging You are open for customer inputs, self‑reflective and self‑critical personality, good at talking and writing to customers You can work independently and as part of a team You are willing to share your expert know‑how within the team as well as with customers You have sound knowledge of English Company Description Renesas is a global semiconductor company providing hardware and software solutions for a range of cutting‑edge technologies including self‑driving cars, robots, automated factory equipment, and smart home applications. We are a key supplier to the world's leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas is a global, multi‑billion dollar, publicly traded company headquartered in Japan, and has subsidiaries in 20 countries worldwide. Renesas is a dynamic, multi‑cultural technology company where employees learn, mentor, innovate and thrive. Renesas is extending our share in fast‑growing data economy‑related markets such as infrastructure and data center and strengthening our presence the industrial/IOT and automotive segments. Our solutions drive products developed by major innovators around the world. Join us and build your future by being part of what's next in electronics. Additional Information This position is subject to the Collective Agreement of the Electrical and Electronics Industry, employment group H (******************************************************************************* The monthly salary is paid 14 times a year. However, we offer a higher salary depending on your experience and qualifications. Renesas is an embedded semiconductor solution provider driven by its Purpose ‘To Make Our Lives Easier.' As the industry's leading expert in embedded processing with unmatched quality and system‑level know‑how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power‑efficient solutions today that help people and communities thrive tomorrow, ‘To Make Our Lives Easier.' At Renesas, you can: Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people's lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people‑first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let's Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement. We have adopted a hybrid model that gives employees the ability to work remotely two days a week while ensuring that we come together as a team in the office the rest of the time. The designated in-office days are Tuesday through Thursday for innovation, collaboration and continuous learning. #J-18808-Ljbffr

A technology company is seeking a Principal Hardware Design Engineer to develop advanced hardware solutions for high-performance electronic systems. This role involves leading hardware design from conception to production, providing technical guidance, and mentoring. Candidates should have over 10 years of experience in hardware design, proficiency in Verilog HDL, and a strong understanding of high-speed digital systems. This hybrid position is based in California, specifically in San Jose, with competitive compensation ranging from $167K to $250K. #J-18808-Ljbffr

A leading semiconductor company based in Santa Barbara, CA is looking for a Senior System Design Engineer. This hands-on role involves developing embedded software and algorithms for power supply applications, requiring strong expertise in power supply behavior. Candidates should have a BS in Electrical or Computer Engineering and at least 4 years of related experience. The position offers competitive remuneration, including a range of benefits and a supportive work culture. #J-18808-Ljbffr

Senior System Design Engineer page is loaded## Senior System Design Engineerlocations: US, CA, Santa Barbaratime type: Full timeposted on: Posted Yesterdayjob requisition id: R260100**About Analog Devices**Analog Devices, Inc. (NASDAQ: ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at and on and .Analog Devices is seeking a senior system design engineer for its Data Center & Energy (DCE) group in beachside Santa Barbara, CA. Within DCE, we deliver high‑reliability power, connectivity, and analytics solutions for modern data centers and energy infrastructure.The successful candidate will develop embedded software and algorithms that produce advanced telemetry in high-performance power supply applications. This is a hands‑on, lab‑intensive system engineering role requiring strong understanding of power supply behavior. You will design experiments, build hardware and embedded environments, tune and validate algorithms, and work directly with stakeholders to present findings, challenges, and system‑level solutions.This is a demanding multi-disciplinary position with unique growth potential. The group culture aims to foster a challenging, exciting, and supportive environment. The team members must be comfortable working on a wide variety of products and technologies in a fast-paced and agile environment. Analog Devices rewards performance, innovation, and collaboration.**Responsibilities include, but are not limited to:*** Design and run lab experiments to identify key indicators of power system behavior* Tune and validate algorithms to eliminate false positives and negatives across diverse customer use cases* Build and use FPGA‑ and microprocessor‑based prototypes to test and refine new algorithms* Perform board-level bring‑up, measurement, and debug to support system‑level evaluations* Collaborate with internal teams and present findings to stakeholders, including key customers**Minimum Qualifications:*** BS in Electrical or Computer Engineering (or equivalent)* 4+ years of experience in system design, embedded development, or mixed HW/SW engineering roles* Familiarity with power supply operation and measurement fundamentals* Proficiency with embedded software development (C/C++), algorithm implementation, and scripting for data analysis (Python/MATLAB)* Experience with FPGA- or microprocessor-based system bring‑up and lab debugging* Proficient with high-performance measurement equipment (oscilloscopes, logic analyzers, SMUs, electronic loads)* Strong problem-solving skills and ability to work independently within defined objectives* Good organization; written and verbal communication skills**Preferred Qualifications:*** MS in Electrical or Computer Engineering (or equivalent)* Background in signal processing, anomaly detection, or model-based system diagnostics* Familiarity with power telemetry data and PMBus* Experience engaging directly with customers or external stakeholders* Experience creating automation tools for data capture, experiment orchestration, or algorithm evaluation* Exposure to environmental testing or characterization of power systems*For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position - except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) - may have to go through an export licensing review process.**Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.**EEO is the Law: .*Job Req Type: ExperiencedRequired Travel: Yes, 10% of the time Shift Type: 1st Shift/DaysThe expected wage range for a new hire into this position is $108,800 to $149,600.* Actual wage offered may vary depending on work location, experience, education, training, external market data, internal pay equity, or other bona fide factors.* This position qualifies for a discretionary performance-based bonus which is based on personal and company factors.* This position includes medical, vision and dental coverage, 401k, paid vacation, **holidays, and sick time**, and other benefits. #J-18808-Ljbffr

A global technology company is seeking a Reliability Engineer in New York to conduct reliability studies and coordinate qualification of new products. The ideal candidate will have a background in mechanical engineering or related fields and 3-5 years of experience in the semiconductor industry. Key responsibilities include designing and executing qualification tests and collaborating with engineering teams to ensure product reliability. #J-18808-Ljbffr

A leading tech company in Sunnyvale seeks a Physical Design Engineer to contribute to the development of cutting-edge TPU technology. You will collaborate with various teams to enhance design processes, focusing on innovative solutions for AI/ML applications. Candidates should have relevant experience in physical design, strong qualifications in Electrical Engineering, and skills in scripting languages like Python. The role offers a competitive salary range and numerous benefits, with a strong emphasis on diversity and inclusion. #J-18808-Ljbffr

A leading tech company is seeking an RTL Design Engineer in Sunnyvale, CA to shape the future of AI/ML hardware acceleration. The ideal candidate will work on cutting-edge TPU technology, taking part in ASIC development to enhance computational efficiency in data centers. Responsibilities include defining project scope, design, and documentation of next-generation data center accelerators, alongside collaborative efforts with cross-functional teams to drive innovations that empower billions of users globally. Comprehensive education and experience in relevant engineering fields are essential. #J-18808-Ljbffr

A leading technology company located in Sunnyvale, CA, is looking for a Physical Design Engineer. In this role, you will shape the future of AI/ML hardware acceleration by working on cutting-edge TPU technology. The ideal candidate will have a Bachelor's degree in a relevant field and at least 1 year of physical design experience. Responsibilities include collaborating with various teams to ensure optimal design and performance. A competitive salary range of $113,000-$161,000 is offered, along with bonuses and benefits. #J-18808-Ljbffr

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. THE ROLE As a member of the AMD, you will help bring to life cutting‑edge designs and deliver IPs to SOC. As a member of the front‑end design/integration team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first‑pass silicon success. THE PERSON You have a passion for modern, complex processor architecture, digital design as well as verification/design quality. You are a team player who has excellent communication skills, strong analytical & problem‑solving skills and are willing to learn and ready to take on problems. A global mindset and ability to work in a multi‑site environment are keys to being successful in this role. KEY RESPONSIBLITIES RTL design of high speed design, clock/reset/power features, IP Integration, sub‑system level design Architect and design of power management features. Design optimization for implementing power efficient IP, implementing the RTL using low power techniques Responsible for the inter‑IP integration issues resolution Own the Clock‑Domain crossing, Linting aspects of the overall design of the IP and the subsystem Work closely with FEINT, DFT, Physical Design and SOC teams to incorporate the interdisciplinary feedback into the design Architecting, micro‑architecting and documentation of the design features Your commitment to innovating as a team demonstrated through excellent communication, knowledge of proper documentation techniques, and independently driving tasks to completion. REFERRED EXPERIENCE Extensive experience in Digital IP/ASIC design and Verilog RTL development Experience in full IP design cycle, requirements definition, architecture and microarchitecture specification Well versed with RTL design verification, design quality checks, synthesis, timing closure and post silicon validation Expert on Verilog RTL design and has experience of multiscale digital IP/ASIC projects. Should possess expertise in front‑end EDA tools sign‑off and its flows Familiarity with low power design and low power flow is an added plus Ability to program with scripting languages such as Python or Perl is a plus Highly motivated to seek out solutions and willing to learn new skills to fulfill job requirements Proven interpersonal skills, leadership and teamwork Excellent writing skills in the English language, editing and organizational skills required; Skilled at prioritization and multi‑tasking Good understanding of engineering terminology used within the semiconductor industry; Good understanding of digital design concepts Knowledge of, or experience in, functional design verification or design is highly desired ACADEMIC CREDENTIALS Bachelors or Masters degree in computer engineering / Electrical Engineering This role is not eligible for visa sponsorship. LOCATION: Santa Clara, CA Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. #J-18808-Ljbffr

A leading semiconductor company in Santa Clara, CA, seeks a skilled digital design engineer. The role involves RTL design, power management features, and collaboration across teams. Candidates should have strong Verilog skills and experience in IP design. A Bachelor's or Master's degree in Computer Engineering or Electrical Engineering is required. This position offers an opportunity to be part of a company that values innovation and teamwork, but it is not eligible for visa sponsorship. #J-18808-Ljbffr

A leading aerospace and defense company is looking for a Senior Principal Electronics Engineer - Hardware and Software Integration Lead in San Diego. This role involves leading the development of next-generation ground system solutions, managing software supplier interactions, and coordinating various engineering efforts. Candidates should have a strong background in STEM, relevant work experience, and active security clearance. The position requires on-site work but could offer hybrid options in the future. #J-18808-Ljbffr

A leading aerospace and defense company in Baltimore is offering a SkillBridge internship for the role of Principal Electronics Engineer. This position involves the design and fabrication of Electrical Ground Support Equipment (EGSE) to support flight hardware testing. Candidates should possess a Bachelor's degree in STEM and relevant experience in hardware design. An Active Secret security clearance is also required for this role. Join us to make an impact in the defense sector. #J-18808-Ljbffr

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE AMD is looking for a Senior ASIC/RTL Design Engineer to contribute to the development of large SoCs, featuring multiple physical blocks and complex timing constraints. The candidate's responsibilities will include RTL ownership and integration, building and verifying timing constraints for intricate SoC designs. This role demands a combination of SDC expertise, EDA tool proficiency, and TCL-based scripting abilities. The candidate should possess extensive experience in SDC development and debugging, be familiar with enhancing various RTL quality metrics for complex, hierarchical designs, and be able to automate these processes for increased efficiency. Proficiency in both front-end (RTL) processes and back-end (Synthesis and P&R) processes is preferred. THE PERSON The ideal candidate demonstrates high energy, excellent written and verbal communication skills, and a structured, organized approach to work. They are collaborative and strongly focused on achieving team and organizational goals. KEY RESPONSIBILITIES Responsible for RTL design and integration. Contribute to all aspects of SoC design including chip definition, architecture development and modeling, development of micro-architectural specification, conversion of micro-architectural specifications to logic implementation, verification, emulation, debug, synthesis and timing closure. Develop complex multi-mode/multi-corner timing constraints that are compatible for RTL and signoff. Lead the effort to maintain RTL quality metrics in complex, hierarchical designs, while automating the process for increased efficiency. Implement the pre-route timing checks and QoR clean up to eliminate timing constraints issues and ensure a quality handoff for STA (static timing analysis) checks. Collaborate with CAD on the development of pre-production synthesis (Design Compiler) and STA (Primetime) work flows. Require a blend of SDC expertise, proficiency in EDA tools, and Tcl based scripting abilities (in both EDA environment and standalone Linux Tcl shell scripts). Continuously review and identify areas for process improvements and early issue detection during the design phase. PREFERRED EXPERIENCE Experience with SoC designs that includes RTL design and integration. Worked with EDA tools that enable RTL quality checks. Hands on experience in building the timing constraints for IPs, blocks and Full-chip implementation in both flat/hierarchical flows. Experience with analyzing the timing reports and identifying both the design and constraints related issues. Ability to multitask, grasp new flows/tools/ideas. Experience in improving the methodologies. Preferred EDA tool experience: Synopsys Design Compiler/Primetime, Spyglass, Fishtail etc. Prior experience developing complex TCL scripts in Synopsys Design Compiler (DC) and PrimeTime (PT). Writing custom TCL QC and QoR checks using DC/PT object attributes queries and filters. Strong analytical and problem-solving skills. ACADEMIC CREDENTIALS Bachelor's or Master's degree in Electrical Engineering or Computer Engineering LOCATION San Jose This role is not eligible for visa sponsorship. Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's “Responsible AI Policy” is available here. This posting is for an existing vacancy. #J-18808-Ljbffr

A technology company in San Jose is seeking a Senior ASIC/RTL Design Engineer to contribute to the development of large SoCs. The role requires expertise in RTL ownership, complex timing constraints, and EDA tools, alongside strong communication skills. Candidates should have a Bachelor's or Master's degree in Electrical Engineering or Computer Engineering. This is a non-remote role requiring in-person presence, and does not offer visa sponsorship. #J-18808-Ljbffr

San Francisco Bay Area, California, United States Hardware We are seeking an engineer to architect next-generation display technologies for Apple products. In this unique role, you will have first-hand access to novel display innovations and will be responsible for designing display subsystems that integrate seamlessly into Apple devices. Description You will contribute to the development of groundbreaking display solutions by inventing original concepts that redefine visual performance, power efficiency, and system-level integration. Your work will ensure harmonious interaction among critical display module subsystems, including the panel, touch IC, power supply, timing controller, and row- and column-driver ICs. You will also be responsible for drafting display module electrical engineering specifications.This role demands strong collaboration with cross-functional teams to translate theoretical insights into manufacturable hardware. Responsibilities Performing detailed engineering analyses of silicon and system requirements Designing display architectures and prototypes, including bring-up and validation Delivering high-quality electrical hardware architecture specifications for display systems Preparing presentations for cross-functional teams and leadership to review designs and development progress Minimum Qualifications Bachelor's degree in Engineering (BS) with a minimum of three years of relevant industry experience Experience with electrical engineering fundamentals, including analog, mixed-signal, digital design, and power electronics Experience with complex system design and/or analog and mixed-signal circuit design Preferred Qualifications Master's or Ph.D. in a relevant field Hands‑on laboratory experience, including silicon debugging, IC characterization, and system validation Strong mathematical and analytical skills Prior knowledge of display and/or touch hardware and technologies Prior knowledge of analog and mixed‑signal circuit design, including op amps, ADCs, DACs, and power management ICs Experience with system modeling and system‑level integration Expert knowledge of MATLAB, Python, and/or circuit simulation tools Excellent verbal and written communication skills Strong leadership skills to coordinate efforts across Apple teams and external vendors Exceptional attention to detail to ensure error‑free designs and rapid time‑to‑market Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits. Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant. Apple accepts applications to this posting on an ongoing basis. #J-18808-Ljbffr

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. THE ROLE: Adaptive and Embedded Computing Group (AECG) seeks a Senior Silicon Design Verification Engineer to provide technical leadership and expertise in the verification of high-speed Crypto, Network‑on‑Chip (NoC), and cutting‑edge DRAM Memory Controller IPs (LPDDR6, HBM4). You will be responsible for architecting, developing, and utilizing simulation and/or formal‑based verification environments at both block and SoC‑level to achieve first‑pass silicon success. THE PERSON: The ideal candidate has a proven track record in driving strategies and successfully executing verification strategies for Pre‑Silicon Design IP and/or SOC designs. They should be strong team players with excellent communication and leadership skills, capable of positively and strategically influencing design teams to improve overall product quality. Key Responsibilities: Lead the verification of high‑speed Crypto, Network‑on‑Chip (NoC), cutting‑edge DRAM Memory controller (LPDDR6, DDR5) designs, ensuring the highest standards of quality and performance. Architect, develop, and use simulation and/or formal‑based verification environments at IP and SoC‑level. Lead and manage verification teams, including planning, execution, tracking, verification closure, and delivery to programs. Develop and execute comprehensive verification plans, including testbenches and test cases. Collaborate with design, architecture, and software teams to define and implement verification strategies. Utilize advanced verification methodologies, including UVM, formal verification, and assertion‑based verification. Mentor and guide junior engineers, fostering a collaborative and innovative team environment. PREFERRED EXPERIENCE: Proven track record in technical leadership of teams with 5+ engineers. This includes planning, execution, tracking, verification closure, and delivery to programs. Proven track record on driving strategies and successful verification execution of NoC, Crossbar switches, analysed and verified system‑level Performance and QoS (Quality of Service) requirements. Experience with development of UVM and System Verilog test benches and usage of simulation tools/debug environments such as Synopsys VCS or Cadence Xcelium. Require strong understanding of state of the art of verification techniques, including assertion and coverage‑driven verification. Experience as a verification architect, establishing the verification methodology, tools and infrastructure for high‑performance IP and/or VLSI designs is a plus. Familiarity with verification management tools as well as an understanding of database management particularly as it pertains to regression management. Experience with formal property checking tools such as VC Formal (Synopsys), JasperGold (Cadence), and Questa Formal (Mentor) is a plus. Experience with gate‑level simulation, power‑aware verification is a plus. Experience with silicon debug at the tester and board level, is a plus. ACADEMIC CREDENTIALS: BS, MS or PhD in Electrical Engineering, Computer Engineering or Computer Science. This role is not eligible for visa sponsorship. Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's “Responsible AI Policy” is available here. This posting is for an existing vacancy. #J-18808-Ljbffr

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: As a member of the front-end verification team you will be part of a multi-site team to help drive successful verification execution and prove the functional correctness of the next generation of AMD/Xilinx programmable devices. THE PERSON: You have a passion for digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Collaborate with architects, hardware and firmware engineers to understand the new features to be verified Take ownership of block level verification tasks Define test plans, test benches, and tests using System Verilog and UVM Debug RTL and Gate simulations and work with HW and SW development teams to verify fixes Review functional and code coverage metrics to meet the coverage requirements Develop and improve existing verification flows and environments PREFERRED EXPERIENCE: Strong understanding of computer architecture and logic design Knowledge of Verilog, system Verilog and UVM is a must Strong understanding of state of the art verification techniques, including assertion and constraint-random metric-driven verification Working knowledge of C/C++ and Assembly programming languages Exposure to scripting (python preferred) for post-processing and automation Experience with gate level simulation, power and reset verification ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering or a related field LOCATION: San Jose, CA #LI-DW1 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. #J-18808-Ljbffr

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next‑generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE Adaptive and Embedded Computing Group (AECG) seeks a Staff Silicon Design Verification Engineer to provide technical leadership and expertise in the verification of high‑speed Crypto, Network‑on‑Chip (NoC), and cutting‑edge DRAM Memory Controller IPs (LPDDR6, HBM4). You will be responsible for architecting, developing, and utilizing simulation and/or formal‑based verification environments at both block and SoC‑level to achieve first‑pass silicon success. THE PERSON The ideal candidate has a proven track record in driving strategies and successfully executing verification strategies for Pre‑Silicon Design IP and/or SOC designs. They should be strong team players with excellent communication and leadership skills, capable of positively and strategically influencing design teams to improve overall product quality. Key Responsibilities Lead the verification of high‑speed Crypto, Network‑on‑Chip (NoC), cutting‑edge DRAM Memory controller (LPDDR6, HBM4) designs, ensuring the highest standards of quality and performance. Architect, develop, and use simulation and/or formal‑based verification environments at IP and SoC‑level. Lead and manage verification teams, including planning, execution, tracking, verification closure, and delivery to programs. Develop and execute comprehensive verification plans, including testbenches and test cases. Collaborate with design, architecture, and software teams to define and implement verification strategies. Utilize advanced verification methodologies, including UVM, formal verification, and assertion‑based verification. Mentor and guide junior engineers, fostering a collaborative and innovative team environment. Preferred Experience Proven track record in technical leadership of teams with 5+ engineers. This includes planning, execution, tracking, verification closure, and delivery to programs. Experience with development of UVM and System Verilog test benches and usage of simulation tools/debug environments such as Synopsys VCS or Cadence Xcelium. Strong understanding of state of the art of verification techniques, including assertion and metric‑driven verification. Experience as a verification architect, establishing the verification methodology, tools and infrastructure for high‑performance IP and/or VLSI designs is a plus. Familiarity with verification management tools as well as an understanding of database management particularly as it pertains to regression management. Experience with formal property checking tools such as VC Formal (Synopsys), JasperGold (Cadence), and Questa Formal (Mentor) is a plus. Experience with gate‑level simulation, power‑aware verification is a plus. Experience with silicon debug at the tester and board level, is a plus. Academic Credentials BS, MS or PhD in Electrical Engineering, Computer Engineering or Computer Science. This role is not eligible for visa sponsorship. #LI-CJ2 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's “Responsible AI Policy” is available here. This posting is for an existing vacancy. #J-18808-Ljbffr

About Us We are a leading technology and electrical contracting organization specializing in the design, implementation, and support of ICT systems for commercial, industrial, healthcare, government, and mission-critical facilities. Our team delivers innovative technology infrastructure solutions that power connectivity, communication, and security in today's digital-first world. Position Overview The ICT Engineer will play a key role in planning, designing, and implementing network infrastructure, communications technologies, and intelligent building systems. This role requires a strong technical foundation in structured cabling, network systems, wireless technologies, and industry standards, with the ability to collaborate across engineering, field installation, and client teams. Key Responsibilities •Develop ICT infrastructure designs, drawings, and specifications including structured cabling, pathways, and equipment rooms •Support outside plant (OSP) and inside plant (ISP) low-voltage system planning •Create technical documentation, submittals, and as-built packages •Perform site surveys, assessments, and technology audits •Assist in wireless network planning, DAS coordination, and technology integration •Provide engineering support during installation, testing, and commissioning •Ensure compliance with TIA, BICSI, NEC, and relevant standards •Collaborate with project managers, field technicians, engineers, and clients •Troubleshoot ICT-related issues during design and build phases •Participate in QA/QC reviews and support project close-out deliverables Qualifications Required •Bachelor's degree in engineering, Information Technology, Telecommunications, or related field - OR equivalent experience •Strong understanding of ICT design standards (TIA/EIA, BICSI, NEC) •Knowledge of structured cabling, fiber, network hardware, pathways, and grounding •Technical aptitude with network systems, Wi-Fi, DAS, and smart building technology •Excellent documentation, communication, and coordination skills Preferred •BICSI credentials (RCDD, DCDC, TECH, INST, RTPM, etc.) •CCNA, Network+, or similar networking certifications •Experience with CAD, BIM, or modeling tools •Experience in construction or technology integration environments •Familiarity with project management tools and workflows What We Offer •Employee Stock Ownership Plan (ESOP) •Competitive salary •Comprehensive benefits package •Professional growth and certification support (BICSI, manufacturer training, etc.) •Opportunity to work on high-profile technology infrastructure projects •A collaborative culture focused on innovation and continuous improvement Relocation Not Available: Local Candidates Only