Design Engineer jobs at Microchip Technology - 50 jobs

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip's nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it's won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you. Visit our careers page to see what exciting opportunities and company perks await! Job Description: Microchip is seeking an entry-level Applications Engineer to join the ds PIC Micro Controllers (MCU16) group's Applications team. As an entry level Application engineer, responsibilities include representing applications in the product development team to drive the application related activities. They include but not limited to: Silicon peripheral Validation, such as UART, SPI, I2C, PWM, ADC etc. * Developing Demo boards, Application notes * Development of product data sheets and collateral * Supporting customers and field-personal on ds PIC and PIC24F MCU/DSCs * Develop and present training material for Microchip Field Engineers and Microchip customers. Requirements/Qualifications: BSEE/MSEE in Electrical Engineering or Computer Engineering with strong academic achievements and communication skills. * 0-3 years experience * Basic knowledge of hardware components, including circuit design using passive and active components is desired. * Knowledge of C and assembly programming are plus. * Ability to communicate well in both written and verbal forms and presentation skills are desired. * Prior knowledge or work experience in any of the following areas is a plus: * C/assembly Programming of PIC Microcontrollers * Analog application circuit design * Working knowledge with communication channels such as CAN, I2C, SPI, UART, USB Travel Time: No Travel Physical Attributes: Feeling, Hearing, Talking, Works Alone, Works Around Others Physical Requirements: 80% sitting, 10% standing, 10% walking Pay Range: We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature. Find more information about all our benefits at the link below: Benefits of working at Microchip The annual base salary range for this position, which could be performed in the US, is $70,304-$143,000.* * Range is dependent on numerous factors including job location, skills and experience. Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law. For more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster. To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.

We are seeking a skilled DFT Design Engineer to develop and implement comprehensive Design for Test solutions across our semiconductor products. This role involves RTL design, verification, and manufacturing support for various DFx methodologies including SCAN, MBIST, and BSCAN implementations. We are seeking a highly skilled DFT Design Engineer to join our semiconductor engineering team and drive the development of cutting-edge Design for Test solutions across our product portfolio. This critical role combines deep technical expertise in digital design with specialized knowledge of test methodologies to ensure our silicon products meet the highest quality standards for high-volume manufacturing. As a DFT Design Engineer, you will be responsible for architecting, implementing, and optimizing comprehensive test strategies that span from initial RTL development through production manufacturing. You will work at the intersection of design and test, collaborating with cross-functional teams including architecture, verification, physical design, and manufacturing to deliver robust DFT solutions that enable efficient testing while meeting stringent power, performance, and area requirements. The successful candidate will have extensive experience in DFT methodologies and will play a pivotal role in defining test architectures for complex SoCs, developing innovative solutions to challenging testability problems, and ensuring seamless integration of DFT features across multiple design hierarchies. This position offers the opportunity to work on industry-leading semiconductor products and contribute to the advancement of DFT technologies in next-generation computing platforms. This role involves RTL design, verification, and manufacturing support for various DFx methodologies including SCAN, MBIST, and BSCAN implementations, with a focus on achieving optimal test coverage, minimizing defect escape rates, and reducing overall test costs while maintaining design integrity and performance targets. **Key Responsibilities** **Design & Development:** + Develops logic design, register transfer level (RTL) coding, and simulation for DFT implementations + Provides DFT timing closure support and generates test content for manufacturing delivery + Implements various DFx content including SCAN, MBIST, and BSCAN methodologies + Applies strategies, tools, and methods to write and generate RTL and structural code for DFT integration **Architecture & Collaboration:** + Participates in defining architecture and microarchitecture features for blocks, subsystems, and SoCs + Collaborates on DFT design including TAP, SCAN, MBIST, BSCAN, processor monitors, and in-system test/BIST + Integrates DFT blocks into functional IP and SoC while supporting customer integration requirements **Optimization & Verification:** + Optimizes logic design to meet power, performance, area, timing, test coverage, DPM, and test time/vector memory reduction goals + Reviews verification plans and drives DFT design verification to achieve architecture specifications + Ensures design features are verified correctly and implements corrective measures for failing RTL tests **Manufacturing & Production Support:** + Develops HVM (High Volume Manufacturing) content for rapid bring-up and production ramp on ATE (Automatic Test Equipment) + Collaborates with post-silicon and manufacturing teams for silicon verification and debug support + Drives high test coverage through structural and IP-specific tests to achieve quality and DPM objectives + Documents learnings and improvement requirements for design and validation processes **Intel is in the process of securing office space in Fort Collins, Colorado, which will serve as your assigned work location in the future. Once the site is operational, your position will follow Intel's hybrid work model, which currently requires on-site presence at least four days per week. Until the office is ready, you will be classified as a remote employee.** **Qualifications:** **Minimum Qualifications** **Education & Experience:** + Bachelor's degree in Electrical Engineering, Computer Science, or related field with 3+ years of industry experience + OR Master's degree in Electrical Engineering, Computer Science, or related field with 3+ years of industry experience **Technical Requirements:** + 3+ years of experience with DFT (Design for Test) methodologies + 3+ years of experience with Array Test including MBIST (Memory Built-In Self-Test) + Experience in RTL coding, simulation, and verification + Experience in semiconductor manufacturing test processes and ATE systems **Preferred Qualifications** + Expert-level in Tessent DFT tool suite + Advanced expertise in PrimeTime, specifically with DFT constraints and timing analysis + Experience with additional DFT tools and methodologies + Experience in advanced test compression techniques and fault models + Experience with SoC-level DFT integration and customer support + Background in post-silicon validation and debug + Experience in industry test standards and protocols + Experience in test cost optimization and DPM improvement initiatives **Job Type:** Experienced Hire **Shift:** Shift 1 (United States of America) **Primary Location:** Virtual US **Additional Locations:** **Business group:** At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership. Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners. **Posting Statement:** All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. **Position of Trust** N/A **Benefits** We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel (*********************************************************************************** . Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. **Work Model for this Role** This role is available as a fully home-based and generally would require you to attend Intel sites only occasionally based on business need. However, you must live and work from the country specified in the job posting, in which Intel has a legal presence. Due to legal regulations, remote work from any other country is unfortunately not permitted. * Job posting details (such as work model, location or time type) are subject to change.The application window for this job posting is expected to end by 11/28/2025

Do Something Wonderful Intel put the Silicon in Silicon Valley No one else is this obsessed with engineering a brighter future. Every day we create world changing technology that enriches the lives of every person on earth So if you have a big idea lets do something wonderful together. Join us because at Intel we are building a better tomorrow Who We Are Intel Custom SOC Group is looking for a Physical Design Engineering to come and work on the latest server products Who You Are Your responsibilities are as follows but not limited to: + Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing. + Conducts all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis. + Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking. Analyzes results and makes recommendations to fix violations for current and future product architecture. + Possesses expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, placing, routing, synthesis, and DFT using industry standard EDA tools. + Optimizes design to improve product level parameters such as power, frequency, and area. Participates in the development and improvement of physical design methodologies and flow automation. + In addition to the skills listed above the ideal candidate will also have excellent communication, teamwork, and problem-solving skills. As well as a willingness to work independently at various levels of abstraction. The ideal candidate will also have excellent communication, teamwork, and problem-solving skills. Intel is in the process of securing office space in Fort Collins, Colorado. Once the site is operational, your position will follow Intel's hybrid or onsite work model. **Qualifications:** Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications: + Bachelor's Degree in Electrical or Computer Engineering, Computer Science, or in a STEM related field with 6+ years of experience + **-OR-** Master's Degree in Electrical or Computer Engineering, Computer Science, or in a STEM related field with 5+ years of experience + - **OR-** PhD in Electrical or Computer Engineering, Computer Science, or in a STEM related field with 4+ years of experience Preferred Qualifications: + Experience in all aspects of physical design using Synopsys or Cadence tools. + Strong background with industry standard tools for synthesis, place and route, and tape out flows + Technical expertise in physical design verification methods such as timing signoff, formal verification, and low power static signoff. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research. **Job Type:** Experienced Hire **Shift:** Shift 1 (United States of America) **Primary Location:** Virtual US **Additional Locations:** **Business group:** At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership. Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners. **Posting Statement:** All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. **Position of Trust** N/A **Benefits** We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel (*********************************************************************************** . Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. **Work Model for this Role** This role is available as a fully home-based and generally would require you to attend Intel sites only occasionally based on business need. However, you must live and work from the country specified in the job posting, in which Intel has a legal presence. Due to legal regulations, remote work from any other country is unfortunately not permitted. * Job posting details (such as work model, location or time type) are subject to change.The application window for this job posting is expected to end by 01/06/2026

**Do Something Wonderful!** Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Want to learn more? Visit our YouTube Channel (*************************************** or the links below! + Life at Intel (**************************************************************** + Intel Global Diversity and Inclusion **WHO WE ARE:** We are a Custom IP and Silicon engineering team part of Intel's Silicon Engineering Group. The team works on design and verification of cutting edge IP and SoCs geared towards Intel's advanced Data center and AI SoCs. We look to drive major technological and methodological advancements across multiple areas of IP and SoC Design and Verification, looking to set a high bar across the organization and ensure that Intel has a competitive product in the market. **WHO YOU ARE:** As an IP Logic Design Engineer your responsibilities will include but are not limited to: + Designing and/or integrating IP for Intel's Custom Silicon solutions. + You will be working or assisting in architecture, design, implementation, formal verification, emulation and validation. + Creating a design to produce key assets that help improve product KPIs for discrete graphics products. + Working with SoC Architecture and platform architecture teams to establish silicon requirements. + Making appropriate design trade off balancing risk, area, power, performance, validation complexity and schedule. + Creating micro architectural specification document for the design. + Working with external vendors on tools or IPs required for the development of micro-architecture, design and design qualification of custom silicon designs. + Driving vendor's methodology to meet world class silicon design standards. + Architecting area and power efficient low latency designs with scalabilities and flexibilities. + Power and Area efficient RTL logic design and DV support. + Running tools to ensure lint-free and CDC/RDC clean design, VCLP. + Synthesis and timing constraints. + Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. **Qualifications:** You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. **Minimum Qualifications:** Bachelor's degree in Computer Science, Electrical Engineering, Computer Engineering, or a related field with 3+ years of relevant experience - or - Master's degree in the same fields with 2+ years of relevant experience - or - PhD in the same fields. Relevant work experience should be of the following: + Experience with complex IP/ASIC/SOC Design Implementation. + Experience in system and processor architecture. + Experience with System Verilog/SOC development environment. Preferred Qualifications: + Experience in scripting languages (i.e. PERL, TCL, or Python). + Experience with Hardware validation techniques (i.e. formal Verification, Test and Function Verification). + Experience designing and implementing complex blocks like CPUs, GPU, Media blocks, and Memory controller. + Experience in leading small team of engineers. + Experience with Industry standard protocols (i.e. PCIE, USB, DDR, etc). + Experience with interaction of computer hardware with software. + Experience with Low power/UPF implementation/verification techniques. + Experience with Formal verification techniques. **Job Type:** Experienced Hire **Shift:** Shift 1 (United States of America) **Primary Location:** Virtual US **Additional Locations:** **Business group:** At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership. Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners. **Posting Statement:** All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. **Position of Trust** N/A **Benefits** We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel (*********************************************************************************** . Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. **Work Model for this Role** This role is available as a fully home-based and generally would require you to attend Intel sites only occasionally based on business need. However, you must live and work from the country specified in the job posting, in which Intel has a legal presence. Due to legal regulations, remote work from any other country is unfortunately not permitted. * Job posting details (such as work model, location or time type) are subject to change.The application window for this job posting is expected to end by 08/31/2026

Job Details:Job Description: Foundry Services Intel Foundry is a systems foundry dedicated to transforming the global semiconductor industry by delivering cutting-edge silicon process and packaging technology leadership for the AI era. With a focus on scalability, AI advancement, and shaping the future, we provide an unparalleled blend of an industry-leading technology, a rich IP portfolio, a world-class design ecosystem, and an operationally resilient global manufacturing supply chain. Position Overview The Aerospace, Defense & Government (ADG) Memory Design Application Engineer provides specialized technical support to Intel Foundry Services customers on memory compiler generation and integration challenges. This critical role ensures successful customer tape-outs by resolving complex memory IP integration issues, driving quality improvements in memory collaterals, and delivering comprehensive technical guidance on memory design methodologies for advanced semiconductor applications. Key Responsibilities Memory IP Technical Support & Integration Provide comprehensive technical support to Intel Foundry Services customers on memory compiler generation and integration issues Collaborate with internal Intel teams and external stakeholders including foundry customers' design teams, Memory IP providers, and EDA vendors on foundational IP integration issue resolution Drive resolution of customer issues related to memory IP collaterals, ensuring seamless integration and optimal performance Technical Content Development & Training Create application notes, comprehensive documentation, and deliver technical training presentations to customers and internal teams Drive quality improvements in design kits, Memory IP collaterals, and documentation to remove barriers to successful customer design tape-outs Develop best practice guidelines for memory integration across advanced process technologies and customer applications Memory Design Methodology & Problem Solving Lead debugging and problem-solving activities in collaborative team environments Provide technical expertise on memory compiler design, generation, and optimization Support customers through complex memory design challenges and advanced integration requirements Drive methodology improvements to enhance memory design productivity and reliability Customer Engagement & Technical Excellence Deliver customer-facing technical support with focus on memory design and integration solutions Ensure maximum customer satisfaction through expert guidance on memory IP implementation Support aerospace, defense, and government customers with specialized memory requirements and security considerations Core Competencies Self-driven and results-oriented with capability to effectively manage multiple complex tasks Effective communicator with strong interpersonal and leadership capabilities, fostering collaboration across cross-functional teams and providing constructive feedback Qualifications: The Minimum qualifications are required to be considered for this position. Minimum qualifications listed below would be obtained through a combination of industry relevant job experience, internship experience and / or schoolwork/classes/research. The preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates Minimum Qualifications US Citizenship required Ability to obtain a US Government Security Clearance Bachelor's degree in Electrical Engineering, Computer Science, or in a STEM related field of study 3+ years of experience with Memory design or Memory Compiler development and implementation Preferred Qualifications: Active US Government Security Clearance with a minimum of Secret level Post Graduate degree in Electrical Engineering, Computer Science, or in a STEM related field of study Proficient in common memory types, including SRAM, Register Files (RF), and ROM, with a solid understanding of CMOS digital circuit design principles Knowledgeable in both behavioral and physical modeling of memory architectures, supporting accurate simulation and verification Hands-on experience with customer support in at least one of the following domains: Memory Design, Memory Compiler Design, eFUSE and anti FUSE and MBIST Experience with IP development is a strong plus Proficient in scripting languages like Perl/Tcl/Python, and power-aware RTL and UPF flow is a plus Experience in ASIC or SoC development What We Offer Opportunity to work with cutting-edge memory technologies for aerospace, defense, and government applications Direct customer engagement and technical leadership in advanced memory design Access to Intel's most advanced foundry technologies and comprehensive memory IP portfolio Competitive compensation Professional development in memory design methodologies and foundry services Direct impact on national security through advanced memory semiconductor solutions Job Type:Experienced HireShift:Shift 1 (United States of America) Primary Location: US, Arizona, PhoenixAdditional Locations:US, California, Santa Clara, US, Oregon, HillsboroBusiness group:The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

Intel's Discrete Graphics Engineering (DGE) organization develops cutting-edge discrete graphics products for gaming and AI. If you are an engineer with strong technical and communication skills who thrives in a fast-paced environment with abundant learning opportunities, you are the ideal candidate for this role You will be responsible for designing and/or integrating IP for a discrete graphics SoC. You will be working or assisting in architecture, design, implementation, formal verification, emulation and validation of discrete graphics SoC products, including: + Creating a design to produce key assets that help improve product KPIs for discrete graphics products + Working with SoC Architecture and platform architecture teams to establish silicon requirements + Making appropriate design trade off balancing risk, area, power, performance, validation complexity and schedule + Creating micro architectural specification document for the design. + Working with external vendors on tools or IPs required for the development of micro-architecture, design and design qualification of custom silicon designs. + Driving vendor's methodology to meet world class silicon design standards + Architecting area and power efficient low latency designs with scalabilities and flexibilities + Power and Area efficient RTL logic design and DV support + Running tools to ensure lint-free and CDC/RDC clean design, VCLP + Synthesis and timing constraints + Having achieved multiple tape-outs reaching production with first pass silicon + Ability to drive and improve digital design methodology to achieve high quality first silicon Hands on experience with FPGA emulation, silicon bring-up, characterization and debug + Able to work with multi-functional teams within Intel and external vendors across geographical boundaries to resolve architectural and implementation challenges with a focus on schedule + Strong verbal and written communication skills Good understanding of verilog and system verilog, synthesizable RTL + Knowledgeable in modern design techniques and energy-efficient/low power logic design and power analysis + Familiarity with power estimation (vector-less and vector-based), modeling, profiling, and post silicon power correlation + Background in computer architecture + Bus fabric, including, but not limited to APB/AHB/AXI + Power management with multiple power domains, UPF, Power state tables. + Knowledge of lint tools, CDC and RDC tools, timing constraints, fishtail. + Knowledge of connectivity tools. + Understanding of key SoC design elements, arbiters, async FIFOs, DMAs, basic Controllers. + Comprehension of asynchronous clock crossing means and methodologies + Proven track record of bringing logic designs into high volume production + Ability to work well in a team and be productive under ambitious schedules + Should be self-motivated and well organized **Qualifications:** + BS+5 Years of relevant industry experience **Job Type:** Experienced Hire **Shift:** Shift 1 (United States of America) **Primary Location:** US, California, Santa Clara **Additional Locations:** US, Arizona, Phoenix, US, California, Folsom, US, Oregon, Hillsboro **Business group:** The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. **Posting Statement:** All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. **Position of Trust** This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter. **Benefits** We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel (*********************************************************************************** . Annual Salary Range for jobs which could be performed in the US: $220,920.00-311,890.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. **Work Model for this Role** This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Intel's Discrete Graphics Engineering (DGE) organization develops cutting-edge discrete graphics products for gaming and AI. If you are an engineer with strong technical and communication skills who thrives in a fast-paced environment with abundant learning opportunities, you are the ideal candidate for this role You will be responsible for designing and/or integrating IP for a discrete graphics SoC. You will be working or assisting in architecture, design, implementation, formal verification, emulation and validation of discrete graphics SoC products, including: * Creating a design to produce key assets that help improve product KPIs for discrete graphics products * Working with SoC Architecture and platform architecture teams to establish silicon requirements * Making appropriate design trade off balancing risk, area, power, performance, validation complexity and schedule * Creating micro architectural specification document for the design. * Working with external vendors on tools or IPs required for the development of micro-architecture, design and design qualification of custom silicon designs. * Driving vendor's methodology to meet world class silicon design standards * Architecting area and power efficient low latency designs with scalabilities and flexibilities * Power and Area efficient RTL logic design and DV support * Running tools to ensure lint-free and CDC/RDC clean design, VCLP * Synthesis and timing constraints * Having achieved multiple tape-outs reaching production with first pass silicon * Ability to drive and improve digital design methodology to achieve high quality first silicon Hands on experience with FPGA emulation, silicon bring-up, characterization and debug * Able to work with multi-functional teams within Intel and external vendors across geographical boundaries to resolve architectural and implementation challenges with a focus on schedule * Strong verbal and written communication skills Good understanding of verilog and system verilog, synthesizable RTL * Knowledgeable in modern design techniques and energy-efficient/low power logic design and power analysis * Familiarity with power estimation (vector-less and vector-based), modeling, profiling, and post silicon power correlation * Background in computer architecture * Bus fabric, including, but not limited to APB/AHB/AXI * Power management with multiple power domains, UPF, Power state tables. * Knowledge of lint tools, CDC and RDC tools, timing constraints, fishtail. * Knowledge of connectivity tools. * Understanding of key SoC design elements, arbiters, async FIFOs, DMAs, basic Controllers. * Comprehension of asynchronous clock crossing means and methodologies * Proven track record of bringing logic designs into high volume production * Ability to work well in a team and be productive under ambitious schedules * Should be self-motivated and well organized Qualifications: * BS+5 Years of relevant industry experience Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, California, Santa Clara Additional Locations: US, Arizona, Phoenix, US, California, Folsom, US, Oregon, Hillsboro Business group: The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $220,920.00-311,890.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. Work Model for this Role This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at ************** and on LinkedIn and Twitter (X). Senior Digital Design Engineer Minimum Degree Required Bachelor's Degree Career Level Non-Manager - Experienced (4+ years exp) Job Description Analog Devices Inc. is seeking a Senior-Level Digital Design Engineer to verify and design integrated circuits and support assigned products through the full product life cycle in the Power Solutions Group located in Chandler, AZ. Emphasis will be mainly on design, though verification assignments will also be available on an as-needed basis. Responsibilities may include, but are not limited to: Definition of interfaces, state machines, and controlling logic required to implement new products in a wide range of application spaces RTL digital design and problem solving Digital synthesis, place-and-route supervision, including STA, LEC, GLS, etc. tasks as needed by the project Development of directed and constrained random test cases in SystemVerilog Minimum Qualifications BSEE + 4 years or MSEE + 2 years Digital IC Design experience. Strong written and verbal communication skills. Strong general coding and documentation skills. SystemVerilog fluency in design. Experience with a scripting language (Perl, Python, C, etc.) Fundamental understanding of UVM Ability to own and drive assignments to completion with little supervision. Hands-on development, implementation, and validation of FPGA, including synthesis, timing closure, and system integration. Ability to learn and master the full digital verification process (eventually covering all areas of experience listed below). Analog Devices Inc is an equal opportunity employer and gives consideration for employment to qualified applicants without regard to race, color, religion, sex, national origin, disability or protected veteran status. Preferred Qualifications Working experience with custom digital interfaces (I2C, SPI, UART, etc.). Design experience with custom state machines and control logic for use with analog circuits such as linear regulators, DC-DC converters, data converters, and mixed signal processing functions. RTL design for synchronous applications, including multiple clock domains (asynchronous design experience a plus). Logic synthesis, interfacing with place & route staff, static timing analysis, logic equivalency checking, etc. Design for test, scan insertion, ATPG, functional test vectors, etc. Mixed-signal simulation (Cadence AMS), interfacing with analog functions (Verilog-AMS or real number modeling experience a plus). System Verilog Assertion for Dynamic and Formal Verification. Verification test plan creation, coverage closure, test case, and regression suite development. Advanced knowledge of complex IC verification techniques (SystemVerilog/UVM). For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position - except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) - may have to go through an export licensing review process. Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group. EEO is the Law: Notice of Applicant Rights Under the Law. Job Req Type: ExperiencedRequired Travel: Yes, 10% of the time Shift Type: 1st Shift/Days

We are seeking a senior skilled DFT Design Engineer to develop and implement comprehensive Design for Test solutions across our semiconductor products. This role involves RTL design, verification, and manufacturing support for various DFx methodologies including SCAN, MBIST, and BSCAN implementations. We are seeking a highly skilled DFT Design Engineer to join our semiconductor engineering team and drive the development of cutting-edge Design for Test solutions across our product portfolio. This critical role combines deep technical expertise in digital design with specialized knowledge of test methodologies to ensure our silicon products meet the highest quality standards for high-volume manufacturing. As a Senior DFT Design Engineer, you will be responsible for architecting, implementing, and optimizing comprehensive test strategies that span from initial RTL development through production manufacturing. You will work at the intersection of design and test, collaborating with cross-functional teams including architecture, verification, physical design, and manufacturing to deliver robust DFT solutions that enable efficient testing while meeting stringent power, performance, and area requirements. The successful candidate will have extensive experience in DFT methodologies and will play a pivotal role in defining test architectures for complex SoCs, developing innovative solutions to challenging testability problems, and ensuring seamless integration of DFT features across multiple design hierarchies. This position offers the opportunity to work on industry-leading semiconductor products and contribute to the advancement of DFT technologies in next-generation computing platforms. This role involves RTL design, verification, and manufacturing support for various DFx methodologies including SCAN, MBIST, and BSCAN implementations, with a focus on achieving optimal test coverage, minimizing defect escape rates, and reducing overall test costs while maintaining design integrity and performance targets. **Key Responsibilities** **Design & Development:** + Develops logic design, register transfer level (RTL) coding, and simulation for DFT implementations + Provides DFT timing closure support and generates test content for manufacturing delivery + Implements various DFx content including SCAN, MBIST, and BSCAN methodologies + Applies strategies, tools, and methods to write and generate RTL and structural code for DFT integration **Architecture & Collaboration:** + Participates in defining architecture and microarchitecture features for blocks, subsystems, and SoCs + Collaborates on DFT design including TAP, SCAN, MBIST, BSCAN, processor monitors, and in-system test/BIST + Integrates DFT blocks into functional IP and SoC while supporting customer integration requirements **Optimization & Verification:** + Optimizes logic design to meet power, performance, area, timing, test coverage, DPM, and test time/vector memory reduction goals + Reviews verification plans and drives DFT design verification to achieve architecture specifications + Ensures design features are verified correctly and implements corrective measures for failing RTL tests **Manufacturing & Production Support:** + Develops HVM (High Volume Manufacturing) content for rapid bring-up and production ramp on ATE (Automatic Test Equipment) + Collaborates with post-silicon and manufacturing teams for silicon verification and debug support + Drives high test coverage through structural and IP-specific tests to achieve quality and DPM objectives + Documents learnings and improvement requirements for design and validation processes **Intel is in the process of securing office space in Fort Collins, Colorado, which will serve as your assigned work location in the future. Once the site is operational, your position will follow Intel's hybrid work model, which currently requires on-site presence at least four days per week. Until the office is ready, you will be classified as a remote employee.** **Qualifications:** **Minimum Qualifications** **Education & Experience:** + Bachelor's degree in Electrical Engineering, Computer Science, or related field with 4+ years of industry experience or Master's degree in Electrical Engineering, Computer Science, or related field with 3+ years of industry experience **Technical Requirements:** + 5+ years of hands-on experience with DFT (Design for Test) methodologies + 5+ years of experience with Array Test including MBIST (Memory Built-In Self-Test) + Experience in RTL coding, simulation, and verification + Experience in semiconductor manufacturing test processes and ATE systems **Preferred Qualifications** + Expert-level proficiency in Tessent DFT tool suite + Advanced expertise in PrimeTime, specifically with DFT constraints and timing analysis + Experience with additional DFT tools and methodologies + Knowledge of advanced test compression techniques and fault models + Experience with SoC-level DFT integration and customer support + Background in post-silicon validation and debug + Familiarity with industry test standards and protocols + Experience in test cost optimization and DPM improvement initiatives **Job Type:** Experienced Hire **Shift:** Shift 1 (United States of America) **Primary Location:** Virtual US **Additional Locations:** **Business group:** At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership. Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners. **Posting Statement:** All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. **Position of Trust** N/A **Benefits** We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel (*********************************************************************************** . Annual Salary Range for jobs which could be performed in the US: $141,910.00-269,100.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. **Work Model for this Role** This role is available as a fully home-based and generally would require you to attend Intel sites only occasionally based on business need. However, you must live and work from the country specified in the job posting, in which Intel has a legal presence. Due to legal regulations, remote work from any other country is unfortunately not permitted. * Job posting details (such as work model, location or time type) are subject to change.The application window for this job posting is expected to end by 11/28/2025

Change the world. Love your job. In your first year with TI, you will participate in the Career Accelerator Program (CAP), which provides professional and technical training and resources to accelerate your ramp into TI and set you up for long-term career success. Within this program, we also offer function-specific technical training and on-the-job learning opportunities that will encourage you to solve problems through a variety of hands-on, meaningful experiences from your very first day on the job. As an Analog Design Engineer you will create integrated circuit designs that help bring new TI products to life and make our customers' visions a reality. You'll define, design, model, implement and document analog, digital and/or RF integrated circuits (ICs). And, you'll have the opportunity to work in exciting areas like audio, imaging, high-speed, interface, clocking, medical, high volume linear, automotive, storage, power supply, battery management, linear power and many more. As an Analog Design Engineer, you will help define and then design, simulate, and implement analog integrated circuits in silicon. You'll be working on state-of-the-art wafer processes and learning from and collaborating with industry experts. Understanding the various aspects of product development will help you become a better designer. You will spend time performing typical ""front-end"" design activities such as designing and drawing the schematics, simulating for functionality and parametric performance, and assisting in the IC layout and then running post-layout extracted simulations. You'll also gain exposure to other ""back-end"" activities such as bench characterization, final test, and failure analysis. This is a great way to apply knowledge from your circuit design coursework and see how designs progress in the real world. As part of your job, you will also get exposure to other roles such as: Design Verification& Digital Design through formal learning, projects and on-the-job development experiences that will help you broaden your knowledge and accelerate your growth and success at TI. Put your talent to work with us as an Analog Design Engineer! Minimum requirements: * Master's or PhD degree in Electrical Engineering, Computer Engineering, or Electrical and Computer Engineering or related field * Cumulative 3.0/4.0 GPA or higher Preferred qualifications: * Ability to establish strong relationships with key stakeholders critical to success, both internally and externally * Strong verbal and written communication skills * Ability to quickly ramp on new systems and processes * Demonstrated strong interpersonal, analytical and problem-solving skills * Ability to work in teams and collaborate effectively with people in different functions * Ability to take the initiative and drive for results * Strong time management skills that enable on-time project delivery Minimum requirements: * Master's or PhD degree in Electrical Engineering, Computer Engineering, or Electrical and Computer Engineering or related field * Cumulative 3.0/4.0 GPA or higher Preferred qualifications: * Ability to establish strong relationships with key stakeholders critical to success, both internally and externally * Strong verbal and written communication skills * Ability to quickly ramp on new systems and processes * Demonstrated strong interpersonal, analytical and problem-solving skills * Ability to work in teams and collaborate effectively with people in different functions * Ability to take the initiative and drive for results * Strong time management skills that enable on-time project delivery

Change the world. Love your job. In your first year with TI, you will participate in the Career Accelerator Program (CAP), which provides professional and technical training and resources to accelerate your ramp into TI and set you up for long-term career success. Within this program, we also offer function-specific technical training and on-the-job learning opportunities that will encourage you to solve problems through a variety of hands-on, meaningful experiences from your very first day on the job. As an Analog Design Engineer you will create integrated circuit designs that help bring new TI products to life and make our customers' visions a reality. You'll define, design, model, implement and document analog, digital and/or RF integrated circuits (ICs). And, you'll have the opportunity to work in exciting areas like audio, imaging, high-speed, interface, clocking, medical, high volume linear, automotive, storage, power supply, battery management, linear power and many more. As an Analog Design Engineer, you will help define and then design, simulate, and implement analog integrated circuits in silicon. You'll be working on state-of-the-art wafer processes and learning from and collaborating with industry experts. Understanding the various aspects of product development will help you become a better designer. You will spend time performing typical ""front-end"" design activities such as designing and drawing the schematics, simulating for functionality and parametric performance, and assisting in the IC layout and then running post-layout extracted simulations. You'll also gain exposure to other ""back-end"" activities such as bench characterization, final test, and failure analysis. This is a great way to apply knowledge from your circuit design coursework and see how designs progress in the real world. As part of your job, you will also get exposure to other roles such as: Design Verification& Digital Design through formal learning, projects and on-the-job development experiences that will help you broaden your knowledge and accelerate your growth and success at TI. Put your talent to work with us as an Analog Design Engineer! Minimum requirements: * Master's or PhD degree in Electrical Engineering, Computer Engineering, or Electrical and Computer Engineering or related field * Cumulative 3.0/4.0 GPA or higher Preferred qualifications: * Ability to establish strong relationships with key stakeholders critical to success, both internally and externally * Strong verbal and written communication skills * Ability to quickly ramp on new systems and processes * Demonstrated strong interpersonal, analytical and problem-solving skills * Ability to work in teams and collaborate effectively with people in different functions * Ability to take the initiative and drive for results * Strong time management skills that enable on-time project delivery Minimum requirements: * Master's or PhD degree in Electrical Engineering, Computer Engineering, or Electrical and Computer Engineering or related field * Cumulative 3.0/4.0 GPA or higher Preferred qualifications: * Ability to establish strong relationships with key stakeholders critical to success, both internally and externally * Strong verbal and written communication skills * Ability to quickly ramp on new systems and processes * Demonstrated strong interpersonal, analytical and problem-solving skills * Ability to work in teams and collaborate effectively with people in different functions * Ability to take the initiative and drive for results * Strong time management skills that enable on-time project delivery

**Change the world. Love your job.** In your first year with TI, you will participate in the Career Accelerator Program (CAP), which provides professional and technical training and resources to accelerate your ramp into TI and set you up for long-term career success. Within this program, we also offer function-specific technical training and on-the-job learning opportunities that will encourage you to solve problems through a variety of hands-on, meaningful experiences from your very first day on the job. As an Analog Design Engineer you will create integrated circuit designs that help bring new TI products to life and make our customers' visions a reality. You'll define, design, model, implement and document analog, digital and/or RF integrated circuits (ICs). And, you'll have the opportunity to work in exciting areas like audio, imaging, high-speed, interface, clocking, medical, high volume linear, automotive, storage, power supply, battery management, linear power and many more. As an Analog Design Engineer, you will help define and then design, simulate, and implement analog integrated circuits in silicon. You'll be working on state-of-the-art wafer processes and learning from and collaborating with industry experts. Understanding the various aspects of product development will help you become a better designer. You will spend time performing typical ""front-end"" design activities such as designing and drawing the schematics, simulating for functionality and parametric performance, and assisting in the IC layout and then running post-layout extracted simulations. You'll also gain exposure to other ""back-end"" activities such as bench characterization, final test, and failure analysis. This is a great way to apply knowledge from your circuit design coursework and see how designs progress in the real world. As part of your job, you will also get exposure to other roles such as: Design Verification& Digital Design through formal learning, projects and on-the-job development experiences that will help you broaden your knowledge and accelerate your growth and success at TI. Put your talent to work with us as an Analog Design Engineer! **Why TI?** + Engineer your future. We empower our employees to truly own their career and development. Come collaborate with some of the smartest people in the world to shape the future of electronics. + We're different by design. Diverse backgrounds and perspectives are what push innovation forward and what make TI stronger. We value each and every voice, and look forward to hearing yours. Meet the people of TI (*************************************** UI/CandidateExperience/en/sites/CX/pages/4012) + Benefits that benefit you. We offer competitive pay and benefits designed to help you and your family live your best life. Your well-being is important to us. **About Texas Instruments** Texas Instruments Incorporated (Nasdaq: TXN) is a global semiconductor company that designs, manufactures and sells analog and embedded processing chips for markets such as industrial, automotive, personal electronics, communications equipment and enterprise systems. At our core, we have a passion to create a better world by making electronics more affordable through semiconductors. This passion is alive today as each generation of innovation builds upon the last to make our technology more reliable, more affordable and lower power, making it possible for semiconductors to go into electronics everywhere. Learn more at TI.com . Texas Instruments is an equal opportunity employer and supports a diverse, inclusive work environment. All qualified applicants will receive consideration for employment without regard to race, color, religion, creed, disability, genetic information, national origin, gender, gender identity and expression, age, sexual orientation, marital status, veteran status, or any other characteristic protected by federal, state, or local laws. If you are interested in this position, please apply to this requisition. **Minimum requirements:** + Master's or PhD degree in Electrical Engineering, Computer Engineering, or Electrical and Computer Engineering or related field + Cumulative 3.0/4.0 GPA or higher **Preferred qualifications:** + Ability to establish strong relationships with key stakeholders critical to success, both internally and externally + Strong verbal and written communication skills + Ability to quickly ramp on new systems and processes + Demonstrated strong interpersonal, analytical and problem-solving skills + Ability to work in teams and collaborate effectively with people in different functions + Ability to take the initiative and drive for results + Strong time management skills that enable on-time project delivery **ECL/GTC Required:** Yes

Change the world. Love your job. Texas Instruments (TI) is out front and ready for the next big challenge. Our innovations are at the core of nearly every electronics product in use today. And it doesn't stop there. We're developing breakthrough technology to power the world's future innovations as well. TI is committed to building a better future - from the responsible manufacturing of our semiconductors, to caring for our employees, to giving back inside our communities. Put your talent to work with us. This is a great opportunity to be part of an established team that's continuing to look for growth opportunities, working with worldwide leading customers and developing cutting edge solutions in the areas of consumer electronics, mobile computing and communications. In this role, responsibilities may include: * Lead an Analog IC design team with product ownership and responsibility from definition to release to manufacturing * Direct, guide and participate in activities of a research or technical design function responsible for designing, developing, modifying and evaluating electronic parts, components, integrated circuits for a variety of applications * Make assignments for team members, providing design guidance as needed, developing schedules and monitoring progress throughout the project * Evaluate intermediate and final results of projects during the design phase and during silicon evaluation, to ensure accomplishment of technical objectives * Work with and provide guidance to physical designers and monitors the progress of IC layout * Collaborate with Design Verification teams during the pre-PG phase of a project to ensure completion of all technical tasks before PG * Work with systems engineers, application engineers and marketing to prepare product briefs, datasheets, application notes and assisting in the definition of the product to meet customer needs as well as contributing to roadmap formulation and new concept creation * Collaborate with validation, product engineering and test engineering teams to enable successful transfer to production * Interface and lead discussions with the customer and/or TI field sales/field applications teams to understand customer designs, problems and support as required * Actively participate in hiring, developing and evaluating personnel to ensure efficient operation of the organization and growth of the individuals into leader Minimum requirements: * Bachelors degree in Electrical Engineering or related * 7+ years of relevant experience Preferred qualifications: * Ability to establish strong relationships with key stakeholders critical to success, both internally and externally * Strong verbal and written communication skills * Ability to quickly ramp on new systems and processes * Demonstrated strong interpersonal, analytical and problem-solving skills * Ability to work in teams and collaborate effectively with people in different functions * Ability to take the initiative and drive for results * Strong time management skills that enable on-time project delivery Minimum requirements: * Bachelor's degree in Electrical Engineering or related * 7+ years of relevant experience Preferred qualifications: * Ability to establish strong relationships with key stakeholders critical to success, both internally and externally * Strong verbal and written communication skills * Ability to quickly ramp on new systems and processes * Demonstrated strong interpersonal, analytical and problem-solving skills * Ability to work in teams and collaborate effectively with people in different functions * Ability to take the initiative and drive for results * Strong time management skills that enable on-time project delivery

Change the world. Love your job. Texas Instruments (TI) is out front and ready for the next big challenge. Our innovations are at the core of nearly every electronics product in use today. And it doesn't stop there. We're developing breakthrough technology to power the world's future innovations as well. TI is committed to building a better future - from the responsible manufacturing of our semiconductors, to caring for our employees, to giving back inside our communities. Put your talent to work with us. This is a great opportunity to be part of an established team that's continuing to look for growth opportunities, working with worldwide leading customers and developing cutting edge solutions in the areas of consumer electronics, mobile computing and communications. In this role, responsibilities may include: Lead an Analog IC design team with product ownership and responsibility from definition to release to manufacturing Direct, guide and participate in activities of a research or technical design function responsible for designing, developing, modifying and evaluating electronic parts, components, integrated circuits for a variety of applications Make assignments for team members, providing design guidance as needed, developing schedules and monitoring progress throughout the project Evaluate intermediate and final results of projects during the design phase and during silicon evaluation, to ensure accomplishment of technical objectives Work with and provide guidance to physical designers and monitors the progress of IC layout Collaborate with Design Verification teams during the pre-PG phase of a project to ensure completion of all technical tasks before PG Work with systems engineers, application engineers and marketing to prepare product briefs, datasheets, application notes and assisting in the definition of the product to meet customer needs as well as contributing to roadmap formulation and new concept creation Collaborate with validation, product engineering and test engineering teams to enable successful transfer to production Interface and lead discussions with the customer and/or TI field sales/field applications teams to understand customer designs, problems and support as required Actively participate in hiring, developing and evaluating personnel to ensure efficient operation of the organization and growth of the individuals into leader Minimum requirements: Bachelor's degree in Electrical Engineering or related 7+ years of relevant experience Preferred qualifications: Ability to establish strong relationships with key stakeholders critical to success, both internally and externally Strong verbal and written communication skills Ability to quickly ramp on new systems and processes Demonstrated strong interpersonal, analytical and problem-solving skills Ability to work in teams and collaborate effectively with people in different functions Ability to take the initiative and drive for results Strong time management skills that enable on-time project delivery

Change the world. Love your job. In your first year with TI, you will participate in the Career Accelerator Program (CAP), which provides professional and technical training and resources to accelerate your ramp into TI and set you up for long-term career success. Within this program, we also offer function-specific technical training and on-the-job learning opportunities that will encourage you to solve problems through a variety of hands-on, meaningful experiences from your very first day on the job. As an Analog Design Engineer you will create integrated circuit designs that help bring new TI products to life and make our customers' visions a reality. You'll define, design, model, implement and document analog, digital and/or RF integrated circuits (ICs). And, you'll have the opportunity to work in exciting areas like audio, imaging, high-speed, interface, clocking, medical, high volume linear, automotive, storage, power supply, battery management, linear power and many more. As an Analog Design Engineer, you will help define and then design, simulate, and implement analog integrated circuits in silicon. You'll be working on state-of-the-art wafer processes and learning from and collaborating with industry experts. Understanding the various aspects of product development will help you become a better designer. You will spend time performing typical ""front-end"" design activities such as designing and drawing the schematics, simulating for functionality and parametric performance, and assisting in the IC layout and then running post-layout extracted simulations. You'll also gain exposure to other ""back-end"" activities such as bench characterization, final test, and failure analysis. This is a great way to apply knowledge from your circuit design coursework and see how designs progress in the real world. As part of your job, you will also get exposure to other roles such as: Design Verification& Digital Design through formal learning, projects and on-the-job development experiences that will help you broaden your knowledge and accelerate your growth and success at TI. Put your talent to work with us as an Analog Design Engineer! Minimum requirements: Master's or PhD degree in Electrical Engineering, Computer Engineering, or Electrical and Computer Engineering or related field Cumulative 3.0/4.0 GPA or higher Preferred qualifications: Ability to establish strong relationships with key stakeholders critical to success, both internally and externally Strong verbal and written communication skills Ability to quickly ramp on new systems and processes Demonstrated strong interpersonal, analytical and problem-solving skills Ability to work in teams and collaborate effectively with people in different functions Ability to take the initiative and drive for results Strong time management skills that enable on-time project delivery

Job Details:Job Description: Foundry Services Intel Foundry is a systems foundry dedicated to transforming the global semiconductor industry by delivering cutting-edge silicon process and packaging technology leadership for the AI era. With a focus on scalability, AI advancement, and shaping the future, we provide an unparalleled blend of an industry-leading technology, a rich IP portfolio, a world-class design ecosystem, and an operationally resilient global manufacturing supply chain. Position Overview We seek a DFT Application Engineer to provide technical support to Intel Foundry Services customers on PDKs, DFT/DFM insertion, and ATPG validation methodologies. This critical role supports Aerospace, Defense, and Government (ADG) customers in achieving successful tape-outs while ensuring the highest quality standards through comprehensive DFT solutions and customer engagement. Key Responsibilities Customer Technical Support & Collaboration Provide comprehensive DFT tool/flow/methodology support to address customer issues and challenges, ensuring successful tape-outs and maximum customer satisfaction Work closely with internal Intel teams and external stakeholders including foundry customers' design teams, IP providers, and EDA vendors to resolve complex technical issues Deliver customer-facing technical support and guidance on DFT implementation strategies DFT Methodology & Quality Leadership Drive quality improvements in ASIC DFT/DFM and ATPG validation methodology, capability/flow, and documentation for both block-level and SoC-level implementations Collaborate with RTL and Hard IP designers on DFT/DFM implementation methodology and work with physical designers on DFT/DFM physical implementation, validation, and timing signoff Develop and optimize DFT insertion flows for advanced CMOS processes and multi-die designs Technical Content Development & Training Develop application notes, comprehensive documentation, and deliver technical training presentations to customers and internal teams Create best practice guidelines and methodology documentation for DFT implementation across various design complexities Support knowledge transfer and capability building for both internal teams and customer organizations Essential Skills & Attributes Customer-Focused: Strong customer-oriented attitude and mindset with commitment to customer success Self-Motivated: Self-driven and results-oriented with ability to manage multiple complex tasks effectively Collaborative: Excellent teamwork skills to drive innovative solutions for customer design implementation challenges Analytical: Strong analytical problem-solving capabilities for complex DFT challenges Communication: Effective communication skills with experience in collaboration, active listening, and providing constructive technical feedback Qualifications: The Minimum qualifications are required to be considered for this position. Minimum qualifications listed below would be obtained through a combination of industry relevant job experience, internship experience and / or schoolwork/classes/research. The preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications US Citizenship required Ability to obtain US Government Security Clearance Bachelor's degree in Electrical Engineering, Computer Engineering, or STEM-related field 3+ years of experience with advanced CMOS processes (22nm and below) 3+ years of combined experience in the following: implementing ASIC DFT/DFM insertion (MBIST, LBIST, SCAN, JTAG) at both ASIC design block level and full chip level, including ATPG validation and DFT timing/signoff at SOC level 2+ years of experience in one or more of the following scripting languages (Python, Perl, Tcl, and/or shell scripting) Preferred Qualifications Active US Government Security Clearance with a minimum of Secret Level. Post-graduate degree in Electrical/Computer Engineering or STEM-related field Hands-on experience in Design Implementation and methodology (ASIC design, Fullchip Integration, Design Signoff, LVS, DRC, DFX/DFM, Reliability Proficiency with major EDA tools for MBIST insertion, hierarchical SCAN and JTAG insertion, DFT constraint generation and ATPG validation for single die and multi-die designs Experience building/developing quality DFT/DFX insertion flow and ATPG validation flow Experience providing technical direction to engineering teams and customer support Customer-facing experience in technical roles Experience with state-of-the-art process technology (7nm and below) and PDK-based technology evaluation What We Offer Opportunity to work with cutting-edge DFT technologies for aerospace, defense, and government applications Direct customer engagement and technical leadership in advanced semiconductor design Access to Intel's most advanced foundry technologies and comprehensive EDA tool suites Competitive compensation Professional development in DFT methodologies and foundry services Direct impact on national security through advanced semiconductor technology solutions Job Type:Experienced HireShift:Shift 1 (United States of America) Primary Location: US, Arizona, PhoenixAdditional Locations:US, California, Santa Clara, US, Oregon, HillsboroBusiness group:The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:Job Description: Foundry Services Intel Foundry is a systems foundry dedicated to transforming the global semiconductor industry by delivering cutting-edge silicon process and packaging technology leadership for the AI era. With a focus on scalability, AI advancement, and shaping the future, we provide an unparalleled blend of an industry-leading technology, a rich IP portfolio, a world-class design ecosystem, and an operationally resilient global manufacturing supply chain. Position Overview The Aerospace, Defense & Government (ADG) IP Enablement Application Engineer provides comprehensive technical support to Intel Foundry Services customers on IP integration challenges. This dynamic role requires a versatile engineer who engages with IP design teams and internal/external customers across all phases of IP development - from architecture through post-silicon validation and debug. The position embodies customer obsession by quickly resolving issues and providing hands-on debug across all design domains. Key Responsibilities IP Integration & Customer Support Provide comprehensive technical support to Intel Foundry Services customers on IP integration issues, working independently with design teams and customers to solve complex challenges remotely or onsite Fully own assigned IPs and work with internal and external customers to help them integrate Intel IPs into SoCs, providing expert technical support throughout the integration process Drive resolution of customer issues related to IP collaterals generation, logic design verification, IP release, and integration in SoC environments Cross-Functional Collaboration & IP Development Work with cross-functional teams to develop SoC and IP integration methodologies and best practices Engage with IP development teams to ensure all IP collaterals are generated and provided according to customer requirements and industry standards Collaborate with internal teams across Intel and external stakeholders including foundry customers' design teams, IP providers, and EDA vendors on foundational IP integration issue resolution Customer Requirements & Training Engage in upfront identification and documentation of customer requirements, working with IP design teams to disposition and address requests Prepare comprehensive customer training materials and provide training on IP architecture, specifications, and fuse/register settings to enable effective debug Create application notes, documentation, and deliver technical training presentations to customers and internal teams Quality & Process Improvement Drive quality improvements in design kits and documentation, assisting in removing barriers to successful customer design tape-outs Support debugging and problem-solving activities in collaborative team environments Contribute to methodology improvements that enhance IP integration productivity and customer satisfaction Core Competencies Strong technical problem-solving and debugging capabilities Ability to work independently and manage customer relationships effectively Excellent communication skills for technical training and customer support Willingness to travel to customer sites as required Qualifications: The Minimum qualifications are required to be considered for this position. Minimum qualifications listed below would be obtained through a combination of industry relevant job experience, internship experience and / or schoolwork/classes/research. The preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates Minimum Qualifications US Citizenship required Ability to obtain a US Government Security Clearance Bachelor's degree in Electrical Engineering, Computer Science, or in a STEM related field of study 2+ years of experience in SOC IP Integration 3+ years of combined experience in RTL design and DFT using Verilog/System Verilog Experience in ASIC or SoC development Preferred Qualifications: Active US Government Security Clearance with a minimum of Secret level Post Graduate degree in Electrical Engineering, Computer Science, or in a STEM related field of study Experience with one or more industry standard IO interfaces including (ADPLL, GPIO, Digital Thermal Sensors, DDR, LPDDR, PCIE, USB, USB TypeC, Ethernet, etc.) Experience with VCS, Verdi, Spyglass or equivalent tools Experience with IP integration and design flow challenges within the context of subsystems and SOCs Experience with IP development Experience in scripting languages like such as Perl/Tcl/ and Python What We Offer Opportunity to work with cutting-edge memory technologies for aerospace, defense, and government applications Direct customer engagement and technical leadership in advanced memory design Access to Intel's most advanced foundry technologies and comprehensive memory IP portfolio Competitive compensation Professional development in memory design methodologies and foundry services Direct impact on national security through advanced memory semiconductor solutions Job Type:Experienced HireShift:Shift 1 (United States of America) Primary Location: US, Arizona, PhoenixAdditional Locations:US, California, Santa Clara, US, Oregon, HillsboroBusiness group:The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:Job Description: Foundry Services Intel Foundry is a systems foundry dedicated to transforming the global semiconductor industry by delivering cutting-edge silicon process and packaging technology leadership for the AI era. With a focus on scalability, AI advancement, and shaping the future, we provide an unparalleled blend of an industry-leading technology, a rich IP portfolio, a world-class design ecosystem, and an operationally resilient global manufacturing supply chain. Position Overview The Aerospace, Defense & Government (ADG) IP Enablement Application Engineer provides comprehensive technical support to Intel Foundry Services customers on IP integration challenges. This dynamic role requires a versatile engineer who engages with IP design teams and internal/external customers across all phases of IP development - from architecture through post-silicon validation and debug. The position embodies customer obsession by quickly resolving issues and providing hands-on debug across all design domains. Key Responsibilities IP Integration & Customer Support Provide comprehensive technical support to Intel Foundry Services customers on IP integration issues, working independently with design teams and customers to solve complex challenges remotely or onsite Fully own assigned IPs and work with internal and external customers to help them integrate Intel IPs into SoCs, providing expert technical support throughout the integration process Drive resolution of customer issues related to IP collaterals generation, logic design verification, IP release, and integration in SoC environments Cross-Functional Collaboration & IP Development Work with cross-functional teams to develop SoC and IP integration methodologies and best practices Engage with IP development teams to ensure all IP collaterals are generated and provided according to customer requirements and industry standards Collaborate with internal teams across Intel and external stakeholders including foundry customers' design teams, IP providers, and EDA vendors on foundational IP integration issue resolution Customer Requirements & Training Engage in upfront identification and documentation of customer requirements, working with IP design teams to disposition and address requests Prepare comprehensive customer training materials and provide training on IP architecture, specifications, and fuse/register settings to enable effective debug Create application notes, documentation, and deliver technical training presentations to customers and internal teams Quality & Process Improvement Drive quality improvements in design kits and documentation, assisting in removing barriers to successful customer design tape-outs Support debugging and problem-solving activities in collaborative team environments Contribute to methodology improvements that enhance IP integration productivity and customer satisfaction Core Competencies Strong technical problem-solving and debugging capabilities Ability to work independently and manage customer relationships effectively Excellent communication skills for technical training and customer support Willingness to travel to customer sites as required Qualifications: The Minimum qualifications are required to be considered for this position. Minimum qualifications listed below would be obtained through a combination of industry relevant job experience, internship experience and / or schoolwork/classes/research. The preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates Minimum Qualifications US Citizenship required Ability to obtain a US Government Security Clearance Bachelor's degree in Electrical Engineering, Computer Science, or in a STEM related field of study 2+ years of experience in SOC IP Integration 3+ years of combined experience in RTL design and DFT using Verilog/System Verilog Experience in ASIC or SoC development Preferred Qualifications: Active US Government Security Clearance with a minimum of Secret level Post Graduate degree in Electrical Engineering, Computer Science, or in a STEM related field of study Experience with one or more industry standard IO interfaces including (ADPLL, GPIO, Digital Thermal Sensors, DDR, LPDDR, PCIE, USB, USB TypeC, Ethernet, etc.) Experience with VCS, Verdi, Spyglass or equivalent tools Experience with IP integration and design flow challenges within the context of subsystems and SOCs Experience with IP development Experience in scripting languages like such as Perl/Tcl/ and Python What We Offer Opportunity to work with cutting-edge memory technologies for aerospace, defense, and government applications Direct customer engagement and technical leadership in advanced memory design Access to Intel's most advanced foundry technologies and comprehensive memory IP portfolio Competitive compensation Professional development in memory design methodologies and foundry services Direct impact on national security through advanced memory semiconductor solutions Job Type:Experienced HireShift:Shift 1 (United States of America) Primary Location: US, Arizona, PhoenixAdditional Locations:US, California, Santa Clara, US, Oregon, HillsboroBusiness group:The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

AMHS Principal Engineer TSMC is the world's leading semiconductor foundry, pioneering advanced chip manufacturing technologies that power the future of electronics. Our cutting-edge 4-nanometer fab in Phoenix, Arizona represents our commitment to expanding US-based semiconductor production and technological innovation. Our employees must demonstrate a strong sense of reliability and enthusiasm and possess an attitude that embodies our core values - Integrity, Commitment, Innovation and Customer Trust. Job Summary As an AMHS Principal Engineer, you will be part of a senior role dedicated to solving complex construction challenges in automated material handling systems. This role involves overseeing the construction and installation of different AMHS (Automated Material Handling System) cutting-edge systems and related control software. The ideal candidate for this role must have strong technical capability and possess excellent verbal and written communication. Must be data driven and have strong project management capabilities to support AMHS installation and construction projects. The responsibilities also include vendor management and coordination to ensure projects are completed timely and accurately. Essential Functions The AMHS Principal Engineer will perform various duties, including, but not limited to, the following: Vendor Management & Technical Leadership Oversee Vendor Management: Ensure the successful installation, integration, and ongoing maintenance of AMHS hookups in support of TSMC's factory ramp-up initiatives Monitor compliance with TSMC safety standards, OSHA regulations, and adherence to efficient material management practices Lead a small team to manage different technical projects Coordinate and oversee vendor activities to ensure performance optimization and meet project timelines Review Technical Documentation and Provide Feedback: Conduct in-depth reviews of technical specifications and deliver constructive feedback to equipment suppliers to drive enhancements, particularly in error recovery procedures Collaborate with manufacturing sites to sustain high-performance AMHS operations and disseminate best practices Project Planning & Execution Develop Comprehensive Project Plans: Lead the development of detailed project plans specific to the AMHS system, including defining timelines, milestones, deliverables, and cost structures, while ensuring alignment with organizational priorities and factory ramp schedules Monitor AMHS Project Progress and Performance: Regularly track and assess the progress of AMHS-related initiatives, proactively identifying potential bottlenecks, risks, or resource gaps Escalate critical concerns to senior stakeholders or project sponsors as necessary to ensure seamless execution Manage Dynamic Priorities and Multiple Projects: Demonstrate agility by managing shifting priorities in a high-paced environment Lead multiple concurrent AMHS-related projects with potentially overlapping deadlines, ensuring on-time delivery of all commitments without compromising quality Cross-Functional Collaboration & Integration Facilitate Cross-Organizational Collaboration: Partner with cross-functional teams across engineering, operations, and manufacturing to define and deliver AMHS project objectives, ensuring alignment on scope, resources, and timelines Foster open communication to streamline inter-departmental workflows Drive Integration and Workflow Optimization: Coordinate with key internal and external stakeholders to ensure the smooth integration of AMHS systems into broader project deliverables Continuously evaluate AMHS workflows and identify process improvement opportunities to enhance operational efficiency Risk Mitigation and Resolution: Identify and analyze risks specifically related to AMHS operations and implementation that could impact project success Implement mitigation strategies and facilitate consistent communication between stakeholders to ensure a proactive approach to risk management Required Qualifications Applicants must be legally eligible to work in the United States Bachelor's degree or higher in Electrical Engineering, Mechanical Engineering, Automation Engineering, Construction Engineering, Building Science, Construction Science, or Civil Engineering 5+ years of experience in automated material handling systems, industrial automation, or robotics or similar higher technology manufacturing equipment Proven track record of leading technical aspects of large-scale AMHS deployments, constructions, and optimization projects Hands-on experience with AMHS solutions in sectors such as logistics, semiconductor manufacturing, or warehousing automation Strong mechanical aptitude, project management experience, and system design proficiency, with the ability to manage multiple projects simultaneously Exceptional communication and interpersonal abilities to effectively collaborate within cross-functional and geographically dispersed teams Proven ability to prioritize tasks in response to changing business needs, multitask effectively, and perform as a team player in dynamic, fast-paced environments Proficiency in Excel, MS Project, SQL, Power BI and Microsoft PowerPoint Strong organizational skills and attention to detail Willingness to take on additional responsibilities as required to support evolving business priorities Working Environment Physical Requirements Ability to work in a clean room environment wearing proper clean room garments (full cleanroom suit, protective eyewear, gloves, hood, and mask) Must be able to work with computers extensively while remaining sedentary in an office environment throughout the shift Visual acuity for reading technical documents and analyzing data Manual dexterity for operating tools and equipment Experience with equipment such as ladders, scaffolding, or elevated work platforms. Ability to Walk Long Distances: This role involves walking long distance between different construction areas and fabs. The position requires the ability to work safely and effectively at heights of approximately 6 feet or more as needed during assigned tasks Comfortable and physically able to perform duties requiring standing, bending, and reaching while elevated Work environment may involve noisy or high-risk settings in industrial or manufacturing facilities Benefits As a valued member of the TSMC family, we place a significant focus on your health and well-being. When you are at your best-physically, mentally, and financially-our company is at its best. We offer a comprehensive and competitive benefits program that provides the resources you need to help you manage your health and achieve your goals across many areas of your life, including: Variety of medical, dental and vision plan offerings Income-protection programs for injury or illness 401(k)-retirement savings plan Competitive paid time-off programs and paid holidays Work Location: 5088 W. Innovation Circle, Phoenix, AZ 85083 Training Location: Onsite in Phoenix, AZ TSMC is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, age, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other protected characteristic. We encourage all qualified individuals to apply and welcome applications from diverse backgrounds and experiences. Candidates must be able to perform the essential functions of the job with or without reasonable accommodation. If you need an accommodation as part of the application process, please contact P_************. #LI-Onsite