Product Quality Engineer jobs at Philips - 52 jobs

**About Us:** TD Quality and Reliability is at the forefront of driving innovative solutions and fostering a culture of excellence in quality and reliability for Intel. Our mission is to drive innovative quality, reliability technology solutions and culture for Intel. We are pioneers in developing industry-leading risk assessment methodologies and physics-based models to accurately predict component quality and reliability performance. **Role Overview:** The TD Memory Quality and Reliability team, a key component of the TD Quality and Reliability module team, focuses on ensuring the quality and reliability of memory arrays and IP. This includes leading-edge technology certification and characterization, process validation, design guidance, product EOL DPM projection, and reliability management. We are seeking a Senior TD Memory Quality and Reliability Engineer to lead technical efforts and provide expertise guidance across various areas of responsibility. **Key Responsibilities:** + Lead technology Vccmin and/or fuse certification efforts to meet the needs of both internal and foundry customers. + Investigate and understand reliability failure mechanisms and the underlying physics. + Analyze test chip Vccmin and/or fuse data to identify trends and potential issues, providing feedback to the process on conversion decisions and driving processes to meet certification requirements. + Characterize SRAM memory bit cell margin and noise; perform Sil2Sim for product design guidance. Characterize fuse programming and read margin. + Develop and enhance statistical modeling methods for Vccmin reliability. Engage and lead effort in Cert method definition/update for Vccmin/fuse. + Collaborate with cross-functional teams to ensure quality and reliability standards are met throughout the product lifecycle. + Communicate project status, technical findings, and recommendations to stakeholders, including process/LYA, device, design, and customers. + Drive continuous improvement initiatives to enhance quality and reliability processes and methodologies. + Provide technical leadership and mentorship to junior engineers and team members. **Behavior Traits:** + Proven ability to work with cross-functional teams and drive results. + Professional communication skills. + Excellent problem-solving skills and tolerance for ambiguity. **Note:** This role requires regular onsite presence to fulfill essential job responsibilities. **Qualifications:** You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidate **Minimum Qualifications:** + Ph.D. in Electrical Engineering, Material Science, Physics, or a related field, with 3+ years of relevant experience in semiconductor device physics and data analysis. + **-OR-** Masters in Electrical Engineering, Material Science, Physics, or a related field, with 6+ years of relevant experience in semiconductor device physics and data analysis. Relevant experience in semiconductor device physics must include any of the following: + Proficient in using JMP. + Demonstrated knowledge of memory array design and testing. + Experience in quality and reliability methods and modeling. **Preferred Qualifications:** + Proficiency in scripting languages such as Python or JSL. + Experience in statistical modeling. **Job Type:** Experienced Hire **Shift:** Shift 1 (United States of America) **Primary Location:** US, California, Folsom **Additional Locations:** US, California, Santa Clara, US, Oregon, Hillsboro **Business group:** Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth. **Posting Statement:** All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. **Position of Trust** N/A **Benefits** We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel (*********************************************************************************** . Annual Salary Range for jobs which could be performed in the US: $180,770.00-298,440.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. **Work Model for this Role** This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change. * ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

NVIDIA is hiring software engineers for its Deep Learning Frameworks Sustaining Engineering team. Our team produces software that's powering a revolution in deep learning, enabling breakthroughs in problems from image classification to speech recognition to natural language processing! Help us build software which will be used by the entire world by working directly with deep learning framework developers by integrating with open source code bases. What you'll be doing: In this role, responsibilities will include back-porting changes from the mainline branch, keeping track of open source dependency changes, and ensuring the latest stable dependencies are being used for our enterprise products. You will actively contribute changes to the team to support timely Long Term Support releases for the TensorFlow, PyTorch, TensorRT products. The scope of these efforts includes fixing customer reported bugs, integrating bug fixes found in mainline and working with other teams to ensure open source dependencies are patched for security vulnerabilities to address the needs of NVIDIA AI Enterprise business subscribers. What we need to see: Bachelors of Science in Computer Science, Deep Learning, Artificial Intelligence, Applied Math, or related field or equivalent experience. 5+ years of relevant software development experience Excellent C/C++ programming and software design skills, including debugging and open source integration. Python experience also helpful. Utilizing tools involved in building software (Make, Docker, Bazel), packaging systems (Debian, pip, npm, etc.), Build Systems (Gitlab, CI/Jenkins). Prior experience with machine learning algorithms and frameworks (TensorFlow, PyTorch, or MXNet). Ability to work independently, contribute to the stability of releases, and effectively communicate status to those involved in the release in a detail-oriented way. Ways to stand out from the crowd: GPU programming experience (CUDA or OpenCL) desired but not required Experience with contributions to or managing large open source project - use of github, bug tracking, branching and merging code, OSS licensing issues, managing patches, etc. Familiarity with Gitlab CI pipelines NVIDIA is widely considered to be one of the technology world's most desirable employers. We have some of the most forward-thinking and hardworking people on the planet working for us. If you're creative and autonomous, we want to hear from you! Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 152,000 USD - 218,500 USD for Level 3, and 184,000 USD - 287,500 USD for Level 4. You will also be eligible for equity and benefits. Applications for this job will be accepted at least until January 13, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

NVIDIA is hiring software engineers for its Deep Learning Frameworks Sustaining Engineering team. Our team produces software that's powering a revolution in deep learning, enabling breakthroughs in problems from image classification to speech recognition to natural language processing! Help us build software which will be used by the entire world by working directly with deep learning framework developers by integrating with open source code bases. What you'll be doing: In this role, responsibilities will include back-porting changes from the mainline branch, keeping track of open source dependency changes, and ensuring the latest stable dependencies are being used for our enterprise products. You will actively contribute changes to the team to support timely Long Term Support releases for the TensorFlow, PyTorch, TensorRT products. The scope of these efforts includes fixing customer reported bugs, integrating bug fixes found in mainline and working with other teams to ensure open source dependencies are patched for security vulnerabilities to address the needs of NVIDIA AI Enterprise business subscribers. What we need to see: * Bachelors of Science in Computer Science, Deep Learning, Artificial Intelligence, Applied Math, or related field or equivalent experience. * 5+ years of relevant software development experience * Excellent C/C++ programming and software design skills, including debugging and open source integration. Python experience also helpful. * Utilizing tools involved in building software (Make, Docker, Bazel), packaging systems (Debian, pip, npm, etc.), Build Systems (Gitlab, CI/Jenkins). * Prior experience with machine learning algorithms and frameworks (TensorFlow, PyTorch, or MXNet). * Ability to work independently, contribute to the stability of releases, and effectively communicate status to those involved in the release in a detail-oriented way. Ways to stand out from the crowd: * GPU programming experience (CUDA or OpenCL) desired but not required * Experience with contributions to or managing large open source project - use of github, bug tracking, branching and merging code, OSS licensing issues, managing patches, etc. * Familiarity with Gitlab CI pipelines NVIDIA is widely considered to be one of the technology world's most desirable employers. We have some of the most forward-thinking and hardworking people on the planet working for us. If you're creative and autonomous, we want to hear from you! Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 152,000 USD - 218,500 USD for Level 3, and 184,000 USD - 287,500 USD for Level 4. You will also be eligible for equity and benefits. Applications for this job will be accepted at least until January 13, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

Job Details:Job Description: Join Intel's Foundry Technology Development Yield Team as a Yield Development Systems Engineer. Are you passionate about innovation and results-driven in the semiconductor industry? Intel's Foundry Technology Development Yield organization is seeking a dynamic Yield Development Systems Engineer to join our team. This is an exciting opportunity to work at the forefront of semiconductor manufacturing, where your expertise will contribute to developing cutting-edge solutions for our foundry customers. Why Intel? At Intel, we offer competitive compensation, comprehensive benefits, and opportunities for professional growth. Join us and be part of a team that is shaping the future of technology. About Us: Intel is a global leader in semiconductor technology, driving innovation and excellence in everything we do. Our Foundry Technology Development Yield team is dedicated to delivering high-quality, end-to-end solutions that meet the evolving needs of our customers. We foster a collaborative and fast-paced environment where flexibility and adaptability are key to success. Role Overview: As a Yield Systems Development Engineer, with a software emphasis, you will play a critical role in optimizing and maintaining metrology systems for development and manufacturing. You will collaborate closely with equipment development, operations, automation, and manufacturing teams to enhance yield systems and ensure product integrity. Key Responsibilities: Perform statistical analysis and develop visualizations to construct accurate process development roadmaps. Develop methods and systems to analyze diverse big data sources, leading to yield modeling and process roadmap definition. Develop and maintain systems that enable faster interpretation of fab process, defect, and electrical data to drive process changes for yield enhancement. Apply statistics, machine learning, and coding techniques to extract insights from large volumes of data. Transform experimental and manufacturing data into yield improvement actions. Ensure manufacturability over process and product design through thorough analysis. Execute new product introductions and participate in design of experiments. Develop tools and algorithms for high-volume data analysis to identify yield limiters. Harden equipment systems to meet operational needs for leading-edge logic nodes. Develop AI/ML applications to improve patterning solutions and design efficiency. Collaborate with internal teams to ensure data integrity and implement custom algorithms. Qualifications: Minimum Requirements US Citizenship required. Ability to obtain and maintain an US Government TS Security Clearance with SCI access. Bachelor's degree with 4+ years, or Master's degree with 2+ years, or PhD in Engineering or Science disciplines such as Software Engineering, Computer Science Engineering, Electrical, Applied Physics, Chemistry, Materials Science, or Chemical Engineering. Experience with software coding (i.e. Python, JSL, HTML, etc.) with an emphasis in ML/AI. 1+ years of experience in semiconductor processing, devices, circuits, or nanotechnology. 2+ years of experience in maintaining semiconductor equipment in a FAB or Lab. Preferred Qualifications: Active US Government TS/SCI Security Clearance with Polygraph. Experience in Laser Optics, Scanning Electron Microscopy, Digital Signal Processing, and Image Processing. Experience with Statistical Process Control (SPC) or Design of Experiments (DOE) principles. Experience with high degree of customer service mindset and experience working with external and internal partners. Experience in technical documentation, training, and project management. Apply Now: If you're ready to take on this exciting challenge and contribute to Intel's success, we encourage you to apply. #cj Job Type:Experienced HireShift:Shift 1 (United States of America) Primary Location: US, Arizona, PhoenixAdditional Locations:Business group:Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $120,860.00-231,670.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. Work Model for this Role This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Details:Job Description: Are you passionate about pioneering the future of advanced packaging technologies and driving innovation in materials science? Join Intel's cutting-edge team as a Substrate Material and Process Development Engineer, where you'll play a pivotal role in developing revolutionary substrate material, processes that enable Intel's roadmap for next-generation packaging platform technologies. This is your opportunity to work at the forefront of semiconductor innovation, applying novel concepts and innovative solutions that will shape the future of computing. As a Substrate Material and Process Development Engineer, you will be instrumental in developing Substrate material, process while applying groundbreaking concepts for innovative solutions. You'll optimize manufacturing efficiency, develop processes that meet stringent quality and reliability requirements, and lead efforts in problem-solving and continuous improvement using experimental design and statistical methods. Your expertise will directly contribute to Intel's mission of delivering world-class packaging technologies. Why Join Us? This is your chance to be part of a team that's revolutionizing semiconductor packaging technologies and making a global impact. You'll work with cutting-edge materials and processes while collaborating with world-class engineers to solve tomorrow's challenges today. Ready to shape the future of advanced packaging? Apply now and join our mission to drive innovation in materials science and process development! Key Responsibilities: Define substrate materials roadmap to enable leading edge packaging technologies. Develop material and process specifications applying principles of design of experiments and data analysis and document improvements through white papers. Work with material vendor for new material development to meet Intel process capability and performance target. Innovate new process concepts and validate process flow for HVM applications. Qualify new materials and processes with comprehensive characterization plans Optimize and improve the efficiency of manufacturing of packages, developing material/processes to meet quality, reliability, cost, yield, productivity and manufacturability requirements Drive continuous improvement projects and problem-solving efforts Collaborate with cross-functional teams throughout all project phases Provide excellent communication Skills to navigate uncertainties Ability to work in a matrixed environment with smooth stakeholder interactions Responsible and commitment with a can-do attitude Travel and flexibility to meet business needs Qualifications: You must possess the below minimum requirements to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates. Requirements listed can be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research. Minimum Qualifications: Bachelor's with 6 years of experience or Master's degree in 4 years of experience or PhD with 2+ years of relevant experience in Polymer Science and Engineering, polymer physics, Materials Science, Chemical Engineering, or related science and engineering fields. 2+ years of experience in polymer synthesis or advanced packaging and assembly processes Preferred Qualifications: 4+ years of experience in polymer synthesis, materials development, and materials science fundamentals 4+ years of advanced packaging and assembly process experience Materials characterization skills (SEM, FTIR, TMA, DMA, DSC, TGA, SIMS, mechanical testing) Experience in tool and process PCS, data analysis, statistical tools and methods Job Type:Experienced HireShift:Shift 1 (United States of America) Primary Location: US, Arizona, PhoenixAdditional Locations:Business group:Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $133,800.00-255,200.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change. * ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

**Introduction** At IBM Research, we are the innovation engine of IBM. Exploring what's next in computing and shaping the technologies the world will rely on tomorrow. From advancing AI and hybrid cloud to pioneering practical quantum computing, we anticipate challenges and unlock new opportunities for clients, partners, and society. Working in Research means joining a team that accelerates discovery at the intersection of high-performance computing, AI, quantum, and cloud. You'll collaborate with leading scientists, engineers, and visionaries to push boundaries and turn ideas into reality. With a culture built on curiosity, creativity, and collaboration, IBM Research offers the opportunity to grow your career while contributing to breakthroughs that transform industries and change the world. **Your role and responsibilities** The Advanced Planarization Processes group is seeking a chemical mechanical planarization (CMP) process engineer to drive the research, development and optimization of planarization technologies supporting current and future nanoscale devices and integration schemes. The successful candidate will develop new CMP processes working in a dynamic R&D environment that uses an interdisciplinary approach-combining materials science, surface science, electrochemistry, and physical characterization-to create and optimize processes for CMOS and interconnect fabrication at upcoming technology nodes through both internal collaboration and external partnership projects. In addition, the process engineer will work closely with wafer lot owners and subject experts in lithography, plasma processing, electrodeposition, and other semiconductor processes to enable end‑to‑end module integration. They will lead fabrication of novel device structures-including those for Quantum, AI, and magnetic random‑access memory (MRAM). Strong communication skills, familiarity with semiconductor processes and tool operations, active engagement in a collaborative team environment, and the ability to provide technical leadership in processing are all critical for success in this role. **Required technical and professional expertise** * BS or MS in chemistry, physical chemistry, chemical engineering, surface science, or related field. * Prior wafer handling experience * Semiconductor processing experience. **Preferred technical and professional experience** * 3-5 years Prior wafer-level, semiconductor processing experience. IBM is committed to creating a diverse environment and is proud to be an equal-opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, gender, gender identity or expression, sexual orientation, national origin, caste, genetics, pregnancy, disability, neurodivergence, age, veteran status, or other characteristics. IBM is also committed to compliance with all fair employment practices regarding citizenship and immigration status.

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology-and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent. As an NVIDIAN, you'll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. We are seeking a highly skilled and motivated FA engineer to join us. You will play a leading role developing Chip-Debug and Fault-Isolation via Optical-Fault-Isolation and emerging techniques like scanning-focused-X-ray (XADA). This will include experimentation, guiding development of custom supporting HW, workflow development, and training of other users. You will be embedded in the Logic-Fault-Isolation group and work closely with our test HW group, mechanical design and tool vendors. What You'll Be Doing: Lead the enablement of XADA and existing NIR and Thermal OFI tools for future technology nodes based on experimentation with different test-chips and existing products, to get ready for future product support. You will need to understand our optical FI workflow and work with our PFA team to guide sample-preparation development. Your responsibilities will include workflow development, user training and collaboration with the XADA tool vendors, driving SW & HW improvements and new feature development. Additionally, you will work with nvidia internal HW designers and external vendors regarding development of suitable test- and cooling-HW. What We Need To See: Master's degree or higher in Electrical Engineering, Microelectronics, Physics, or a related field (or equivalent experience). Minimum of 12 years of experience in FA, at best with hand-on experience in technique enablement and development of supporting HW for Fault-Isolation. Knowledge of failure analysis techniques and methodologies. Basic understanding of scan-chain based test (DFT) and some experience in operation Automated Test Equipment (at best on Advantest 93k and/or Teradyne UFP). Strong understanding of semiconductor device physics, IC design, and fabrication processes. Experience with EDA (Electronic Design Automation) tools and layout editing software. Strong problem-solving skills with the ability to diagnose and resolve complex circuit issues. Ways To Stand Out From The Crowd: Excellent written and verbal communication skills, with the ability to effectively collaborate with multi-functional teams. Ability to work effectively in a team-oriented environment, as well as independently when necessary. Experience in advanced technology nodes (e.g. 2nm or below). Familiarity with scripting languages for automation of processes/workflows. With highly competitive salaries and a comprehensive benefits package, NVIDIA is widely considered to be one of the technology world's most desirable employers. We have some of the most forward-thinking and hardworking people on the planet working for us. If you're creative and autonomous, with a genuine passion for technology, we want to hear from you. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 5, and 200,000 USD - 322,000 USD for Level 6. You will also be eligible for equity and benefits. Applications for this job will be accepted at least until January 13, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology-and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent. As an NVIDIAN, you'll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. We are seeking a highly skilled and motivated FA engineer to join us. You will play a leading role developing Chip-Debug and Fault-Isolation via Optical-Fault-Isolation and emerging techniques like scanning-focused-X-ray (XADA). This will include experimentation, guiding development of custom supporting HW, workflow development, and training of other users. You will be embedded in the Logic-Fault-Isolation group and work closely with our test HW group, mechanical design and tool vendors. What You'll Be Doing: * Lead the enablement of XADA and existing NIR and Thermal OFI tools for future technology nodes based on experimentation with different test-chips and existing products, to get ready for future product support. * You will need to understand our optical FI workflow and work with our PFA team to guide sample-preparation development. * Your responsibilities will include workflow development, user training and collaboration with the XADA tool vendors, driving SW & HW improvements and new feature development. * Additionally, you will work with nvidia internal HW designers and external vendors regarding development of suitable test- and cooling-HW. What We Need To See: * Master's degree or higher in Electrical Engineering, Microelectronics, Physics, or a related field (or equivalent experience). * Minimum of 12 years of experience in FA, at best with hand-on experience in technique enablement and development of supporting HW for Fault-Isolation. * Knowledge of failure analysis techniques and methodologies. * Basic understanding of scan-chain based test (DFT) and some experience in operation Automated Test Equipment (at best on Advantest 93k and/or Teradyne UFP). * Strong understanding of semiconductor device physics, IC design, and fabrication processes. * Experience with EDA (Electronic Design Automation) tools and layout editing software. * Strong problem-solving skills with the ability to diagnose and resolve complex circuit issues. Ways To Stand Out From The Crowd: * Excellent written and verbal communication skills, with the ability to effectively collaborate with multi-functional teams. * Ability to work effectively in a team-oriented environment, as well as independently when necessary. * Experience in advanced technology nodes (e.g. 2nm or below). * Familiarity with scripting languages for automation of processes/workflows. With highly competitive salaries and a comprehensive benefits package, NVIDIA is widely considered to be one of the technology world's most desirable employers. We have some of the most forward-thinking and hardworking people on the planet working for us. If you're creative and autonomous, with a genuine passion for technology, we want to hear from you. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 5, and 200,000 USD - 322,000 USD for Level 6. You will also be eligible for equity and benefits. Applications for this job will be accepted at least until January 13, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

Description - External About TI Texas Instruments Incorporated (TI) is a global semiconductor design and manufacturing company that develops analog ICs and embedded processors. By employing the world's brightest minds, TI creates innovations that shape the future of technology. TI is helping about 100,000 customers transform the future, today. We're committed to building a better future - from the responsible manufacturing of our semiconductors, to caring for our employees, to giving back inside our communities and developing great minds. Put your talent to work with us - change the world, love your job! About the job As a Resolution Enhancement Techniques (RET) modeling engineer, you'll create and optimize OPC models for Texas Instruments' most advanced technology nodes. Models will include both lithography and etch-based models. Responsibilities will include, but are not limited to: Partnering with design, process engineering and process integration teams to define design shapes needed for building accurate models. Designing parameterized mask layouts needed for model building inputs. Investigating and implementing ML and AI methods for improving model accuracy and runtime. Implementing advanced optimization techniques. Working with process engineering and process integration teams on wafer verification to validate model quality. Working with OPC verification engineers to improve the accuracy of post-OPC verification models. These include but are not limited to weak image, assist feature printing, and resist top-loss models. Troubleshooting photolithographic patterning related issues related to OPC modeling for all fabs within TI. Developing and maintaining a suite of model quality checks for unit testing. These include but are not limited to grid checks, stability tests, OPC convergence tests, and ghost contour checks. Developing models that can support multi-patterning approaches such as SADP and LELE. The person performing this role must be capable to plan effectively, drive schedules, meet critical deadlines on multiple tasks in parallel, lead technical discussions in their area of expertise, and work effectively across organizational boundaries. They must be able to clearly communicate project status and actions. Additionally, they must be able to interface with multiple organizations and work well on a diverse team to accomplish goals. Qualifications Qualifications - External Minimum requirements: Masters in Electrical Engineering, Physics, Computer Science, Chemistry or related degree. 10 + years experience in OPC modeling in advanced node lithography. Expertise in selecting and optimizing the features needed for properly sampling design spaces for building accurate models. Expertise in developing test requirements to validate OPC modeling solutions. Strong knowledge/understanding of advanced lithography simulation and RET techniques used in semiconductor manufacturing and process development. Preferred qualifications: Ability to lead and drive advanced processes associated with double patterning techniques in 22 nm node development. Expertise in Synopsys ProGen modeling software. Demonstrated knowledge of OPC verification software packages such as ORC, LMC+, or PLRC. Knowledge of critical care-abouts for 28 and 22 nm node processing. Familiarity with physical layout (gds/oas). Knowledge of litho/OPC test pattern design and layout execution using test pattern generators and use of layout software such as Cadence Virtuoso or KLayout. Programming experience in Unix environment. Understanding of OPC pattern validation methodologies and process window assessment techniques like KLA's Photolithography Wafer Qualification (PWQ). Demonstrated strong analytical and problem solving skills. Strong verbal and written communication skills. Ability to work in teams and collaborate effectively with people in different functions. Strong time management skills that enable on-time project delivery. Demonstrated ability to build strong, influential relationships. Ability to work effectively in a fast-paced and rapidly changing environment. Ability to take the initiative and drive for results.

Being responsible for SRAM memory device development, you will join a small development team with talented and driven contributors to deliver high-density, production-worthy, reliable memory technology on schedule and within budget. You will work with development wafer fabrication facilities to manage device definition, creation, demonstration, and delivery and work with multiple design groups to capture requirements and to evaluate tradeoffs providing a unique opportunity to create SRAM memory solutions for TI customers. Highly visible position interacting with multiple business groups, development groups, and fabrication facilities. You will be involved in innovative pathfinding projects. Opening is within Advanced Technology Development Department of the Technology and Manufacturing Group. Responsibilities include SRAM bitcell design, process integration, SWR/DOE (experiments) definition and generation, test structure definition, characterization, data analysis, design rule generation, process control document generation, device characterization, device simulation, driving SRAM yield and qualification. Qualifications Minimum Requirements: Master of Science degree in Electrical Engineering or related degree 10 + years of relevant experience with solid understanding of CMOS and memory process flows and device integration, SRAM operation, and reliability Demonstratable experience and ability to simulate SRAM bitcells (process, electrical, and circuit levels) for transistor design, bitcell functionality and margin Preferred Qualifications: Knowledge of memory device physics, including non-volatile memory devices Circuit design engineering background Knowledge of Spectre simulation and Cadence design/layout tools Knowledge and user of data analysis tools including JMP, Spotfire, Dataware, etc. as well as parsing code languages such as PERL, and Python Ability to organize tasks and manage schedules while working simultaneously with multiple organizations and multiple management chains. Hands-on person willing to take ownership Working knowledge of yield and data analysis Good communication and documentation skills Ability to drive for success and thrive in a fast-paced development environment with multiple shifting priorities

**Description - External** **About TI** Texas Instruments Incorporated (TI) is a global semiconductor design and manufacturing company that develops analog ICs and embedded processors. By employing the world's brightest minds, TI creates innovations that shape the future of technology. TI is helping about 100,000 customers transform the future, today. We're committed to building a better future - from the responsible manufacturing of our semiconductors, to caring for our employees, to giving back inside our communities and developing great minds. Put your talent to work with us - change the world, love your job! **About the job** As a Resolution Enhancement Techniques (RET) modeling engineer, you'll create and optimize OPC models for Texas Instruments' most advanced technology nodes. Models will include both lithography and etch-based models. Responsibilities will include, but are not limited to: + Partnering with design, process engineering and process integration teams to define design shapes needed for building accurate models. + Designing parameterized mask layouts needed for model building inputs. + Investigating and implementing ML and AI methods for improving model accuracy and runtime. + Implementing advanced optimization techniques. + Working with process engineering and process integration teams on wafer verification to validate model quality. + Working with OPC verification engineers to improve the accuracy of post-OPC verification models. These include but are not limited to weak image, assist feature printing, and resist top-loss models. + Troubleshooting photolithographic patterning related issues related to OPC modeling for all fabs within TI. + Developing and maintaining a suite of model quality checks for unit testing. These include but are not limited to grid checks, stability tests, OPC convergence tests, and ghost contour checks. + Developing models that can support multi-patterning approaches such as SADP and LELE. The person performing this role must be capable to plan effectively, drive schedules, meet critical deadlines on multiple tasks in parallel, lead technical discussions in their area of expertise, and work effectively across organizational boundaries. They must be able to clearly communicate project status and actions. Additionally, they must be able to interface with multiple organizations and work well on a diverse team to accomplish goals. **Why TI?** + Engineer your future. We empower our employees to truly own their career and development. Come collaborate with some of the smartest people in the world to shape the future of electronics. + We're different by design. Diverse backgrounds and perspectives are what push innovation forward and what make TI stronger. We value each and every voice, and look forward to hearing yours. Meet the people of TI (*************************************** UI/CandidateExperience/en/sites/CX/pages/4012) + Benefits that benefit you. We offer competitive pay and benefits designed to help you and your family live your best life. Your well-being is important to us. **About Texas Instruments** Texas Instruments Incorporated (Nasdaq: TXN) is a global semiconductor company that designs, manufactures and sells analog and embedded processing chips for markets such as industrial, automotive, personal electronics, communications equipment and enterprise systems. At our core, we have a passion to create a better world by making electronics more affordable through semiconductors. This passion is alive today as each generation of innovation builds upon the last to make our technology more reliable, more affordable and lower power, making it possible for semiconductors to go into electronics everywhere. Learn more at TI.com . Texas Instruments is an equal opportunity employer and supports a diverse, inclusive work environment. All qualified applicants will receive consideration for employment without regard to race, color, religion, creed, disability, genetic information, national origin, gender, gender identity and expression, age, sexual orientation, marital status, veteran status, or any other characteristic protected by federal, state, or local laws. If you are interested in this position, please apply to this requisition. **Qualifications - External** **Minimum requirements:** + Masters in Electrical Engineering, Physics, Computer Science, Chemistry or related degree. + 10 + years experience in OPC modeling in advanced node lithography. + Expertise in selecting and optimizing the features needed for properly sampling design spaces for building accurate models. + Expertise in developing test requirements to validate OPC modeling solutions. + Strong knowledge/understanding of advanced lithography simulation and RET techniques used in semiconductor manufacturing and process development. **Preferred qualifications:** + Ability to lead and drive advanced processes associated with double patterning techniques in 22 nm node development. + Expertise in Synopsys ProGen modeling software. + Demonstrated knowledge of OPC verification software packages such as ORC, LMC+, or PLRC. + Knowledge of critical care-abouts for 28 and 22 nm node processing. + Familiarity with physical layout (gds/oas). Knowledge of litho/OPC test pattern design and layout execution using test pattern generators and use of layout software such as Cadence Virtuoso or KLayout. + Programming experience in Unix environment. + Understanding of OPC pattern validation methodologies and process window assessment techniques like KLA's Photolithography Wafer Qualification (PWQ). + Demonstrated strong analytical and problem solving skills. + Strong verbal and written communication skills. + Ability to work in teams and collaborate effectively with people in different functions. + Strong time management skills that enable on-time project delivery. + Demonstrated ability to build strong, influential relationships. + Ability to work effectively in a fast-paced and rapidly changing environment. + Ability to take the initiative and drive for results. **ECL/GTC Required:** Yes

**About Us:** Texas Instruments is a leading innovator in advanced analog/mixed-signal devices. We are committed to pushing the boundaries of technology and delivering cutting-edge solutions to our global customers. Join our dynamic team and contribute to the next generation of 28nm/22nm node **Job Description:** We are seeking a highly skilled and motivated Design Retargeting Engineer to join our RET(Resolution Enhancement Team) in ATD. In this role, you will be responsible for translating customer design intent into manufacturable layouts by applying advanced retargeting techniques. You will work at the intersection of design and process, ensuring that physical layouts are optimized for yield, performance, and manufacturability across various technology nodes. **Responsibilities:** + Develop and implement design retargeting strategies to bridge the gap between design intent and process capabilities. + Collaborate with OPC, lithography, and process integration teams to ensure accurate pattern transfer and high-yield manufacturing. + Analyze and modify layout geometries to improve printability and process window robustness. + Work with EDA tools to automate retargeting flows and integrate them into the tape-out pipeline. + Support customer design enablement by providing feedback on layout constraints and manufacturability guidelines. + Perform data analysis using CD metrology, SEM review, and simulation results to refine retargeting rules. + Contribute to the development of design rules and patterning strategies for advanced nodes (e.g., 28nm, 22nm). + Mentor junior engineers and contribute to knowledge sharing within the team. **Why TI?** + Engineer your future. We empower our employees to truly own their career and development. Come collaborate with some of the smartest people in the world to shape the future of electronics. + We're different by design. Diverse backgrounds and perspectives are what push innovation forward and what make TI stronger. We value each and every voice, and look forward to hearing yours. Meet the people of TI (*************************************** UI/CandidateExperience/en/sites/CX/pages/4012) + Benefits that benefit you. We offer competitive pay and benefits designed to help you and your family live your best life. Your well-being is important to us. **About Texas Instruments** Texas Instruments Incorporated (Nasdaq: TXN) is a global semiconductor company that designs, manufactures and sells analog and embedded processing chips for markets such as industrial, automotive, personal electronics, communications equipment and enterprise systems. At our core, we have a passion to create a better world by making electronics more affordable through semiconductors. This passion is alive today as each generation of innovation builds upon the last to make our technology more reliable, more affordable and lower power, making it possible for semiconductors to go into electronics everywhere. Learn more at TI.com . Texas Instruments is an equal opportunity employer and supports a diverse, inclusive work environment. All qualified applicants will receive consideration for employment without regard to race, color, religion, creed, disability, genetic information, national origin, gender, gender identity and expression, age, sexual orientation, marital status, veteran status, or any other characteristic protected by federal, state, or local laws. If you are interested in this position, please apply to this requisition. **Qualifications:** + Master's in Electrical Engineering, Physics, Materials Science, or a related field. + 5+ years of experience in design retargeting, OPC, or physical design in a semiconductor or EDA environment. + Strong understanding of optical lithography principles, RET (e.g., OPC, SRA, assist features), and mask technology. + Hands-on experience with industry-standard OPC software tools (e.g., Synopsis Sentaurus Lithography, Mentor Calibre, ASML Brion). + Proficiency in scripting with any scripting languages + Familiarity with layout editing and verification tools (e.g., Calibre, Virtuoso, ICC2). + Understanding of lithography, patterning, and process integration challenges in advanced nodes. + Familiarity with 28nm/22nm process limitations and lithographic constraints. **Preferred Qualifications:** + PhD in Electrical Engineering, Physics, Materials Science, or a related field. + Experience with advanced technology nodes (e.g., 45nm, 28nm, 22nm, and 20nm ). + Solid knowledge of semiconductor device physics and fabrication processes. + Experience in analog layout interaction with lithography and OPC flows. + Experience with statistical data analysis and yield improvement methodologies. + Strong analytical and problem-solving skills. + Ability to work effectively in a cross-functional team environment. + Excellent problem-solving, analytical, and communication skills. + Knowledge of design rule checking (DRC) and layout versus schematic (LVS). + Knowledge of Design Technology Co-Optimization (DTCO) + Exposure to machine learning or data-driven approaches for layout optimization. **ECL/GTC Required:** Yes

About Us: Texas Instruments is a leading innovator in advanced analog/mixed-signal devices. We are committed to pushing the boundaries of technology and delivering cutting-edge solutions to our global customers. Join our dynamic team and contribute to the next generation of 28nm/22nm node Job Description: We are seeking a highly skilled and motivated Design Retargeting Engineer to join our RET(Resolution Enhancement Team) in ATD. In this role, you will be responsible for translating customer design intent into manufacturable layouts by applying advanced retargeting techniques. You will work at the intersection of design and process, ensuring that physical layouts are optimized for yield, performance, and manufacturability across various technology nodes. Responsibilities: Develop and implement design retargeting strategies to bridge the gap between design intent and process capabilities. Collaborate with OPC, lithography, and process integration teams to ensure accurate pattern transfer and high-yield manufacturing. Analyze and modify layout geometries to improve printability and process window robustness. Work with EDA tools to automate retargeting flows and integrate them into the tape-out pipeline. Support customer design enablement by providing feedback on layout constraints and manufacturability guidelines. Perform data analysis using CD metrology, SEM review, and simulation results to refine retargeting rules. Contribute to the development of design rules and patterning strategies for advanced nodes (e.g., 28nm, 22nm). Mentor junior engineers and contribute to knowledge sharing within the team. Qualifications: Master's in Electrical Engineering, Physics, Materials Science, or a related field. 5+ years of experience in design retargeting, OPC, or physical design in a semiconductor or EDA environment. Strong understanding of optical lithography principles, RET (e.g., OPC, SRA, assist features), and mask technology. Hands-on experience with industry-standard OPC software tools (e.g., Synopsis Sentaurus Lithography, Mentor Calibre, ASML Brion). Proficiency in scripting with any scripting languages Familiarity with layout editing and verification tools (e.g., Calibre, Virtuoso, ICC2). Understanding of lithography, patterning, and process integration challenges in advanced nodes. Familiarity with 28nm/22nm process limitations and lithographic constraints. Preferred Qualifications: PhD in Electrical Engineering, Physics, Materials Science, or a related field. Experience with advanced technology nodes (e.g., 45nm, 28nm, 22nm, and 20nm ). Solid knowledge of semiconductor device physics and fabrication processes. Experience in analog layout interaction with lithography and OPC flows. Experience with statistical data analysis and yield improvement methodologies. Strong analytical and problem-solving skills. Ability to work effectively in a cross-functional team environment. Excellent problem-solving, analytical, and communication skills. Knowledge of design rule checking (DRC) and layout versus schematic (LVS). Knowledge of Design Technology Co-Optimization (DTCO) Exposure to machine learning or data-driven approaches for layout optimization.

**Change the world. Love your job** In your first year with TI, you will participate in the Career Accelerator Program (CAP), which provides professional and technical training and resources to accelerate your ramp into TI, and set you up for long-term career success. Within this program, we also offer function-specific technical training and on-the-job learning opportunities that will encourage you to solve problems through a variety of hands-on, meaningful experiences from your very first day on the job. The TMG Development program is a 12-month program for new college graduates in the TMG organization. **About the job:** In this role, you will provide analyses of end of line probe/test, parametric, and process data to source yield and qual limiting issues on new products in the technology development phase. You will take the results of these analyses to fab, design, integration, and product teams to drive issues to solution. You will also participate in efforts to speed up analysis efficiency through scripting, dashboards creation, modeling, and advanced analytical techniques. You will be required to understand the details of electrical testing, parametric and fab data to effectively develop failure models. Creativity in developing new analytical tools and machine/deep learning methods to improve efficiency and accuracy is needed. Responsibilities also include leading and coordinating cross-functional teams to solve complex, multi-faceted issues. The person performing this role must be capable of planning effectively, driving schedules, meeting critical deadlines on multiple tasks in parallel, leading technical discussions in their area of expertise, and work effectively across organizational boundaries. They must be able to clearly communicate project status and actions. Additionally, they must be able to interface with multiple organizations and work well on a diverse team to accomplish goals. **Why TI?** + Engineer your future. We empower our employees to truly own their career and development. Come collaborate with some of the smartest people in the world to shape the future of electronics. + We're different by design. Diverse backgrounds and perspectives are what push innovation forward and what make TI stronger. We value each and every voice, and look forward to hearing yours. Meet the people of TI (*************************************** UI/CandidateExperience/en/sites/CX/pages/4012) + Benefits that benefit you. We offer competitive pay and benefits designed to help you and your family live your best life. Your well-being is important to us. **About Texas Instruments** Texas Instruments Incorporated (Nasdaq: TXN) is a global semiconductor company that designs, manufactures and sells analog and embedded processing chips for markets such as industrial, automotive, personal electronics, communications equipment and enterprise systems. At our core, we have a passion to create a better world by making electronics more affordable through semiconductors. This passion is alive today as each generation of innovation builds upon the last to make our technology more reliable, more affordable and lower power, making it possible for semiconductors to go into electronics everywhere. Learn more at TI.com . Texas Instruments is an equal opportunity employer and supports a diverse, inclusive work environment. All qualified applicants will receive consideration for employment without regard to race, color, religion, creed, disability, genetic information, national origin, gender, gender identity and expression, age, sexual orientation, marital status, veteran status, or any other characteristic protected by federal, state, or local laws. If you are interested in this position, please apply to this requisition. **Minimum requirements:** + Masters in Electrical Engineering, Electrical and Computer Engineering or related field + Minimum cumulative GPA of 3.0/4.0 **Preferred qualifications:** + Knowledge of Wafer fabrication, Semiconductor Device Physics, Circuit Analysis + Knowledge of Data Analysis, Big Data Analytics, Machine/Deep Learning + Programming knowledge is a plus (Python preferred) + Knowledge of Embedded Systems, SRAM, Flash, Digital and Analog Systems is a plus + Strong verbal and written communication skills + Demonstrated strong analytical, critical thinking, and problem-solving skills + Ability to work in teams and collaborate effectively with people in different functions + Ability to take the initiative and drive for results + Strong time management skills that enable on-time project delivery + Ability to work effectively in an interrupt-driven, fast-paced and rapidly changing environment + Demonstrated ability to build strong, influential relationships + Problem solving skills, including meticulous attention to details + Ability to communicate effectively across functional boundaries and with upper management + Ability to work in stressful situations and arrive at creative and effective solutions + Ability to think strategically **ECL/GTC Required:** Yes

**Change the world. Love your job.** A CMP Process Development Engineer is responsible for the development, characterization and optimization of embedded processors to meet the requirements for volume production as part of the Advanced Technology Development team. The ideal candidate will be a technical leader in the area of embedded processors driving the characterization and optimization of the device and process to insure robustness, reliability, and manufacturability meeting all electrical device performance targets. **Responsibilities include:** + Drive process and device improvements through characterization, test, design of experiments, data analysis and simulation + Work with multiple process, integration, reliability, packaging and test engineers to achieve these goals + Work closely with the product groups to identify and optimize the embedded processor performance to meet critical final device parameters to enable game changing products in the market + Compile and evaluate test data to determine appropriate limits and variables for process or material specifications + Conceive and plan projects involving definition and selection of new concepts, equipment, chemistry, automation, or approaches in the development of new processes + Provide technical engineering support in the manufacturing area + Recommend and implement equipment and process modifications to improve production efficiencies, manufacturing techniques, fundamental capabilities and production yields for existing products + Partners with vendors to define and execute on equipment and process development roadmaps The person performing this role must be capable of planning effectively, driving schedules, meeting critical deadlines on multiple tasks in parallel, leading technical discussions in their area of expertise, and working effectively across organizational boundaries. They must be able to clearly communicate project status and actions. Additionally, they must be able to interface with multiple organizations and work well on a diverse team to accomplish goals. **Why TI?** + Engineer your future. We empower our employees to truly own their career and development. Come collaborate with some of the smartest people in the world to shape the future of electronics. + We're different by design. Diverse backgrounds and perspectives are what push innovation forward and what make TI stronger. We value each and every voice, and look forward to hearing yours. Meet the people of TI (*************************************** UI/CandidateExperience/en/sites/CX/pages/4012) + Benefits that benefit you. We offer competitive pay and benefits designed to help you and your family live your best life. Your well-being is important to us. **About Texas Instruments** Texas Instruments Incorporated (Nasdaq: TXN) is a global semiconductor company that designs, manufactures and sells analog and embedded processing chips for markets such as industrial, automotive, personal electronics, communications equipment and enterprise systems. At our core, we have a passion to create a better world by making electronics more affordable through semiconductors. This passion is alive today as each generation of innovation builds upon the last to make our technology more reliable, more affordable and lower power, making it possible for semiconductors to go into electronics everywhere. Learn more at TI.com . Texas Instruments is an equal opportunity employer and supports a diverse, inclusive work environment. All qualified applicants will receive consideration for employment without regard to race, color, religion, creed, disability, genetic information, national origin, gender, gender identity and expression, age, sexual orientation, marital status, veteran status, or any other characteristic protected by federal, state, or local laws. If you are interested in this position, please apply to this requisition. **Minimum requirements:** + Master's degree in Electrical Engineering, Mechanical Engineering, Chemical Engineering, Physics, Material Science, or other related degree + 5 years of experience working on CMP processes + 28nm node semiconductor process experience **Preferred qualifications:** + PhD in Electrical Engineering, Mechanical Engineering, Chemical Engineering, Physics, Material Science, or other related degree + Strongly prefer experience with HKMG CMP, TiN CMP, Poly CMP, CuCMP, and/or NVM like ReRAM/CBRAM/FRAM + Excellent understanding of WLEP systems and demonstrated experience of building white light based endpoints + Demonstrated experience with organic film CMP such as resist and/or BARC + Working knowledge of advanced CMOS device physics and reliability mechanisms in advanced logic and CMOS technologies + Experience across multiple 300mm CMP platforms + Experience driving vendor engagement to leverage best in class tool and chemistry needs + Previous direct R&D experience in 300mm semiconductors + Device physics training with understanding of materials and electrical test characterization + Ability to establish strong relationships with key stakeholders critical to success, both internally and externally + Strong verbal and written communication skills + Ability to quickly ramp on new systems and processes + Demonstrated strong interpersonal, analytical and problem-solving skills + Ability to work in teams and collaborate effectively with people in different functions + Ability to take the initiative and drive for results + Strong time management skills that enable on-time project delivery **ECL/GTC Required:** Yes

Change the world. Love your job. A CMP Process Development Engineer is responsible for the development, characterization and optimization of embedded processors to meet the requirements for volume production as part of the Advanced Technology Development team. The ideal candidate will be a technical leader in the area of embedded processors driving the characterization and optimization of the device and process to insure robustness, reliability, and manufacturability meeting all electrical device performance targets. Responsibilities include: Drive process and device improvements through characterization, test, design of experiments, data analysis and simulation Work with multiple process, integration, reliability, packaging and test engineers to achieve these goals Work closely with the product groups to identify and optimize the embedded processor performance to meet critical final device parameters to enable game changing products in the market Compile and evaluate test data to determine appropriate limits and variables for process or material specifications Conceive and plan projects involving definition and selection of new concepts, equipment, chemistry, automation, or approaches in the development of new processes Provide technical engineering support in the manufacturing area Recommend and implement equipment and process modifications to improve production efficiencies, manufacturing techniques, fundamental capabilities and production yields for existing products Partners with vendors to define and execute on equipment and process development roadmaps The person performing this role must be capable of planning effectively, driving schedules, meeting critical deadlines on multiple tasks in parallel, leading technical discussions in their area of expertise, and working effectively across organizational boundaries. They must be able to clearly communicate project status and actions. Additionally, they must be able to interface with multiple organizations and work well on a diverse team to accomplish goals. Minimum requirements: Master's degree in Electrical Engineering, Mechanical Engineering, Chemical Engineering, Physics, Material Science, or other related degree 5 years of experience working on CMP processes 28nm node semiconductor process experience Preferred qualifications: PhD in Electrical Engineering, Mechanical Engineering, Chemical Engineering, Physics, Material Science, or other related degree Strongly prefer experience with HKMG CMP, TiN CMP, Poly CMP, CuCMP, and/or NVM like ReRAM/CBRAM/FRAM Excellent understanding of WLEP systems and demonstrated experience of building white light based endpoints Demonstrated experience with organic film CMP such as resist and/or BARC Working knowledge of advanced CMOS device physics and reliability mechanisms in advanced logic and CMOS technologies Experience across multiple 300mm CMP platforms Experience driving vendor engagement to leverage best in class tool and chemistry needs Previous direct R&D experience in 300mm semiconductors Device physics training with understanding of materials and electrical test characterization Ability to establish strong relationships with key stakeholders critical to success, both internally and externally Strong verbal and written communication skills Ability to quickly ramp on new systems and processes Demonstrated strong interpersonal, analytical and problem-solving skills Ability to work in teams and collaborate effectively with people in different functions Ability to take the initiative and drive for results Strong time management skills that enable on-time project delivery

Change the world. Love your job In your first year with TI, you will participate in the Career Accelerator Program (CAP), which provides professional and technical training and resources to accelerate your ramp into TI, and set you up for long-term career success. Within this program, we also offer function-specific technical training and on-the-job learning opportunities that will encourage you to solve problems through a variety of hands-on, meaningful experiences from your very first day on the job. The TMG Development program is a 12-month program for new college graduates in the TMG organization. About the job: In this role, you will provide analyses of end of line probe/test, parametric, and process data to source yield and qual limiting issues on new products in the technology development phase. You will take the results of these analyses to fab, design, integration, and product teams to drive issues to solution. You will also participate in efforts to speed up analysis efficiency through scripting, dashboards creation, modeling, and advanced analytical techniques. You will be required to understand the details of electrical testing, parametric and fab data to effectively develop failure models. Creativity in developing new analytical tools and machine/deep learning methods to improve efficiency and accuracy is needed. Responsibilities also include leading and coordinating cross-functional teams to solve complex, multi-faceted issues. The person performing this role must be capable of planning effectively, driving schedules, meeting critical deadlines on multiple tasks in parallel, leading technical discussions in their area of expertise, and work effectively across organizational boundaries. They must be able to clearly communicate project status and actions. Additionally, they must be able to interface with multiple organizations and work well on a diverse team to accomplish goals. Minimum requirements: Masters in Electrical Engineering, Electrical and Computer Engineering or related field Minimum cumulative GPA of 3.0/4.0 Preferred qualifications: Knowledge of Wafer fabrication, Semiconductor Device Physics, Circuit Analysis Knowledge of Data Analysis, Big Data Analytics, Machine/Deep Learning Programming knowledge is a plus (Python preferred) Knowledge of Embedded Systems, SRAM, Flash, Digital and Analog Systems is a plus Strong verbal and written communication skills Demonstrated strong analytical, critical thinking, and problem-solving skills Ability to work in teams and collaborate effectively with people in different functions Ability to take the initiative and drive for results Strong time management skills that enable on-time project delivery Ability to work effectively in an interrupt-driven, fast-paced and rapidly changing environment Demonstrated ability to build strong, influential relationships Problem solving skills, including meticulous attention to details Ability to communicate effectively across functional boundaries and with upper management Ability to work in stressful situations and arrive at creative and effective solutions Ability to think strategically

**Change the world. Love your job.** In your first year with TI, you will participate in the Career Accelerator Program (CAP), which provides professional and technical training and resources to accelerate your ramp into TI, and set you up for long-term career success. Within this program, we also offer function-specific technical training and on-the-job learning opportunities that will encourage you to solve problems through a variety of hands-on, meaningful experiences from your very first day on the job. The TMG Development program is a 12-month program for new college graduates in the TMG organization. TI's failure analysis engineers are responsible for technical functions in support of engineering activities such as characterization design, test, checkout, modifications of assembly technologies and die level failure analysis and circuit analysis. This position provides the opportunity for interacting with wafer fab processing and assembly/test care-about while interfacing with design engineering, product engineering and quality engineering. **Responsibilities include:** + Circuit analysis, bench level equipment skills, die level deprocessing, report writing + Ability to work from schematic diagrams, written and verbal descriptions, layouts or defined plans to perform testing, checkout, and trouble-shooting functions + Perform bench level electrical verification/fault isolation on integrated circuits to determine root cause of failure + Must become proficient in a variety of failure analysis techniques and equipment operation + Excellent judgment required to isolate failures for accurate identification of defect locations + Individual is responsible for managing the failure analysis process in conjunction with their own skill set development + Work in a team environment and provide consultation for non-F/A disciplines + Write detailed failure analysis report **Why TI?** + Engineer your future. We empower our employees to truly own their career and development. Come collaborate with some of the smartest people in the world to shape the future of electronics. + We're different by design. Diverse backgrounds and perspectives are what push innovation forward and what make TI stronger. We value each and every voice, and look forward to hearing yours. Meet the people of TI (*************************************** UI/CandidateExperience/en/sites/CX/pages/4012) + Benefits that benefit you. We offer competitive pay and benefits designed to help you and your family live your best life. Your well-being is important to us. **About Texas Instruments** Texas Instruments Incorporated (Nasdaq: TXN) is a global semiconductor company that designs, manufactures and sells analog and embedded processing chips for markets such as industrial, automotive, personal electronics, communications equipment and enterprise systems. At our core, we have a passion to create a better world by making electronics more affordable through semiconductors. This passion is alive today as each generation of innovation builds upon the last to make our technology more reliable, more affordable and lower power, making it possible for semiconductors to go into electronics everywhere. Learn more at TI.com . Texas Instruments is an equal opportunity employer and supports a diverse, inclusive work environment. All qualified applicants will receive consideration for employment without regard to race, color, religion, creed, disability, genetic information, national origin, gender, gender identity and expression, age, sexual orientation, marital status, veteran status, or any other characteristic protected by federal, state, or local laws. If you are interested in this position, please apply to this requisition. **Minimum requirements:** + Bachelor's Degree in Electrical Engineering + Cumulative 3.0/4.0 GPA or higher **Preferred qualifications** : + Strong verbal and written communication skills + Demonstrated strong analytical and problem solving skills + Ability to work in teams and collaborate effectively with people in different functions + Ability to take the initiative and drive for results + Strong time management skills that enable on-time project delivery + Ability to work effectively in an interrupt-driven, fast-paced and rapidly changing environment + Demonstrated ability to build strong, influential relationships + Ability to take the initiative and drive for results + Ability to analyze and interpret data, interpret customer input and apply input to TI's products and processes + Ability to take the initiative and ownership for implementing solutions that improve product quality **ECL/GTC Required:** Yes

Change the world. Love your job. In your first year with TI, you will participate in the Career Accelerator Program (CAP), which provides professional and technical training and resources to accelerate your ramp into TI, and set you up for long-term career success. Within this program, we also offer function-specific technical training and on-the-job learning opportunities that will encourage you to solve problems through a variety of hands-on, meaningful experiences from your very first day on the job. The TMG Development program is a 12-month program for new college graduates in the TMG organization. TI's failure analysis engineers are responsible for technical functions in support of engineering activities such as characterization design, test, checkout, modifications of assembly technologies and die level failure analysis and circuit analysis. This position provides the opportunity for interacting with wafer fab processing and assembly/test care-about while interfacing with design engineering, product engineering and quality engineering. Responsibilities include: Circuit analysis, bench level equipment skills, die level deprocessing, report writing Ability to work from schematic diagrams, written and verbal descriptions, layouts or defined plans to perform testing, checkout, and trouble-shooting functions Perform bench level electrical verification/fault isolation on integrated circuits to determine root cause of failure Must become proficient in a variety of failure analysis techniques and equipment operation Excellent judgment required to isolate failures for accurate identification of defect locations Individual is responsible for managing the failure analysis process in conjunction with their own skill set development Work in a team environment and provide consultation for non-F/A disciplines Write detailed failure analysis report Qualifications Minimum requirements: Bachelor's Degree in Electrical Engineering Cumulative 3.0/4.0 GPA or higher Preferred qualifications: Strong verbal and written communication skills Demonstrated strong analytical and problem solving skills Ability to work in teams and collaborate effectively with people in different functions Ability to take the initiative and drive for results Strong time management skills that enable on-time project delivery Ability to work effectively in an interrupt-driven, fast-paced and rapidly changing environment Demonstrated ability to build strong, influential relationships Ability to take the initiative and drive for results Ability to analyze and interpret data, interpret customer input and apply input to TI's products and processes Ability to take the initiative and ownership for implementing solutions that improve product quality