Blaize Leadership

Ke Yin co-founded Blaize and serves as Chief Scientist and Vice President of Engineering, bringing more than 22 years of experience in graphics and video processor architecture and micro-architecture. A noted expert in multi-thread, multi-core, and SIMD/MIMD processor architecture, Ke defined the Blaize core architecture and developed multiple algorithm innovations in the area of graphics, video processing and network graphics, with multiple patents pending. He also created the Blaize core simulator, a transaction-accurate model with bit-accurate precision that validates the correctness of the Blaize architecture and provides performance and power projections.

Prior to co-founding Blaize, Ke was at Intel for 12 years in a variety of Architect/Micro-Architect and Design Engineer roles across multiple key Intel products and initiatives. This included architecture work on the Intel Gen graphics core where he led a power reduction effort resulting in a more than 30% power saving.

Ke holds a Bachelor of Engineering degree, Electrical Engineering, from the University of Wyoming, and a Master of Science degree, Computer Engineering and Computer Science, from the University of Texas, Austin. He is credited with 6 IP/Patents and 6 filings.

Satyaki Koneru co-founded Blaize and serves as Chief Technology Officer, bringing more than 20 years of experience in next-generation system-on-a-chip design. Overseeing Blaize’s research and development efforts, Satyaki is the chief architect of the innovative programmable graph computing vision at the core of the Blaize Graph Streaming Processor (GSP), designed to efficiently compute the new and more varied data structures associated with the emergence of edge computing, IoT and AI.

Prior to co-founding Blaize, Satyaki held Architect/Micro-Architect and Design Engineer positions at Intel and Nvidia. At Intel, Satyaki was instrumental in defining the first DX9 compliant programmable graphics core in Intel chipsets, and was closely involved in the development of the motion-estimation engine for video encoding for second generation Core-i Sandybridge processors. He also was part of the design team for the Ultra-Mobility Group next-generation SoC (Medfield).

Satyaki holds a Bachelor of Technology degree, Electrical Engineering, from I.I.T., Bombay, India, and a Master of Science, Computer Engineering from Iowa State University, Ames. He is credited with 6 IP/Patents and 10 filings.

Val G. Cook is Chief Software Architect at Blaize. An AI visionary and authority on the design of graphics and visual computing architectures, Val possesses two decades of experience in graphics and multimedia algorithms and software architecture. He is responsible for the Blaize Graph Streaming Processor software programming environment.

Prior to joining Blaize, Val was at Intel in a variety of software and 3D graphics architecture positions associated with high profile projects. This included responsibility for advanced development activities around Intel bit-precise GPU simulator, and overseeing the software architectural design of the simulator and its enhancements. He also defined the initial ISA for Intel’s family of GPUs, and was the technical lead in developing the world’s first programmable GPU.

Val holds a Bachelor of Science degree, Electrical Engineering, and a Master of Science degree, Computer Science, from Brigham Young University, Provo, Utah.

Ke Yin co-founded Blaize and serves as Chief Scientist and Vice President of Engineering, bringing more than 22 years of experience in graphics and video processor architecture and micro-architecture. A noted expert in multi-thread, multi-core, and SIMD/MIMD processor architecture, Ke defined the Blaize core architecture and developed multiple algorithm innovations in the area of graphics, video processing and network graphics, with multiple patents pending. He also created the Blaize core simulator, a transaction-accurate model with bit-accurate precision that validates the correctness of the Blaize architecture and provides performance and power projections.

Prior to co-founding Blaize, Ke was at Intel for 12 years in a variety of Architect/Micro-Architect and Design Engineer roles across multiple key Intel products and initiatives. This included architecture work on the Intel Gen graphics core where he led a power reduction effort resulting in a more than 30% power saving.

Ke holds a Bachelor of Engineering degree, Electrical Engineering, from the University of Wyoming, and a Master of Science degree, Computer Engineering and Computer Science, from the University of Texas, Austin. He is credited with 6 IP/Patents and 6 filings.

Ke Yin co-founded Blaize and serves as Chief Scientist and Vice President of Engineering, bringing more than 22 years of experience in graphics and video processor architecture and micro-architecture. A noted expert in multi-thread, multi-core, and SIMD/MIMD processor architecture, Ke defined the Blaize core architecture and developed multiple algorithm innovations in the area of graphics, video processing and network graphics, with multiple patents pending. He also created the Blaize core simulator, a transaction-accurate model with bit-accurate precision that validates the correctness of the Blaize architecture and provides performance and power projections.

Prior to co-founding Blaize, Ke was at Intel for 12 years in a variety of Architect/Micro-Architect and Design Engineer roles across multiple key Intel products and initiatives. This included architecture work on the Intel Gen graphics core where he led a power reduction effort resulting in a more than 30% power saving.

Ke holds a Bachelor of Engineering degree, Electrical Engineering, from the University of Wyoming, and a Master of Science degree, Computer Engineering and Computer Science, from the University of Texas, Austin. He is credited with 6 IP/Patents and 6 filings.